Patents by Inventor S. M. Reza Sadjadi
S. M. Reza Sadjadi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120298301Abstract: A method for forming features in a silicon layer is provided. A mask is formed with a plurality of mask openings over the silicon layer. A polymer layer is deposited over the mask by flowing a hydrogen free deposition gas comprising C4F8, forming a plasma from the deposition gas, depositing a polymer from the plasma for at least 20 seconds, and stopping the depositing the polymer after the at least 20 seconds. The deposited polymer layer is opened by flowing an opening gas, forming a plasma from the opening gas which selectively removes the deposited polymer on bottoms of the plurality of mask openings with respect to deposited polymer on sides of the plurality of mask openings, and stopping the opening when at least some of the plurality of mask features are opened. The silicon layer is etched through the mask and deposited polymer layer.Type: ApplicationFiled: August 10, 2012Publication date: November 29, 2012Applicant: LAM RESEARCH CORPORATIONInventors: Tamarak Pandhumsoporn, Patrick Chung, Jackie Seto, S. M. Reza Sadjadi
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Publication number: 20120282780Abstract: A method for etching features into an etch layer is provided. A patterned mask is formed over the etch layer, wherein the patterned mask is of a high etch rate photoresist material, wherein the patterned mask has patterned mask features. A protective layer is deposited on the patterned mask of high etch rate photoresist material by performing a cyclical deposition, wherein each cycle, comprises a depositing phase for depositing a deposition layer over the exposed surfaces, including sidewalls of the patterned mask of high etch rate photoresist material and a profile shaping phase for providing vertical sidewalls. Features are etched into the etch layer using the protective layer as a mask. The protective layer is removed.Type: ApplicationFiled: December 19, 2008Publication date: November 8, 2012Applicant: LAM RESEARCH CORPORATIONInventors: Andrew R. Romano, S. M. Reza Sadjadi
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Patent number: 8282847Abstract: A method for etching an etch layer formed on a substrate is provided. A first photoresist (PR) mask with first mask features is provided on the etch layer. A protective coating is provided on the first PR mask by a process including at least one cycle. Each cycle includes (a) a deposition phase for depositing a deposition layer over the surface of the first mask features using a deposition gas, and (b) a profile shaping phase for shaping the profile of the deposition layer using a profile shaping gas. A liquid PR material is applied over the first PR mask having the protective coating. The PR material is patterned into a second mask features, where the first and second mask features form a second PR mask. The etch layer is etched though the second PR mask.Type: GrantFiled: December 18, 2008Date of Patent: October 9, 2012Assignee: Lam Research CorporationInventors: Andrew R. Romano, S. M. Reza Sadjadi
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Patent number: 8268118Abstract: A method for forming a feature in an etch layer is provided. A photoresist layer is formed over the etch layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A control layer is formed over the photoresist layer and bottoms of the photoresist features. A conformal layer is deposited over the sidewalls of the photoresist features and control layer to reduce the critical dimensions of the photoresist features. Openings in the control layer are opened with a control layer breakthrough chemistry. Features are etched into the etch layer with an etch chemistry, which is different from the control layer break through chemistry, wherein the control layer is more etch resistant to the etch with the etch chemistry than the conformal layer.Type: GrantFiled: February 24, 2010Date of Patent: September 18, 2012Assignee: Lam Research CorporationInventors: Sangheon Lee, Dae-Han Choi, Jisoo Kim, Peter Cirigliano, Zhisong Huang, Robert Charatan, S. M. Reza Sadjadi
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Patent number: 8262920Abstract: A method for forming features in a silicon layer is provided. A mask is formed with a plurality of mask openings over the silicon layer. A polymer layer is deposited over the mask by flowing a hydrogen free deposition gas comprising C4F8, forming a plasma from the deposition gas, depositing a polymer from the plasma for at least 20 seconds, and stopping the depositing the polymer after the at least 20 seconds. The deposited polymer layer is opened by flowing an opening gas, forming a plasma from the opening gas which selectively removes the deposited polymer on bottoms of the plurality of mask openings with respect to deposited polymer on sides of the plurality of mask openings, and stopping the opening when at least some of the plurality of mask features are opened. The silicon layer is etched through the mask and deposited polymer layer.Type: GrantFiled: June 18, 2007Date of Patent: September 11, 2012Assignee: Lam Research CorporationInventors: Tamarak Pandhumsoporn, Patrick Chung, Jackie Seto, S. M. Reza Sadjadi
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Publication number: 20120205819Abstract: A method for reducing capacitances between semiconductor devices is provided. A plurality of contact structures is formed in a dielectric layer. A mask is formed to cover the contact structures wherein the mask has mask features for exposing parts of the dielectric layer wherein the mask features have widths. The widths of the mask features are shrunk with a sidewall deposition. Gaps are etched into the dielectric layer through the sidewall deposition. The gaps are closed to form pockets in the gaps.Type: ApplicationFiled: April 26, 2012Publication date: August 16, 2012Applicant: LAM RESEARCH CORPORATIONInventors: S. M. Reza Sadjadi, Zhi-Song Huang
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Publication number: 20120138227Abstract: A method for forming an array area with a surrounding periphery area, wherein a substrate is disposed under an etch layer, which is disposed under a patterned organic mask defining the array area and covers the entire periphery area is provided. The patterned organic mask is trimmed. An inorganic layer is deposited over the patterned organic mask where a thickness of the inorganic layer over the covered periphery area of the organic mask is greater than a thickness of the inorganic layer over the array area of the organic mask. The inorganic layer is etched back to expose the organic mask and form inorganic spacers in the array area, while leaving the organic mask in the periphery area unexposed. The organic mask exposed in the array area is stripped, while leaving the inorganic spacers in place and protecting the organic mask in the periphery area.Type: ApplicationFiled: February 9, 2012Publication date: June 7, 2012Applicant: LAM RESEARCH CORPORATIONInventors: S. M. Reza Sadjadi, Amit Jain
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Patent number: 8187412Abstract: A method for reducing capacitances between semiconductor devices is provided. A plurality of contact structures is formed in a dielectric layer. A mask is formed to cover the contact structures wherein the mask has mask features for exposing parts of the dielectric layer wherein the mask features have widths. The widths of the mask features are shrunk with a sidewall deposition. Gaps are etched into the dielectric layer through the sidewall deposition. The gaps are closed to form pockets in the gaps.Type: GrantFiled: December 22, 2008Date of Patent: May 29, 2012Assignee: Lam Research Corporation;Inventors: S. M. Reza Sadjadi, Zhi-Song Huang
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Patent number: 8172980Abstract: A method for reducing capacitances between semiconductor device wirings is provided. A sacrificial layer is formed over a dielectric layer. A plurality of features are etched into the sacrificial layer and dielectric layer. The features are filled with a filler material. The sacrificial layer is removed, so that parts of the filler material remain exposed above a surface of the dielectric layer, where spaces are between the exposed parts of the filler material, where the spaces are in an area formerly occupied by the sacrificial layer. Widths of the spaces between the parts of the filler material are shrunk with a shrink sidewall deposition. Gaps are etched into the dielectric layer through the shrink sidewall deposition. The filler material and shrink sidewall deposition are removed.Type: GrantFiled: August 29, 2008Date of Patent: May 8, 2012Assignee: Lam Research CorporationInventors: S. M. Reza Sadjadi, Zhi-Song Huang
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Patent number: 8172948Abstract: A feature in a layer is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls, where the photoresist features have a first critical dimension. A fluorine-containing conformal layer is deposited over the sidewalls of the photoresist features to reduce the critical dimensions of the photoresist features. Fluorine is removed from the conformal layer, while the remaining conformal layer is left in place. Features are etched into the layer, wherein the layer features have a second critical dimension, which is less than the first critical dimension.Type: GrantFiled: November 1, 2007Date of Patent: May 8, 2012Assignee: Lam Research CorporationInventors: Dongho Heo, Jisoo Kim, S. M. Reza Sadjadi
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Patent number: 8138092Abstract: A method for forming an array area with a surrounding periphery area, wherein a substrate is disposed under an etch layer, which is disposed under a patterned organic mask defining the array area and covers the entire periphery area is provided. The patterned organic mask is trimmed. An inorganic layer is deposited over the patterned organic mask where a thickness of the inorganic layer over the covered periphery area of the organic mask is greater than a thickness of the inorganic layer over the array area of the organic mask. The inorganic layer is etched back to expose the organic mask and form inorganic spacers in the array area, while leaving the organic mask in the periphery area unexposed. The organic mask exposed in the array area is stripped, while leaving the inorganic spacers in place and protecting the organic mask in the periphery area.Type: GrantFiled: January 9, 2009Date of Patent: March 20, 2012Assignee: Lam Research CorporationInventors: S. M. Reza Sadjadi, Amit Jain
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Publication number: 20120052683Abstract: A method for etching an etch layer disposed over a substrate and below an antireflective coating (ARC) layer and a patterned organic mask with mask features is provided. The substrate is placed in a process chamber. The ARC layer is opened. An oxide spacer deposition layer is formed. The oxide spacer deposition layer on the organic mask is partially removed, where at least the top portion of the oxide spacer deposition layer is removed. The organic mask and the ARC layer are removed by etching. The etch layer is etched through the sidewalls of the oxide spacer deposition layer. The substrate is removed from the process chamber.Type: ApplicationFiled: November 7, 2008Publication date: March 1, 2012Applicant: LAM RESEARCH CORPORATIONInventors: Jisoo Kim, Conan Chiang, Jun Shinagawa, S.M. Reza Sadjadi
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Publication number: 20110281435Abstract: A plasma chamber with a plasma confinement zone with an electrode is provided. A gas distribution system for providing a first gas and a second gas is connected to the plasma chamber, wherein the gas distribution system can substantially replace one gas in the plasma zone with the other gas within a period of less than 1 s. A first frequency tuned RF power source for providing power to the electrode in a first frequency range is electrically connected to the at least one electrode wherein the first frequency tuned RF power source is able to minimize a reflected RF power. A second frequency tuned RF power source for providing power to the plasma chamber in a second frequency range outside of the first frequency range wherein the second frequency tuned RF power source is able to minimize a reflected RF power.Type: ApplicationFiled: July 22, 2011Publication date: November 17, 2011Applicant: LAM RESEARCH CORPORATIONInventors: S. M. Reza Sadjadi, Zhisong Huang, Jose Tong Sam, Eric H. Lenz, Rajinder Dhindsa
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Patent number: 7977242Abstract: A method for providing features in an etch layer is provided by forming an organic mask layer over the inorganic mask layer, forming a silicon-containing mask layer over the organic mask layer, forming a patterned mask layer over the silicon-containing mask layer, etching the silicon-containing mask layer through the patterned mask, depositing a polymer over the etched silicon-containing mask layer, depositing a silicon-containing film over the polymer, planarizing the silicon-containing film, selectively removing the polymer leaving the silicon-containing film, etching the organic layer, and etching the inorganic layer.Type: GrantFiled: February 5, 2009Date of Patent: July 12, 2011Assignee: Lam Research CorporationInventors: S. M. Reza Sadjadi, Lumin Li, Andrew R. Romano
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Patent number: 7910489Abstract: A method for etching features into an etch layer disposed below a photoresist mask without an intermediate hardmask is provided. A plurality of etch cycles are provided. Each etch cycle comprises providing a deposition etch phase that etches features into the etch layer and deposits polymer on sidewalls of the features and over the photoresist and providing a cleaning phase that removes polymer deposited on the sidewalls.Type: GrantFiled: February 17, 2006Date of Patent: March 22, 2011Assignee: Lam Research CorporationInventors: Ji Soo Kim, Peter Cirigliano, Sangheon Lee, Dongho Heo, Daehan Choi, S. M. Reza Sadjadi
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Patent number: 7902073Abstract: A method for etching features in an etch layer disposed below a mask on a process wafer is provided. A hydrocarbon based glue layer is deposited. The etch layer on the process wafer is etched with at least one cycle, wherein each cycle comprises depositing a hydrofluorocarbon layer over the mask and on the hydrocarbon based glue layer, wherein the hydrocarbon based glue layer increases adhesion of the hydrofluorocarbon layer and etching the etch layer.Type: GrantFiled: December 14, 2006Date of Patent: March 8, 2011Assignee: Lam Research CorporationInventors: Ji Soo Kim, Sangheon Lee, Deepak K. Gupta, S. M. Reza Sadjadi
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Publication number: 20110030895Abstract: A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.Type: ApplicationFiled: October 19, 2010Publication date: February 10, 2011Applicant: LAM RESEARCH CORPORATIONInventors: Supriya GOYAL, Dongho HEO, Jisoo KIM, S.M. Reza SADJADI
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Patent number: 7838426Abstract: A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.Type: GrantFiled: August 20, 2007Date of Patent: November 23, 2010Assignee: Lam Research CorporationInventors: Supriya Goyal, Dongho Heo, Jisoo Kim, S.M. Reza Sadjadi
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Patent number: 7785484Abstract: A method for etching a dielectric layer disposed below an antireflection layer (ARL) is provided. The method comprises (a) forming a patterned mask with mask features over the ARL, the mask having isolated areas and dense areas of the mask features, (b) trimming and opening, and (c) etching the dielectric layer using the trimmed mask. The trimming and opening comprises a plurality of cycles, where each cycle includes (b1) a trim-etch phase which etches the ARL in a bottom of the mask features and selectively trims the isolated areas of the mask with respect to the dense areas, and (b2) a deposition-etch phase which deposits a deposition layer on the mask while further etching the ARL in the bottom of the mask features. The trimming and opening result in a net trimming of the mask in the isolated areas.Type: GrantFiled: August 20, 2007Date of Patent: August 31, 2010Assignee: Lam Research CorporationInventors: Dongho Heo, Supriya Goyal, Jisoo Kim, S. M. Reza Sadjadi
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Patent number: 7772122Abstract: An etch layer underlying a patterned photoresist mask is provided. A plurality of sidewall forming processes are performed. Each sidewall forming process comprises depositing a protective layer on the patterned photoresist mask by performing multiple cyclical depositions. Each cyclical deposition involves at least a depositing phase for depositing a deposition layer over surfaces of the patterned photoresist mask and a profile shaping phase for shaping vertical surfaces in the deposition layer. Each sidewall forming process further comprises a breakthrough etch for selectively etching horizontal surfaces of the protective layer with respect to vertical surfaces of the protective layer. Afterwards, the etch layer is etched to form a feature having a critical dimension that is less than the critical dimension of the features in the patterned photoresist mask.Type: GrantFiled: September 18, 2008Date of Patent: August 10, 2010Assignee: Lam Research CorporationInventors: Peter Cirigliano, Helen Zhu, Ji Soo Kim, S. M. Reza Sadjadi