Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: Semiconductor LED layers are epitaxially grown on a patterned surface of a sapphire substrate. The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact and an n-metal contact. A dielectric polymer stress-buffer layer is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

Abstract: Light Emitting Devices (LEDs) are fabricated on a wafer substrate with one or more thick metal layers that provide structural support to each LED. The streets, or lanes, between individual LEDs do not include this metal, and the wafer can be easily sliced/diced into singulated self-supporting LEDs. Because these devices are self-supporting, a separate support submount is not required. Before singulation, further processes may be applied at the wafer-level; after singulation, these self-supporting LEDs may be picked and placed upon an intermediate substrate for further processing as required. In an embodiment of this invention, protective optical domes are formed over the light emitting devices at the wafer-level or while the light emitting devices are situated on the intermediate substrate.

Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.

Abstract: Light Emitting Devices (LEDs) are fabricated on a wafer substrate with one or more thick metal layers that provide structural support to each LED. The streets, or lanes, between individual LEDs do not include this metal, and the wafer can be easily sliced/diced into singulated self-supporting LEDs. Because these devices are self-supporting, a separate support submount is not required. Before singulation, further processes may be applied at the wafer-level; after singulation, these self-supporting LEDs may be picked and placed upon an intermediate substrate for further processing as required. In an embodiment of this invention, protective optical domes are formed over the light emitting devices at the wafer-level or while the light emitting devices are situated on the intermediate substrate.

Abstract: Semiconductor LED layers are epitaxially gown on a patterned surface of a sapphire substrate (10). The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact (32) and an n-metal contact (33). A dielectric polymer stress-buffer layer (36) is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads (44, 45) are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: In a general aspect, a power semiconductor device can include a silicon carbide (SiC) substrate and a SiC epi-layer disposed on the SiC substrate. The device can also include a well region disposed in the SiC epi-layer and a source region disposed in the well region. The device can further include a gate trench disposed in the SiC epi-layer and adjacent to the source region, the gate trench having a depth that is greater than a depth of the well region and is less than a depth of the SiC epi-layer. The device can also include a hybrid gate dielectric disposed on a sidewall of the gate trench and a bottom surface of the gate trench. The hybrid gate dielectric can include a first high-k dielectric material and a second high-k dielectric material. The device can also include a conductive gate electrode disposed on the hybrid gate dielectric.

Abstract: Semiconductor LED layers are epitaxially gown on a patterned surface of a sapphire substrate (10). The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact (32) and an n-metal contact (33). A dielectric polymer stress-buffer layer (36) is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads (44, 45) are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor devices grown on a growth substrate. The wafer of semiconductor devices has a first surface and a second surface opposite the first surface. The second surface is a surface of the growth substrate. The method further includes bonding the first surface to a first wafer and bonding the second surface to a second wafer. In some embodiments, the first and second wafer each have a different coefficient of thermal expansion than the growth substrate.

Abstract: Thick metal pillars are formed upon light emitting dies while the dies are still on their supporting wafer. A molding compound is applied to fill the space between the pillars on each die, and contact pads are formed atop the pillars. The metal pillars provide electrical contact between the contact pads and the electrical contacts of each light emitting die. The metal pillars maybe formed upon an upper metal layer of each die, and this upper metal layer maybe patterned to provide connections to individual elements within the die.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.

Abstract: A technique is disclosed for causing the top surfaces of solder bumps on a chip to be in the same plane to ensure a more reliable bond between the chip and a substrate. The chip is provided with solder pads that may have different heights. A dielectric layer is formed between the solder pads. A relatively thick metal layer is plated over the solder pads. The metal layer is planarized to cause the top surfaces of the metal layer portions over the solder pads to be in the same plane and above the dielectric layer. A substantially uniformly thin layer of solder is deposited over the planarized metal layer portions so that the top surfaces of the solder bumps are substantially in the same plane. The chip is then positioned over a substrate having corresponding metal pads, and the solder is reflowed or ultrasonically bonded to the substrate pads.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor devices grown on a growth substrate. The wafer of semiconductor devices has a first surface and a second surface opposite the first surface. The second surface is a surface of the growth substrate. The method further includes bonding the first surface to a first wafer and bonding the second surface to a second wafer. In some embodiments, the first and second wafer each have a different coefficient of thermal expansion than the growth substrate. In some embodiments, the second wafer may compensate for stress introduced to the wafer of semiconductor devices by the first wafer.

Abstract: Light Emitting Devices (LEDs) are fabricated on a wafer substrate with one or more thick metal layers that provide structural support to each LED. The streets, or lanes, between individual LEDs do not include this metal, and the wafer can be easily sliced/diced into singulated self-supporting LEDs. Because these devices are self-supporting, a separate support submount is not required. Before singulation, further processes may be applied at the wafer-level; after singulation, these self-supporting LEDs may be picked and placed upon an intermediate substrate for further processing as required. In an embodiment of this invention, protective optical domes are formed over the light emitting devices at the wafer-level or while the light emitting devices are situated on the intermediate substrate.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.