Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.

Abstract: In one embodiment, a semiconductor device wafer (10) contains electrical components and has electrodes (28) on a first side of the device wafer (10). A transparent carrier wafer (30) is bonded to the first side of the device wafer (10) using a bonding material (32) (e.g., a polymer or metal). The second side of the device wafer (10) is then processed, such as thinned, while the carrier wafer (30) provides mechanical support for the device wafer (10). The carrier wafer (30) is then de-bonded from the device wafer (10) by passing a laser beam (46) through the carrier wafer (30), the carrier wafer (30) being substantially transparent to the wavelength of the beam. The beam impinges on the bonding material (32), which absorbs the beam's energy, to break the chemical bonds between the bonding material (32) and the carrier wafer (30). The released carrier wafer (30) is then removed from the device wafer (10), and the residual bonding material is cleaned from the device wafer (10).

Abstract: Thick metal pillars are formed upon light emitting dies while the dies are still on their supporting wafer. A molding compound is applied to fill the space between the pillars on each die, and contact pads are formed atop the pillars. The metal pillars provide electrical contact between the contact pads and the electrical contacts of each light emitting die. The metal pillars maybe formed upon an upper metal layer of each die, and this upper metal layer maybe patterned to provide connections to individual elements within the die.

Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

Abstract: The following disclosure describes several embodiments of (1) methods for wafer-level packaging of microelectronic imagers, (2) methods of forming electrically conductive interconnects in microelectronic imagers, (3) methods for forming optical devices for microelectronic imagers, and (4) microelectronic imagers that have been packaged using wafer-level packaging processes. Wafer-level packaging of microelectronic imagers is expected to significantly enhance the efficiency of manufacturing microelectronic imagers because a plurality of imagers can be packaged simultaneously using highly accurate and efficient processes developed for packaging semiconductor devices. Moreover, wafer-level packaging of microelectronic imagers is expected to enhance the quality and performance of such imagers because the semiconductor fabrication processes can reliably align an optical device with an image sensor and space the optical device apart from the image sensor by a desired distance with a higher degree of precision.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor light emitting devices, each semiconductor light emitting device including a light emitting layer sandwiched between an n-type region and a p-type region. A wafer of support substrates is provided, each support substrate including a body. The wafer of semiconductor light emitting devices is bonded to the wafer of support substrates. Vias are formed extending through the entire thickness of the body of each support substrate.

Abstract: Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from an active surface through a conductive element thereon and a portion of the substrate underlying the conductive element. The through via may then be completed by laser ablation or drilling from a back surface. In another embodiment, a partial via may be formed by laser ablation or drilling from the back surface of a substrate to a predetermined distance therein. The through via may be completed from the active surface by forming a partial via extending through the conductive element and the underlying substrate to intersect the laser-drilled partial via. In another embodiment, a partial via may first be formed by laser ablation or drilling from the back surface of the substrate followed by dry etching to complete the through via.

Abstract: An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a semiconductor device. More specifically, an improved wire bond is described wherein the bond pad on a surface of the semiconductor device comprises a layer of copper and at least one layer of metal and/or at least a barrier layer of material between the copper layer and one layer of metal on the copper layer to form a bond pad.

Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

Abstract: A method according to embodiments of the invention includes providing a wafer of semiconductor devices grown on a growth substrate. The wafer of semiconductor devices has a first surface and a second surface opposite the first surface. The second surface is a surface of the growth substrate. The method further includes bonding the first surface to a first wafer and bonding the second surface to a second wafer. In some embodiments, the first and second wafer each have a different coefficient of thermal expansion than the growth substrate. In some embodiments, the second wafer may compensate for stress introduced to the wafer of semiconductor devices by the first wafer.

Abstract: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad.

Abstract: A support substrate including a body (35) and a plurality of vias (48) extending through an entire thickness of the body is bonded to a semiconductor light emitting device including a light emitting layer (14) sandwiched between an n-type region (12) and a p-type region (16). The support substrate is no wider than the semiconductor light emitting device.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: A method of activating a metal structure on an intermediate semiconductor device structure toward metal plating. The method comprises providing an intermediate semiconductor device structure comprising at least one first metal structure and at least one second metal structure on a semiconductor substrate. The at least one first metal structure comprises at least one aluminum structure, at least one copper structure, or at least one structure comprising a mixture of aluminum and copper and the at least one second metal structure comprises at least one tungsten structure. One of the at least one first metal structure and the at least one second metal structure is activated toward metal plating without activating the other of the at least one first metal structure and the at least one second metal structure. An intermediate semiconductor device structure is also disclosed.

Abstract: Semiconductor dice comprise at least one bond pad on an active surface of the semiconductor die. At least one blind hole extends from a back surface of the semiconductor die opposing the active surface, through a thickness of the semiconductor die, to an underside of the at least one bond pad. At least one quantity of passivation material covers at least a sidewall surface of the at least one blind hole. At least one conductive material is disposed in the at least one blind hole adjacent and in electrical communication with the at least one bond pad and adjacent the at least one quantity of passivation material.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.

Abstract: A method of making a color filter array of an imaging device comprises forming a main recess for a color filter array, forming a tension breaking feature at an edge of the main recess, and providing a color filter array material across the tension breaking feature and main recess as part of forming the color filter array. The tension breaking feature reduces the settling distance of the color filter array material. An imaging device having the thus formed color filter array is also described.