Patents by Inventor Sam Seiichiro Ochi

Sam Seiichiro Ochi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8599937
    Abstract: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 3, 2013
    Assignee: Microsemi Corporation
    Inventors: Sam Seiichiro Ochi, Charles Coleman
  • Publication number: 20130279153
    Abstract: pa A display device includes a display panel; and a backlight panel provided below the display panel and defining a plurality of regions. A first array of light emitting diodes (LEDs) is provided along a first direction, each LED of the first array being coupled to a first line. A driver is coupled to the first line to drive the LEDs coupled to the first line. A second array of LEDs is provided along a second direction, each LEDs of the second array being coupled to a second line. A lighting condition of the regions defined by the backlight panel is controlled by turning on or off the LEDs.
    Type: Application
    Filed: June 19, 2013
    Publication date: October 24, 2013
    Inventors: Nathan Zommer, Sam Seiichiro Ochi
  • Patent number: 8471791
    Abstract: A display device includes a display panel; and a backlight panel provided below the display panel and defining a plurality of regions. A first array of light emitting diodes (LEDs) is provided along a first direction, each LED of the first array being coupled to a first line. A driver is coupled to the first line to drive the LEDs coupled to the first line. A second array of LEDs is provided along a second direction, each LEDs of the second array being coupled to a second line. A lighting condition of the regions defined by the backlight panel is controlled by turning on or off the LEDs.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: June 25, 2013
    Assignee: IXYS Corporation
    Inventors: Nathan Zommer, Sam Seiichiro Ochi
  • Patent number: 8456196
    Abstract: Methods, systems, and devices are described for providing voltage comparison adapted to operate at high-speeds and over a relatively large range of supply voltages.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: June 4, 2013
    Assignee: Microsemi Corporation
    Inventor: Sam Seiichiro Ochi
  • Patent number: 8345779
    Abstract: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: January 1, 2013
    Assignee: Microsemi Corporation
    Inventors: Sam Seiichiro Ochi, Charles Coleman
  • Patent number: 8143748
    Abstract: Methods, systems, and devices are described for auxiliary power with low standby power consumption. Switching power converters typically include a switching power element (e.g., a power transistor), driven by a switching controller (e.g., including a gate driver). The power output of the switching power converter may be a function of the switching signal provided by the switching controller. For example, a pulse-width modulated (“PWM”) signal may be used to drive the switching power element, and the output of the switching controller may be adjusted by adjusting the frequency and/or duty cycle of the PWM signal. Embodiments implement cycle extension techniques to effectively extend a portion of the PWM signal to generate additional charge. The additional charge may be used to power an auxiliary power unit. The auxiliary power unit may then be used to drive the switching controller and/or to provide a source of power for other internal or external components.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: March 27, 2012
    Assignee: Microsemi Corporation
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20120032728
    Abstract: Methods, systems, and devices are described for an adjustment module that interacts with a parameter detection module to provide a threshold value for initiating switching of a switching module in a cyclical electronic system. Aspects of the present disclosure provide a switching module used in conjunction with an inductor that is coupled with the switching module. The threshold voltage for switching the switching module may be adjusted to provide switching at substantially zero volts while maintaining sufficient energy in the inductor to drive the voltage at a switching element in the switching module to zero volts. Such auto-adjustment circuits may allow for enhanced efficiency in cyclical electronic systems. The output of an up/down counter may be used to set another parameter that effects the performance of the cyclical electronic system in order to enhance the performance of the cyclical electronic system.
    Type: Application
    Filed: August 3, 2011
    Publication date: February 9, 2012
    Applicant: Microsemi Corporation
    Inventors: Charles Coleman, Sam Seiichiro Ochi, Ernest H. Wittenbreder, JR., Yeshoda Yedevelly
  • Publication number: 20110204923
    Abstract: Methods, systems, and devices are described for providing voltage comparison adapted to operate at high-speeds and over a relatively large range of supply voltages.
    Type: Application
    Filed: January 24, 2011
    Publication date: August 25, 2011
    Applicant: ASIC ADVANTAGE INC.
    Inventor: Sam Seiichiro Ochi
  • Patent number: 7956491
    Abstract: Methods, systems, and devices are described for integrating multiple transformers on a shared core, while avoiding interference between the transformers and other potentially undesirable effects of the integration. In one embodiment, multiple transformers are wound on a shared core. Each transformer is wound on the core, so that its primary and secondary windings are magnetically coupled to each other through the core without being coupled to the windings of other transformers sharing the core. The multiple integrated transformers may then be provided in a circuit arrangement by placing only a single core element in the arrangement.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: June 7, 2011
    Assignee: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Ernest Henry Wittenbreder, Jr.
  • Patent number: 7911255
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: March 22, 2011
    Assignee: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20110032731
    Abstract: Methods, systems, and devices are described for using isolated and non-isolated circuit structures and control methods for achieving multiple independently regulated input and output parameters using a single, simple, primary magnetic circuit element. For example, structures and methods are revealed for achieving single-stage power factor correction with high power factor and multiple independently regulated outputs using a single, simple, primary magnetic circuit element. Other structures and methods are revealed for achieving multiple independently regulated outputs without power factor correction using a single primary magnetic circuit element for both isolated and non-isolated power conversion applications.
    Type: Application
    Filed: August 4, 2010
    Publication date: February 10, 2011
    Applicant: ASIC Advantage Inc.
    Inventors: Charles Coleman, George Rasko, Sam Seiichiro Ochi, Ernest H. Wittenbreder, JR.
  • Publication number: 20100315150
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Application
    Filed: July 21, 2010
    Publication date: December 16, 2010
    Applicant: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20100225277
    Abstract: Methods, systems, and devices are described for described for providing control circuitry for use with battery packs. Embodiments optimize charging and discharging cycles to mitigate overcharging, over-discharging, and/or overheating individual cells in a battery pack. For example, embodiments allow for full discharging of battery packs (i.e., bringing the battery pack and its individual cells closer to their minimum voltages without going below) and full charging of battery packs (i.e., charging each cell of the battery pack closer to their maximum voltages without exceeding). Further, some embodiments include a substantially lossless, bi-directional DC-to-DC converter for facilitating ultra-fast charging of battery packs (e.g., at greater than 10C charge rates) without overheating or overcharging the individual cells of the battery packs.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 9, 2010
    Applicant: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Pierre R. Irissou, Charles Coleman
  • Patent number: 7782115
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Grant
    Filed: April 10, 2009
    Date of Patent: August 24, 2010
    Assignee: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20100049454
    Abstract: Methods, systems, and devices are described for providing fault monitoring for light emitting diode (LED) circuits. Embodiments receive an indication from a fault control module that a fault has occurred in a portion of an LED module (e.g., a series string of LEDs). The fault may represent an open fault or a closed fault condition. In some embodiments, a monitoring module receives the fault indication and generates a further representation that the fault has occurred (e.g., for use by external components or systems). In other embodiments, the monitoring module in configured to further indicate which in the LED module has failed, and/or in what fault condition (e.g., open or closed).
    Type: Application
    Filed: August 21, 2009
    Publication date: February 25, 2010
    Applicant: ASIC Advanatage Inc.
    Inventors: Pierre R. Irissou, Stephane LeGoff, Sam Seiichiro Ochi, Etienne Colmet-Daage
  • Publication number: 20090295228
    Abstract: Methods, systems, and devices are described for auxiliary power with low standby power consumption. Switching power converters typically include a switching power element (e.g., a power transistor), driven by a switching controller (e.g., including a gate driver). The power output of the switching power converter may be a function of the switching signal provided by the switching controller. For example, a pulse-width modulated (“PWM”) signal may be used to drive the switching power element, and the output of the switching controller may be adjusted by adjusting the frequency and/or duty cycle of the PWM signal. Embodiments implement cycle extension techniques to effectively extend a portion of the PWM signal to generate additional charge. The additional charge may be used to power an auxiliary power unit. The auxiliary power unit may then be used to drive the switching controller and/or to provide a source of power for other internal or external components.
    Type: Application
    Filed: May 27, 2009
    Publication date: December 3, 2009
    Applicant: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20090256617
    Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.
    Type: Application
    Filed: April 10, 2009
    Publication date: October 15, 2009
    Applicant: ASIC Advantage Inc.
    Inventor: Sam Seiichiro Ochi
  • Publication number: 20090243683
    Abstract: Methods, systems, and devices are described for providing a communication system for handling pulse information. Embodiments of the invention provide a pulse shaping unit operable to avoid saturation of the pulse transformer, while being easily incorporated into IC processes. Some embodiments of the pulse shaping unit provide a two-to-three level driver unit for converting a two-level input voltage signal to a three-level driver signal for driving a pulse transformer. Other embodiments of the pulse shaping unit provide components configured to differentially drive a pulse transformer, effectively converting a two-level input voltage signal to a three-level driver signal.
    Type: Application
    Filed: April 1, 2009
    Publication date: October 1, 2009
    Applicant: ASIC Advantage, Inc.
    Inventors: Sam Seiichiro Ochi, Charles Coleman
  • Publication number: 20090230776
    Abstract: Methods, systems, and devices are described for integrating multiple transformers on a shared core, while avoiding interference between the transformers and other potentially undesirable effects of the integration. In one embodiment, multiple transformers are wound on a shared core. Each transformer is wound on the core, so that its primary and secondary windings are magnetically coupled to each other through the core without being coupled to the windings of other transformers sharing the core. The multiple integrated transformers may then be provided in a circuit arrangement by placing only a single core element in the arrangement.
    Type: Application
    Filed: March 16, 2009
    Publication date: September 17, 2009
    Applicant: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Ernest Henry Wittenbreder, JR.
  • Patent number: 7449896
    Abstract: A circuit for sensing a current includes a first upper resistor having a first end coupled to a first end of a sense resistor, the sense resistor being configured to receive an input current. A second upper resistor has a first end coupled to a second end of the sense resistor, so that the sense resistor defines a first potential between the first and second ends of the sense resistor. A first lower resistor is provided between the first upper resistor and the ground. A second lower resistor is provided between the second upper resistor and the ground. An amplifier has a first input node and a second input node, the first input node being coupled to a node between the first upper resistor and the first lower resistor. The second input node is coupled to a node between the to the second upper resistor and the second lower resistor. The first and second input nodes defines a second potential corresponding to the first potential.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: November 11, 2008
    Assignee: IXYS Corporation
    Inventor: Sam Seiichiro Ochi