Patents by Inventor Samantha SiamHwa Tan

Samantha SiamHwa Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220235464
    Abstract: A method for depositing carbon on a substrate in a processing chamber includes arranging the substrate on a substrate support in the processing chamber. The substrate includes a carbon film having a first thickness formed on at least one underlying layer of the substrate. The method further includes performing a first etching step to etch the substrate to form features on the substrate, remove portions of the carbon film, and decrease the first thickness of the carbon film, selectively depositing carbon onto remaining portions of the carbon film, and performing at least one second etching step to etch the substrate to complete the forming of the features on the substrate.
    Type: Application
    Filed: June 22, 2020
    Publication date: July 28, 2022
    Inventors: Awnish GUPTA, Adrien LAVOIE, Bart J. VAN SCHRAVENDIJK, Samantha SiamHwa TAN
  • Publication number: 20220208555
    Abstract: A method for selectively etching a first region of a structure with respect to a second region of the structure is provided. The method comprises at least one cycle. Each cycle comprises selectively depositing an inhibitor layer on the first region of the structure, providing an atomic layer deposition over the structure, wherein the atomic layer deposition selectively deposits a mask on the second region of the structure with respect to the inhibitor layer, and selectively etching the first region of the structure with respect to the mask. The selectively depositing an inhibitor layer on the first region of the structure comprises providing an inhibitor layer gas and forming the inhibitor layer gas into inhibitor layer radicals, wherein the inhibitor layer radicals selectively deposit on the first region of the structure with respect to the second region of the structure.
    Type: Application
    Filed: June 25, 2020
    Publication date: June 30, 2022
    Inventors: Younghee LEE, Daniel PETER, Samantha SiamHwa TAN, Yang PAN
  • Publication number: 20220199422
    Abstract: A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.
    Type: Application
    Filed: April 27, 2020
    Publication date: June 23, 2022
    Inventors: Wenbing YANG, Mohand BROURI, Samantha SiamHwa TAN, Shih-Ked LEE, Yiwen FAN, Wook CHOI, Tamal MUKHERJEE, Ran LIN, Yang PAN
  • Publication number: 20220199417
    Abstract: Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral etching of the sidewalls of the feature. With each optional iteration of (b), the deposited amorphous carbon liner on the sidewalls of the feature is replenished.
    Type: Application
    Filed: March 16, 2020
    Publication date: June 23, 2022
    Inventors: Jon HENRI, Karthik S. COLINJIVADI, Francis Sloan ROBERTS, Kapu Sirish REDDY, Samantha SiamHwa TAN, Shih-Ked LEE, Eric HUDSON, Todd SHROEDER, Jialing YANG, Huifeng ZHENG
  • Publication number: 20220181147
    Abstract: A method for depositing a carbon ashable hard mask layer on a substrate includes a) arranging a substrate in a processing chamber; b) setting chamber pressure in a predetermined pressure range; c) setting a substrate temperature in a predetermined temperature range from ?20° C. to 200° C.; d) supplying a gas mixture including hydrocarbon precursor and one or more other gases; and e) striking plasma by supplying RF plasma power for a first predetermined period to deposit a carbon ashable hard mask layer on the substrate.
    Type: Application
    Filed: March 18, 2020
    Publication date: June 9, 2022
    Inventors: Jun XUE, Mary Anne MANUMPIL, Shih-Ked LEE, Samantha SiamHwa TAN
  • Patent number: 11355353
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by providing a substrate having a plurality of protruding tin oxide features (mandrels) residing on an exposed etch stop layer. Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrel (e.g., leaving at least 50%, such as at least 90% of initial height at the sidewall). Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning the etch stop layer and underlying layers.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: June 7, 2022
    Assignee: Lam Research Corporation
    Inventors: Jengyi Yu, Samantha SiamHwa Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Publication number: 20220122848
    Abstract: A method for selectively etching a silicon oxide region with respect to a lower oxygen silicon containing region is provided. A sacrificial mask selectively deposited on the lower oxygen silicon containing region with respect to the silicon oxide region. An atomic layer etch selectively etches the silicon oxide region with respect to the sacrificial mask on the lower oxygen silicon containing region.
    Type: Application
    Filed: February 11, 2020
    Publication date: April 21, 2022
    Inventors: Daniel PETER, Da LI, Jengyi YU, Alexander KABANSKY, Katie NARDI, Samantha SiamHwa TAN, Younghee LEE
  • Publication number: 20220037132
    Abstract: A method for cleaning surfaces of a substrate processing chamber includes a) supplying a first gas selected from a group consisting of silicon tetrachloride (SiCU4), carbon tetrachloride (CCI4), a hydrocarbon (CxHy where x and y are integers) and molecular chlorine (CI2), boron trichloride (BCI3), and thienyl chloride (SOCI2); b) striking plasma in the substrate processing chamber to etch the surfaces of the substrate processing chamber; c) extinguishing the plasma and evacuating the substrate processing chamber; d) supplying a second gas including fluorine species; e) striking plasma in the substrate processing chamber to etch the surfaces of the substrate processing chamber; and f) extinguishing the plasma and evacuating the substrate processing chamber.
    Type: Application
    Filed: October 3, 2019
    Publication date: February 3, 2022
    Inventors: Jengyi YU, Samantha SiamHwa TAN, Seongjun HEO, Ge YUAN, Siva Krishnan KANAKASABAPATHY
  • Publication number: 20220020584
    Abstract: Dry development of resists can be useful, for example, to form a patterning mask in the context of high-resolution patterning. Dry development may be advantageously accomplished by a method of processing a semiconductor substrate including providing in a process chamber a photopatterned resist on a substrate layer on a semiconductor substrate, and dry developing the photopatterned resist by removing either an exposed portion or an unexposed portion of the resist by a dry development process comprising exposure to a chemical compound to form a resist mask. The resist may be an EUV-sensitive organo-metal oxide or organo-metal-containing thin film EUV resist.
    Type: Application
    Filed: December 19, 2019
    Publication date: January 20, 2022
    Applicant: Lam Research Corporation
    Inventors: Boris Volosskiy, Timothy William Weidman, Samantha SiamHwa Tan, Chenghao Wu, Kevin Gu
  • Publication number: 20210335626
    Abstract: A method for selectively etching layers of a first material with respect to layers of a second material in a stack is provided. The layers of the first material are partially etched with respect to the layers of the second material. A deposition layer is selectively deposited on the stack, wherein portions of the deposition layer covering the layers of the second material are thicker than portions covering the layers of the first material, the selective depositing comprising providing a first reactant, purging some of the first reactant, wherein some undeposited first reactant is not purged, and providing a second reactant, wherein the undeposited first reactant combines with the second reactant and selectively deposits on the layers of the second material with respect to the layers of the first material. The layers of the first material are selectively etched with respect to the layers of the second material.
    Type: Application
    Filed: September 26, 2019
    Publication date: October 28, 2021
    Inventors: Jun XUE, Samantha SiamHwa TAN, Mohand BROURI, Yuanhui LI, Daniel PETER, Alexander KABANSKY
  • Publication number: 20210272814
    Abstract: A method for selectively etching silicon germanium with respect to silicon in a stack on a chuck in an etch chamber is provided. The chuck is maintained at a temperature below 15° C. The stack is exposed to an etch gas comprising a fluorine containing gas to selectively etch silicon germanium with respect to silicon.
    Type: Application
    Filed: July 12, 2019
    Publication date: September 2, 2021
    Inventors: Daniel PETER, Jun XUE, Samantha SiamHwa TAN, Yang PAN, Younghee LEE, Alexander KABANSKY
  • Publication number: 20210242032
    Abstract: Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.
    Type: Application
    Filed: August 19, 2019
    Publication date: August 5, 2021
    Inventors: Karthik S. COLINJIVADI, Samantha SiamHwa TAN, Shih-Ked LEE, George MATAMIS, Yongsik YU, Yang PAN, Patrick VAN CLEEMPUT, Akhil SINGHAL, Juwen GAO, Raashina HUMAYUN
  • Publication number: 20210005472
    Abstract: A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below ?20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.
    Type: Application
    Filed: March 12, 2019
    Publication date: January 7, 2021
    Inventors: Keren J. KANARIK, Samantha SiamHwa TAN, Yang PAN, Jeffrey MARKS
  • Patent number: 10515816
    Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: December 24, 2019
    Assignee: Lam Research Corporation
    Inventors: Keren Jacobs Kanarik, Jeffrey Marks, Harmeet Singh, Samantha SiamHwa Tan, Alexander Kabansky, Wenbing Yang, Taeseung Kim, Dennis M. Hausmann, Thorsten Lill
  • Publication number: 20190237341
    Abstract: Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by providing a substrate having a plurality of protruding tin oxide features (mandrels) residing on an exposed etch stop layer. Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrel (e.g., leaving at least 50%, such as at least 90% of initial height at the sidewall). Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning the etch stop layer and underlying layers.
    Type: Application
    Filed: January 29, 2019
    Publication date: August 1, 2019
    Inventors: Jengyi Yu, Samantha SiamHwa Tan, Seongjun Heo, Boris Volosskiy, Sivananda Krishnan Kanakasabapathy, Richard Wise, Yang Pan, Hui-Jung Wu
  • Publication number: 20190139778
    Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.
    Type: Application
    Filed: December 14, 2018
    Publication date: May 9, 2019
    Inventors: Keren Jacobs Kanarik, Jeffrey Marks, Harmeet Singh, Samantha SiamHwa Tan, Alexander Kabansky, Wenbing Yang, Taeseung Kim, Dennis M. Hausmann, Thorsten Lill