Abstract: A semiconductor apparatus includes an internal dock generating circuit, a stop controlling circuit, and a data dock generating circuit. The internal clock generating circuit generates, based on a reference clock signal, a plurality of internal clock signals. The stop controlling circuit generates a stop signal and a dock level signal based on the reference clock signal and the plurality of internal clock signals. The data clock generating circuit generates a data clock signal and a complementary data clock signal based on the plurality of internal clock signals, the stop signal, and the clock level signal.

Abstract: A method of forming a power semiconductor device is provided. The method includes the step of providing a semiconductor substrate. The semiconductor substrate has an active region and a termination region surrounding the active region. An epitaxial layer is disposed on the semiconductor substrate. The etching process is conducted to the epitaxial layer to form a first trench and a second trench. The first trench is disposed at the active region and the second trench is disposed at the termination region. A second trench width of the second trench is less than a first trench width of the first trench. An oxidation process is conducted to form a dielectric structure. The dielectric structure has a first dielectric layer disposed on the first trench and a dielectric area fully covers a trench area of the second trench.

Abstract: A display device includes: a plurality of pixel blocks each including a plurality of pixels; a scan driver supplying a scan signal to the scan lines and to supply a control signal to the control lines; a data driver supplying an image data voltage or a low grayscale data voltage to the data lines; and a power supply supplying a reference voltage to the pixels, wherein the pixels are configured to receive the image data voltage during a first scan period of a frame, and to receive the low grayscale data voltage during a second scan period of the frame, and the reference voltage supplied to a first pixel row of at least one of the pixel blocks in the first scan period is different from the reference voltage supplied to a last pixel row of at least one of the pixel blocks in the first scan period.

Abstract: Disclosed herein are an apparatus for analyzing non-informative firmware and a method using the apparatus. The method includes detecting a target instruction for firmware analysis in a memory map in non-informative firmware, generating an analysis list based on memory map information corresponding to the target instruction, and generating a visualized analysis result corresponding to the firmware by grouping the entries of the analysis list by preset reference bytes.

Abstract: An image sensor is provided. The image sensor includes a substrate including a plurality of unit pixels, each of unit pixels includes a photoelectric conversion element; a first trench formed in the substrate in a lattice shape to isolate the plurality of unit pixels; a plurality of first capacitor structures extended along a sidewall of the first trench in the first trench, including a first electrode, a second electrode, and a first dielectric layer between the first electrode and the second electrode; and a first capacitor isolation pattern at a lattice point of the first trench to isolate the plurality of first capacitor structures.

Abstract: A display device includes a processor which supplies grayscale data in active periods of frame periods and stops supply of the grayscale data in blank periods of the frame periods, a timing controller which generates a change signal when a difference between a first blank period of a first frame period and a second blank period of a second frame period is greater than a threshold value, a power supply which supplies a first power voltage having a voltage level changed based on the change signal to a first power line, and pixels commonly connected to the first power line.

Abstract: A display device, includes: a scan driver configured to sequentially supply scan signals having a turn-on level to the first scan line and the second scan line during a first period and to concurrently supply scan signals having a turn-on level to the first scan line and the second scan line during a second period after the first period, wherein: a mask period corresponds to a difference between a start point of the second period and a start point of the first period in a next frame period, a first frame period and a second frame period have different mask periods, a third frame period between the first frame period and the second frame period has a same mask period as the first frame period, and a fourth frame period between the first frame period and the second frame period has a same mask period as the second frame period.

Abstract: A power voltage generator includes a booster, a voltage sensor, a constant voltage controller and a constant current controller. The booster is configured to boost an input voltage to an output voltage based on an on-off operation of a switch. The voltage sensor is configured to generate a sensing voltage by sensing the output voltage. The constant voltage controller is configured to generate a first switching signal to control the switch by comparing the sensing voltage with a reference voltage. The constant current controller is configured to generate a gain based on a ratio of an electrode signal of the switch and a target signal by comparing the electrode signal of the switch with the target signal.

Abstract: The present exemplary embodiments propose a LIDAR sensor including: a transmission/reception module which transmits transmission light and receives reception light reflected from an object and includes a shielding assembly unit located between a path through which the transmission light moves and a path through which the reception light moves, a reflector assembly which has an empty space to assemble the transmission/reception module at one side, receives the transmission light from the transmission/reception module to reflect the transmission light toward the object and transmits the reception light reflected from the object to the transmission/reception module, a rotary module which rotates the transmission/reception module, and a fixing module which supports the transmission/reception module and the rotary module.

Abstract: The present exemplary embodiments propose a LIDAR sensor including: a transmission/reception module which transmits transmission light and receives reception light reflected from an object and removes transmission light or reception light moving in a predetermined direction, a reflector assembly which has an empty space to assemble the transmission/reception module at one side, receives the transmission light from the transmission/reception module to reflect the transmission light toward the object and transmits the reception light reflected from the object to the transmission/reception module, a rotary module which is connected to a lower portion of the transmission/reception module and generates a torque to be implemented to be rotatable, and a fixing module which supports the transmission/reception module and the rotary module.

Abstract: The present exemplary embodiments propose a LIDAR sensor including: a transmission/reception module which transmits transmission light and receives reflection light reflected from an object; a reflector assembly which has an empty space to assemble the transmission/reception module at one side, receives the transmission light from the transmission/reception module to reflect the transmission light toward the object and transmits the reception light reflected from the object to the transmission/reception module, a rotary module assembly which rotates the transmission/reception module and generates an RPM and a rotation angle based on a light reception amount of the reflection light which is received by a sensor unit by reflecting the transmitted light; and a fixing module which supports the transmission/reception module and the rotary module.

Abstract: A semiconductor device includes a plurality of active fins defined by an isolation layer on a substrate, a gate structure on the active fins and the isolation layer, and a gate spacer structure covering a sidewall of the gate structure. A sidewall of the gate structure includes first, second, and third regions having first, second, and third slopes, respectively. The second slope increases from a bottom toward a top of the second region. The second slope has a value at the bottom of the second region less than the first slope. The third slope is greater than the second slope.

Abstract: A semiconductor apparatus includes an internal dock generating circuit, a stop controlling circuit, and a data dock generating circuit. The internal clock generating circuit generates, based on a reference clock signal, a plurality of internal clock signals. The stop controlling circuit generates a stop signal and a dock level signal based on the reference clock signal and the plurality of internal clock signals. The data clock generating circuit generates a data clock signal and a complementary data clock signal based on the plurality of internal clock signals, the stop signal, and the clock level signal.

Abstract: Disclosed herein is an insulating bushing adapted to protect a busbar and having improved waterproof performance. The insulating bushing includes: a first bushing provided with a first bushing passage through which the busbar passes; a second bushing provided with a first bushing-receiving portion receiving an upper portion of the first bushing inserted through a lower portion of the first bushing-receiving portion and a second bushing passage through which the busbar passes; and a cover coupled to an outer surface of the second bushing and provided with a cover passage through which the busbar passes.

Abstract: A semiconductor package capable of reducing or preventing cracks from occurring in a conductive bump and a method for manufacturing the same. The semiconductor package includes a semiconductor chip; a first conductive bump; a first re-distribution layer which is provided between the semiconductor chip and the first conductive bump and electrically connects the semiconductor chip and the first conductive bump; and a buffer structure which formed to fill up a space between a side surface of the first conductive bump and one surface of the first re-distribution layer, in which the buffer structure includes a plurality of pores.

Abstract: A color filter is disposed on a substrate. An organic photodiode is disposed on the color filter. The organic photodiode includes an electrode insulating layer having a recess region on the substrate, a first electrode on the color filter, the first electrode filling the recess region of the electrode insulating layer, a second electrode on the first electrode, and an organic photoelectric conversion layer interposed between the first electrode and the second electrode. The first electrode includes a seam extending at a first angle from a side surface of the recess region of the electrode insulating layer.

Abstract: A display device includes a processor which supplies grayscale data in active periods of frame periods and stops supply of the grayscale data in blank periods of the frame periods, a timing controller which generates a change signal when a difference between a first blank period of a first frame period and a second blank period of a second frame period is greater than a threshold value, a power supply which supplies a first power voltage having a voltage level changed based on the change signal to a first power line, and pixels commonly connected to the first power line.

Abstract: An image sensor and a method of fabricating the image sensor, the image sensor including a semiconductor substrate having a first floating diffusion region, a molding pattern over the first floating diffusion region and including an opening, a first photoelectric conversion part at a surface of the semiconductor substrate, and a first transfer transistor connecting the first photoelectric conversion part to the first floating diffusion region. The first transfer transistor includes a channel pattern in the opening and a first transfer gate electrode. The channel pattern includes an oxide semiconductor. The channel pattern also includes a sidewall portion that covers a side surface of the opening, and a center portion that extends from the sidewall portion to a region over the first transfer gate electrode.

Abstract: Disclosed herein are an apparatus and method for extracting memory map information from firmware. The apparatus includes one or more processors and executable memory for storing at least one program executed by the one or more processors. The at least one program retrieves memory-related data from firmware, sets a data structure by analyzing binary code based on the memory-related data, and retrieves a memory map structure from the firmware using the data structure.

Abstract: Disclosed herein are an apparatus and method for verifying the integrity of a hardware board. The apparatus includes one or more processors and execution memory for storing at least one program that is executed by the processors, wherein the program is configured to compare images of components arranged on a verification target board and a source board in a first image, obtained by photographing the verification target board, and in a second image prestored for the source board, as to whether images of the components are identical to each other, and compare first firmware extracted from the verification target board with second firmware of the source board, as to whether first firmware is identical to second firmware and verify integrity of the verification target board based on whether the images are identical to each other and on whether the pieces of firmware are identical to each other.