Patents by Inventor Sanjay Patel

Sanjay Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240160353
    Abstract: Aspects relate to Input/Output (IO) Memory Management Units (MMUs) that include hardware structures for implementing virtualization. Some implementations allow guests to setup and maintain device IO tables within memory regions to which those guests have been given permissions by a hypervisor. Some implementations provide hardware page table walking capability within the IOMMU, while other implementations provide static tables. Such static tables may be maintained by a hypervisor on behalf of guests. Some implementations reduce a frequency of interrupts or invocation of hypervisor by allowing transactions to be setup by guests without hypervisor involvement within their assigned device IO regions. Devices may communicate with IOMMU to setup the requested memory transaction, and completion thereof may be signaled to the guest without hypervisor involvement. Various other aspects will be evident from the disclosure.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 16, 2024
    Inventors: Sanjay Patel, Ranjit J. Rozario
  • Patent number: 11972302
    Abstract: Certain aspects of the present disclosure provide techniques for processing computing resource access requests from users of an application service. An example method generally includes measuring computing resource access metrics over a time window for a user of a computing system. The measured computing access metrics for the user of the computing system are determined to exceed a threshold. Based on determining that the measured computing access metrics for the user of the computing system exceeds the threshold, computing resource access requests from the user of the computing system are migrated from a first queue to a second queue, wherein the first queue comprises a rate-unlimited queue and the second queue comprises a rate-controlled queue having a defined rate for processing received requests. Computing resource access requests from the user of the computing system are processed based on the defined rate for processing received requests.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: April 30, 2024
    Assignee: Intuit Inc.
    Inventors: Anjaneya Murthy Gabbiti, Fan Li Gabbett, Apurva Patel, Sujay Sundaram, Ajith Kuttappan Rajeswari, Sanjay Channarayapatna Ramakrishna
  • Publication number: 20240130492
    Abstract: An umbrella case configured to hold an umbrella having a rigid shaft with a handle at one end and a spike at the other end, the umbrella case comprising an umbrella holding assembly comprising a generally tubular sheath 106 having an open end and a spike-receiving portion 107 defining a spike-receiving aperture at the other end, and a fastening strap 100 having a first end coupled to an outer surface of the umbrella case, close to the open end of the sheath 106, and having a second, free end configured to be selectively moved to a fastening position in which it is connected to the umbrella case at a generally diametrically opposite location to the first end, the sheath, the spike-receiving portion and the fastening strap when in the fastening position, together, defining the effective length of the umbrella holding assembly, wherein at least one of the sheath, the spike-receiving portion and the fastening strap is selectively longitudinally extendible upon application of a force, in use, thereby to increase t
    Type: Application
    Filed: September 7, 2020
    Publication date: April 25, 2024
    Inventors: Sanjay Patel, Rachel GRIMALDI
  • Publication number: 20240127029
    Abstract: Techniques for neural network processing using specialized data representation are disclosed. Input data for manipulation in a layer of a neural network is obtained. The input data includes image data, where the image data is represented in bfloat16 format without loss of precision. The manipulation of the input data is performed on a processor that supports single-precision operations. The input data is converted to a 16-bit reduced floating-point representation, where the reduced floating-point representation comprises an alternative single-precision data representation mode. The input data is manipulated with one or more 16-bit reduced floating-point data elements. The manipulation includes a multiply and add-accumulate operation. The manipulation further includes a unary operation, a binary operation, or a conversion operation. A result of the manipulating is forwarded to a next layer of the neural network.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 18, 2024
    Inventor: Sanjay Patel
  • Patent number: 11907542
    Abstract: Aspects relate to Input/Output (IO) Memory Management Units (MMUs) that include hardware structures for implementing virtualization. Some implementations allow guests to setup and maintain device IO tables within memory regions to which those guests have been given permissions by a hypervisor. Some implementations provide hardware page table walking capability within the IOMMU, while other implementations provide static tables. Such static tables may be maintained by a hypervisor on behalf of guests. Some implementations reduce a frequency of interrupts or invocation of hypervisor by allowing transactions to be setup by guests without hypervisor involvement within their assigned device IO regions. Devices may communicate with IOMMU to setup the requested memory transaction, and completion thereof may be signaled to the guest without hypervisor involvement. Various other aspects will be evident from the disclosure.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: February 20, 2024
    Assignee: MIPS Tech, LLC
    Inventors: Sanjay Patel, Ranjit J. Rozario
  • Patent number: 11893470
    Abstract: Techniques for neural network processing using specialized data representation are disclosed. Input data for manipulation in a layer of a neural network is obtained. The input data includes image data, where the image data is represented in bfloat16 format without loss of precision. The manipulation of the input data is performed on a processor that supports single-precision operations. The input data is converted to a 16-bit reduced floating-point representation, where the reduced floating-point representation comprises an alternative single-precision data representation mode. The input data is manipulated with one or more 16-bit reduced floating-point data elements. The manipulation includes a multiply and add-accumulate operation. The manipulation further includes a unary operation, a binary operation, or a conversion operation. A result of the manipulating is forwarded to a next layer of the neural network.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: February 6, 2024
    Assignee: MIPS Tech, LLC
    Inventor: Sanjay Patel
  • Patent number: 11863405
    Abstract: A method for providing individualized communication service includes (1) recognizing a first client being communicatively coupled to a first local communication network, (2) determining an identity of the first client, (3) transporting first data between the first client and a first operator communication network, using the first local communication network in accordance with a first service profile associated with the first client, and (4) transporting the first data using the first operator communication network in accordance with the first service profile.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: January 2, 2024
    Assignee: Cable Television Laboratories, Inc.
    Inventors: Brian A. Scriber, Brian Stahlhammer, Darshak Thakore, Martha Lurie Lyons, Sanjay Patel, Stephen Arendt, Anju Ahuja
  • Patent number: 11829764
    Abstract: Techniques are disclosed for address manipulation using indices and tags. A first index is generated from bits of a processor program counter, where the first index is used to access a branch predictor bimodal table. A first branch prediction is provided from the bimodal table, based on the first index. The first branch prediction is matched against N tables, where the tables contain prior branch histories, and where: the branch history in table T(N) is of greater length than the branch history of table T(N-1), and the branch history in table T(N-1) is of greater length than the branch history of table T(N-2). A processor address is manipulated using a greatest length of hits of branch prediction matches from the N tables, based on one or more hits occurring. The branch predictor address is manipulated using the first branch prediction from the bimodal table, based on zero hits occurring.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: November 28, 2023
    Assignee: MIPS Tech, LLC
    Inventors: Parthiv Pota, Sanjay Patel, Raj Kumar Singh Parihar
  • Patent number: 11731464
    Abstract: It is provided a pneumatic tyre, the tyre having a circumferential direction, an axial direction and an equatorial plane, and the tyre comprising: a tread extending in a tyre circumferential direction, said tread comprising at least one circumferential groove running continuously in the circumferential direction, and a plurality of axial grooves or transverse grooves running at an angle to the axial direction, and a plurality of blocks defined by the circumferential groove and the axial grooves or transverse grooves, said blocks extending radially between an inner surface of the tread and a tread surface to come into contact with the ground, wherein at least some of the blocks comprise at least one wavy groove that extends from a circumferential groove inwardly into the block, and wherein the wavy groove has a depth extending radially from the tread surface to come into contact with the ground towards the inner surface that ends above the inner surface (26) of the tread.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: August 22, 2023
    Assignee: Apollo Tyres Global R&D B.V.
    Inventors: Mihar Ved, Sanjay Patel, Jelin Fatima, Marko Veselinovic
  • Publication number: 20230245453
    Abstract: Systems and methods for estimation of vehicle hitchball location are disclosed. A plurality of image frames may be received from a rear-facing camera of a vehicle. The rear-facing camera may be directed at a front of a trailer that is coupled to the vehicle at a hitchball. An approximate lateral location of the hitchball coupled to the vehicle may be determined by obtaining a plurality of cropped images along a hitch drawbar coupled to the vehicle by stepping along the vertical direction, and performing a stepwise lateral scan, centered at the hitch drawbar.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 3, 2023
    Applicant: Ford Global Technologies, LLC
    Inventors: Saeid Nooshabadi, Yongbo Qian, Vijay Nagasamy, Gurjeet Singh, Manan Sanjay Patel, Ali Mustafa
  • Publication number: 20230237325
    Abstract: Techniques for mixed-precision data manipulation for neural network data computation are disclosed. A first left group comprising eight bytes of data and a first right group of eight bytes of data are obtained for computation using a processor. A second left group comprising eight bytes of data and a second right group of eight bytes of data are obtained. A sum of products is performed between the first left and right groups and the second left and right groups. The sum of products is performed on bytes of 8-bit integer data. A first result is based on a summation of eight values that are products of the first group’s left eight bytes and the second group’s left eight bytes. A second result is based on the summation of eight values that are products of the first group’s left eight bytes and the second group’s right eight bytes. Results are output.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 27, 2023
    Inventors: James Hippisley Robinson, Sanjay Patel
  • Publication number: 20230226252
    Abstract: Embodiments of the invention provide compositions including bio degradable polymers, medical implants fabricated from these compositions and methods of using such implants. Many embodiments provide medical implants comprising a first polymer backbone having a first rate of biodegradation and a second polymer backbone having a second rate of biodegradation faster than the first rate. In some embodiments, the second backbone is configured to be replaced by a natural tissue layer. The first backbone provides a scaffold for the implant while the second backbone degrades. This scaffold can enhance mechanical properties of the implant including various aspects of mechanical strength such as tensile, bending, hoop and yield strength; and elasticity. The scaffold also serves to maintain a minimum level of structural support of the implant during the period of degradation of the second backbone or for the entire life of the implant so that the implant does not mechanically fail.
    Type: Application
    Filed: March 22, 2023
    Publication date: July 20, 2023
    Inventors: Mir IMRAN, Sanjay PATEL, Joel HARRIS
  • Publication number: 20230205534
    Abstract: Techniques are disclosed for address manipulation using indices and tags. A first index is generated from bits of a processor program counter, where the first index is used to access a branch predictor bimodal table. A first branch prediction is provided from the bimodal table, based on the first index. The first branch prediction is matched against N tables, where the tables contain prior branch histories, and where: the branch history in table T(N) is of greater length than the branch history of table T(N-1), and the branch history in table T(N-1) is of greater length than the branch history of table T(N-2). A processor address is manipulated using a greatest length of hits of branch prediction matches from the N tables, based on one or more hits occurring. The branch predictor address is manipulated using the first branch prediction from the bimodal table, based on zero hits occurring.
    Type: Application
    Filed: March 7, 2023
    Publication date: June 29, 2023
    Inventors: Parthiv Pota, Sanjay Patel, Raj Kumar Singh Parihar
  • Patent number: 11652711
    Abstract: A method for providing individualized communication service includes (1) recognizing a first client being communicatively coupled to a first local communication network, (2) determining an identity of the first client, (3) transporting first data between the first client and a first operator communication network, using the first local communication network in accordance with a first service profile associated with the first client, and (4) transporting the first data using the first operator communication network in accordance with the first service profile.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: May 16, 2023
    Assignee: Cable Television Laboratories, Inc.
    Inventors: Brian A. Scriber, Brian Stahlhammer, Darshak Thakore, Martha Lurie Lyons, Sanjay Patel, Stephen Arendt, Anju Ahuja
  • Patent number: 11642438
    Abstract: Embodiments of the invention provide compositions including bio degradable polymers, medical implants fabricated from these compositions and methods of using such implants. Many embodiments provide medical implants comprising a first polymer backbone having a first rate of biodegradation and a second polymer backbone having a second rate of biodegradation faster than the first rate. In some embodiments, the second backbone is configured to be replaced by a natural tissue layer. The first backbone provides a scaffold for the implant while the second backbone degrades. This scaffold can enhance mechanical properties of the implant including various aspects of mechanical strength such as tensile, bending, hoop and yield strength; and elasticity. The scaffold also serves to maintain a minimum level of structural support of the implant during the period of degradation of the second backbone or for the entire life of the implant so that the implant does not mechanically fail.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: May 9, 2023
    Assignee: InCube Labs, LLC
    Inventors: Mir Imran, Sanjay Patel, Joel Harris
  • Patent number: 11635963
    Abstract: Techniques are disclosed for address manipulation using indices and tags. A first index is generated from bits of a processor program counter, where the first index is used to access a branch predictor bimodal table. A first branch prediction is provided from the bimodal table, based on the first index. The first branch prediction is matched against N tables, where the tables contain prior branch histories, and where: the branch history in table T(N) is of greater length than the branch history of table T(N-1), and the branch history in table T(N-1) is of greater length than the branch history of table T(N-2). A processor address is manipulated using a greatest length of hits of branch prediction matches from the N tables, based on one or more hits occurring. The branch predictor address is manipulated using the first branch prediction from the bimodal table, based on zero hits occurring.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: April 25, 2023
    Assignee: MIPS Tech, LLC
    Inventors: Parthiv Pota, Sanjay Patel, Raj Kumar Singh Parihar
  • Publication number: 20230105881
    Abstract: Aspects relate to Input/Output (IO) Memory Management Units (MMUs) that include hardware structures for implementing virtualization. Some implementations allow guests to setup and maintain device IO tables within memory regions to which those guests have been given permissions by a hypervisor. Some implementations provide hardware page table walking capability within the IOMMU, while other implementations provide static tables. Such static tables may be maintained by a hypervisor on behalf of guests. Some implementations reduce a frequency of interrupts or invocation of hypervisor by allowing transactions to be setup by guests without hypervisor involvement within their assigned device IO regions. Devices may communicate with IOMMU to setup the requested memory transaction, and completion thereof may be signaled to the guest without hypervisor involvement. Various other aspects will be evident from the disclosure.
    Type: Application
    Filed: December 9, 2022
    Publication date: April 6, 2023
    Inventors: Sanjay Patel, Ranjit J. ROZARIO
  • Patent number: 11615307
    Abstract: Techniques for mixed-precision data manipulation for neural network data computation are disclosed. A first left group comprising eight bytes of data and a first right group of eight bytes of data are obtained for computation using a processor. A second left group comprising eight bytes of data and a second right group of eight bytes of data are obtained. A sum of products is performed between the first left and right groups and the second left and right groups. The sum of products is performed on bytes of 8-bit integer data. A first result is based on a summation of eight values that are products of the first group's left eight bytes and the second group's left eight bytes. A second result is based on the summation of eight values that are products of the first group's left eight bytes and the second group's right eight bytes. Results are output.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: March 28, 2023
    Assignee: MIPS Tech, LLC
    Inventors: James Hippisley Robinson, Sanjay Patel
  • Publication number: 20230079292
    Abstract: A system and method are described herein for estimating power usage of various components of a CPU and controlling voltage regulators based on the estimated power usage. The power estimates may be based on digital power meter readings at each component, on voltage information from a voltage regulator, and on other power information. This power information is transmitted over a mesh interconnect disposed throughout the CPU such that power estimation can be accurately calculated and used to control voltage regulators without being limited by external bus speeds. More of the power management processes and components may be disposed on the CPU and connected to the mesh interconnect. These power management processes include various calibrations, adjustments, and limits so as efficiently manage and use the more rapidly processed power estimations.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Sarthak RAINA, Sanjay PATEL, Hoan TRAN, Mitrajit CHATTERJEE, Abhishek NIRAJ, Anuradha RAGHUNATHAN
  • Patent number: 11599270
    Abstract: Aspects relate to Input/Output (IO) Memory Management Units (MMUs) that include hardware structures for implementing virtualization. Some implementations allow guests to setup and maintain device IO tables within memory regions to which those guests have been given permissions by a hypervisor. Some implementations provide hardware page table walking capability within the IOMMU, while other implementations provide static tables. Such static tables may be maintained by a hypervisor on behalf of guests. Some implementations reduce a frequency of interrupts or invocation of hypervisor by allowing transactions to be setup by guests without hypervisor involvement within their assigned device IO regions. Devices may communicate with IOMMU to setup the requested memory transaction, and completion thereof may be signaled to the guest without hypervisor involvement. Various other aspects will be evident from the disclosure.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: March 7, 2023
    Inventors: Sanjay Patel, Ranjit J Rozario