Patents by Inventor Satoru Fujii
Satoru Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9252189Abstract: A nonvolatile semiconductor memory element includes: a variable resistance element including a first electrode, a variable resistance layer, and a second electrode, and having a resistance value which changes according to a polarity of an electric pulse applied between the first electrode and the second electrode; and a current steering element which is electrically connected to the variable resistance element, allows a current to flow bidirectionally, and has a nonlinear current-voltage characteristic. The current steering element (i) has a structure in which a first current steering element electrode, a first current steering layer, and a second current steering element electrode are stacked in this order, and (ii) includes a second current steering layer which covers side surfaces of the first current steering element electrode, the first current steering layer, and the second current steering element electrode.Type: GrantFiled: June 18, 2012Date of Patent: February 2, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Satoru Fujii, Kiyotaka Tsuji, Takumi Mikawa
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Patent number: 9236381Abstract: A nonvolatile memory element of the present invention comprises a first electrode (103), a second electrode (105), and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (104), a resistance value of the resistance variable layer varying reversibly according to an electric signal applied between the electrodes (103), (105), and the resistance variable layer (104) comprises at least a tantalum oxide, and is configured to satisfy 0<x<2.5 when the tantalum oxide is represented by TaOx.Type: GrantFiled: October 24, 2007Date of Patent: January 12, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Satoru Fujii, Takeshi Takagi, Shunsaku Muraoka, Koichi Osano, Kazuhiko Shimakawa
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Patent number: 9142765Abstract: A method of manufacturing a non-volatile memory element includes forming a first electrode; forming a variable resistance layer; and forming a second electrode. Forming the variable resistance layer includes forming a third metal oxide layer having a third metal oxide, forming a second metal oxide layer having a second metal oxide, and forming a first metal oxide layer e having a first metal oxide; wherein the variable resistance layer reversibly changes its resistance value in response to an electric signal applied between the first electrode and the second electrode; the first metal oxide is lower in degree of oxygen deficiency than the third metal oxide; the second metal oxide is lower in degree of oxygen deficiency than the third metal oxide; the third metal oxide is an oxygen-deficient metal oxide; and the first metal oxide layer is different in density from the second metal oxide layer.Type: GrantFiled: February 6, 2014Date of Patent: September 22, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Shinichi Yoneda, Satoru Ito, Satoru Fujii
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Patent number: 9082971Abstract: A variable resistance layer includes a first variable resistance layer comprising a first metal oxide that is oxygen deficient and a second variable resistance layer comprising a second metal oxide having a degree of oxygen deficiency that is different from that of the first metal oxide, wherein the second variable resistance layer includes a non-metal element A that is different from oxygen, x<(y+z) is satisfied where a composition of the first variable resistance layer is represented by MOx and a composition of the second variable resistance layer is represented by NOyAz, the second variable resistance layer has a higher resistivity than a resistivity of the first variable resistance layer, and a film density of the second variable resistance layer is lower than a theoretical film density of the second metal oxide which has a stoichiometric composition.Type: GrantFiled: February 13, 2013Date of Patent: July 14, 2015Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Satoru Fujii, Takumi Mikawa
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Patent number: 9012294Abstract: Each of the step of forming a first variable resistance layer (18a) and the step of forming a second variable resistance layer (18b) includes performing a cycle once or plural times, the cycle consisting of a first step of introducing a source gas composed of molecules containing atoms of a transition metal; a second step of removing the source gas after the first step; a third step of introducing a reactive gas to form a transition metal oxide after the second step; and a fourth step of removing the reactive gas after the third step. The step of forming the first variable resistance layer (18a) is performed in a state in which the substrate is kept at a temperature at which a self-decomposition reaction of the source gas does not occur.Type: GrantFiled: July 26, 2011Date of Patent: April 21, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Satoru Fujii, Takumi Mikawa, Haruyuki Sorada
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Patent number: 8999808Abstract: A nonvolatile memory element includes a first and a second electrode layers, and a variable resistance layer provided between the first and the second electrode layers and having a resistance value reversibly changing according to application of an electrical pulse, wherein the variable resistance layer includes a first variable resistance layer contacting the first electrode layer and comprising an oxygen-deficient first metal oxide, and a second variable resistance layer contacting the first variable resistance layer and comprising a second metal oxide having a smaller oxygen deficiency than the first metal oxide, and including host layers and an inserted layer between each of adjacent pairs of the host layers, wherein the second metal oxide of the inserted layer has a larger oxygen deficiency than the second metal oxide of the host layer, and the first metal oxide has a larger oxygen deficiency than the second metal oxide of the host layer.Type: GrantFiled: November 18, 2013Date of Patent: April 7, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Satoru Fujii, Takumi Mikawa
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Patent number: 8981333Abstract: Provided is a nonvolatile semiconductor memory device including a variable resistance element in which a parasitic resistance between the lower electrode and the variable resistance layer included in the variable resistance element is reduced. The nonvolatile semiconductor memory device includes: a substrate; and a variable resistance elementformed on the substrate, wherein the variable resistance elementincludes a lower electrode layer formed on the substrate, a variable resistance layer formed on the lower electrode layer, and an upper electrode layer formed on the variable resistance layer, the lower electrode layer includes at least a first conductive layer and a second conductive layer which is formed on the first conductive layer and is in contact with the variable resistance layer, and the first conductive layer includes an oxidatively degraded layer which is formed on an upper surface of the first conductive layer due to oxidization of the first conductive layer.Type: GrantFiled: October 10, 2012Date of Patent: March 17, 2015Assignee: Panasonic Intellectual Property Management, Co., Ltd.Inventors: Satoru Fujii, Satoru Ito, Takumi Mikawa
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Publication number: 20150035773Abstract: According to the present invention, a detection unit (110) detects a touch on an information processing device (100), and a control unit (120) performs control based on the touch detected by the detection unit (110), and ignores the result of a detection by the detection unit (110) in proportion to the time during which the location of the touch detected by the detection unit (110) does not change.Type: ApplicationFiled: November 28, 2012Publication date: February 5, 2015Inventor: Satoru Fujii
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Patent number: 8830730Abstract: A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate, (ii) a variable resistance element having: lower and upper electrodes; and a variable resistance layer whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes, and (iii) a MOS transistor formed on the substrate, wherein the variable resistance layer includes: oxygen-deficient transition metal oxide layers having compositions MOx and MOy (where x<y) and in contact with the electrodes respectively, a diffusion layer region is connected with the lower electrode to form a memory cell, the region serving as a drain upon application of a voltage signal which causes a resistance change to high resistance state in the variable resistance layer.Type: GrantFiled: September 6, 2013Date of Patent: September 9, 2014Assignee: Panasonic CorporationInventors: Shunsaku Muraoka, Yoshihiko Kanzawa, Satoru Mitani, Koji Katayama, Kazuhiko Shimakawa, Satoru Fujii, Takeshi Takagi
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Publication number: 20140225054Abstract: A method of manufacturing a non-volatile memory element includes forming a first electrode; forming a variable resistance layer; and forming a second electrode. Forming the variable resistance layer includes forming a third metal oxide layer having a third metal oxide, forming a second metal oxide layer having a second metal oxide, and forming a first metal oxide layer e having a first metal oxide; wherein the variable resistance layer reversibly changes its resistance value in response to an electric signal applied between the first electrode and the second electrode; the first metal oxide is lower in degree of oxygen deficiency than the third metal oxide; the second metal oxide is lower in degree of oxygen deficiency than the third metal oxide; the third metal oxide is an oxygen-deficient metal oxide; and the first metal oxide layer is different in density from the second metal oxide layer.Type: ApplicationFiled: February 6, 2014Publication date: August 14, 2014Applicant: PANASONIC CORPORATIONInventors: Shinichi YONEDA, Satoru ITO, Satoru FUJII
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Publication number: 20140225053Abstract: A variable resistance layer includes a first variable resistance layer comprising a first metal oxide that is oxygen deficient and a second variable resistance layer comprising a second metal oxide having a degree of oxygen deficiency that is different from that of the first metal oxide, wherein the second variable resistance layer includes a non-metal element A that is different from oxygen, x<(y+z) is satisfied where a composition of the first variable resistance layer is represented by MOx and a composition of the second variable resistance layer is represented by NOyAz, the second variable resistance layer has a higher resistivity than a resistivity of the first variable resistance layer, and a film density of the second variable resistance layer is lower than a theoretical film density of the second metal oxide which has a stoichiometric composition.Type: ApplicationFiled: February 13, 2013Publication date: August 14, 2014Applicant: Panasonic CorporationInventors: Satoru Fujii, Takumi Mikawa
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Patent number: 8779406Abstract: A nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer positioned between the first electrode and the second electrode. The variable resistance layer has a resistance state which reversibly changes based on an electrical signal applied between the first electrode and the second electrode. The variable resistance layer includes a first variable resistance layer having a first metal oxide and a second variable resistance layer having a second metal oxide. The second variable resistance layer includes a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide, and the second metal oxide has a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide.Type: GrantFiled: January 18, 2013Date of Patent: July 15, 2014Assignee: Panasonic CorporationInventors: Satoru Ito, Satoru Fujii, Shinichi Yoneda, Takumi Mikawa
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Publication number: 20140138599Abstract: A nonvolatile memory element includes a first and a second electrode layers, and a variable resistance layer provided between the first and the second electrode layers and having a resistance value reversibly changing according to application of an electrical pulse, wherein the variable resistance layer includes a first variable resistance layer contacting the first electrode layer and comprising an oxygen-deficient first metal oxide, and a second variable resistance layer contacting the first variable resistance layer and comprising a second metal oxide having a smaller oxygen deficiency than the first metal oxide, and including host layers and an inserted layer between each of adjacent pairs of the host layers, wherein the second metal oxide of the inserted layer has a larger oxygen deficiency than the second metal oxide of the host layer, and the first metal oxide has a larger oxygen deficiency than the second metal oxide of the host layer.Type: ApplicationFiled: November 18, 2013Publication date: May 22, 2014Applicant: Panasonic CorporationInventors: Satoru FUJII, Takumi MIKAWA
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Publication number: 20140021429Abstract: A nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer positioned between the first electrode and the second electrode. The variable resistance layer has a resistance state which reversibly changes based on an electrical signal applied between the first electrode and the second electrode. The variable resistance layer includes a first variable resistance layer having a first metal oxide and a second variable resistance layer having a second metal oxide. The second variable resistance layer includes a metal-metal bonding region including a metal bond of metal atoms included in the second metal oxide, and the second metal oxide has a low degree of oxygen deficiency and a high resistance value compared to the first metal oxide.Type: ApplicationFiled: January 18, 2013Publication date: January 23, 2014Inventors: Satoru Ito, Satoru Fujii, Shinichi Yoneda, Takumi Mikawa
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Publication number: 20140008599Abstract: A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate, (ii) a variable resistance element having: lower and upper electrodes; and a variable resistance layer whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes, and (iii) a MOS transistor formed on the substrate, wherein the variable resistance layer includes: oxygen-deficient transition metal oxide layers having compositions MOx and MOy (where x<y) and in contact with the electrodes respectively, a diffusion layer region is connected with the lower electrode to form a memory cell, the region serving as a drain upon application of a voltage signal which causes a resistance change to high resistance state in the variable resistance layer.Type: ApplicationFiled: September 6, 2013Publication date: January 9, 2014Applicant: Panasonic CorporationInventors: Shunsaku MURAOKA, Yoshihiko KANZAWA, Satoru MITANI, Koji KATAYAMA, Kazuhiko SHIMAKAWA, Satoru FUJII, Takeshi TAKAGI
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Publication number: 20130270510Abstract: A nonvolatile semiconductor memory element includes: a variable resistance element including a first electrode, a variable resistance layer, and a second electrode, and having a resistance value which changes according to a polarity of an electric pulse applied between the first electrode and the second electrode; and a current steering element which is electrically connected to the variable resistance element, allows a current to flow bidirectionally, and has a nonlinear current-voltage characteristic. The current steering element (i) has a structure in which a first current steering element electrode, a first semiconductor layer, and a second current steering element electrode are stacked in this order, and (ii) includes a second semiconductor layer which covers side surfaces of the first current steering element electrode, the first semiconductor layer, and the second current steering element electrode.Type: ApplicationFiled: June 18, 2012Publication date: October 17, 2013Inventors: Satoru Fujii, Kiyotaka Tsuji, Takumi Mikawa
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Patent number: 8553444Abstract: A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate (301), (ii) a variable resistance element (309) having: lower and upper electrodes (309a, 309c); and a variable resistance layer (309b) whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes (309a, 309c), and (iii) a MOS transistor (317) formed on the substrate (301), wherein the variable resistance layer (309b) includes: oxygen-deficient transition metal oxide layers (309b-1, 309b-2) having compositions MOX and MOy (where x<y) and in contact with the electrodes (309a, 309c) respectively, and a diffusion layer region (302b) is connected with the lower electrode (309a) to form a memory cell (300), the region (302b) serving as a drain of the transistor (317) upon application of a voltage signal which causes a resistance change to high resistance state in the variable resistance layer (309b).Type: GrantFiled: August 20, 2009Date of Patent: October 8, 2013Assignee: Panasonic CorporationInventors: Shunsaku Muraoka, Yoshihiko Kanzawa, Satoru Mitani, Koji Katayama, Kazuhiko Shimakawa, Satoru Fujii, Takeshi Takagi
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Publication number: 20130248813Abstract: Provided is a nonvolatile semiconductor memory device including a variable resistance element in which a parasitic resistance between the lower electrode and the variable resistance layer included in the variable resistance element is reduced. The nonvolatile semiconductor memory device includes: a substrate; and a variable resistance element formed on the substrate, wherein the variable resistance element includes a lower electrode layer formed on the substrate, a variable resistance layer formed on the lower electrode layer, and an upper electrode layer formed on the variable resistance layer, the lower electrode layer includes at least a first conductive layer and a second conductive layer which is formed on the first conductive layer and is in contact with the variable resistance layer, and the first conductive layer includes an oxidatively degraded layer which is formed on an upper surface of the first conductive layer due to oxidization of the first conductive layer.Type: ApplicationFiled: October 10, 2012Publication date: September 26, 2013Applicant: Panasonic CorporationInventors: Satoru Fujii, Satoru Ito, Takumi Mikawa
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Patent number: 8492875Abstract: A nonvolatile memory apparatus includes a first electrode, a second electrode, a variable resistance layer, a resistance value of the variable resistance layer reversibly varying between a plurality of resistance states based on an electric signal applied between the electrodes. The variable resistance layer includes at least a tantalum oxide, and is configured to satisfy 0 <x<2.5 when the tantalum oxide is represented by TaOx; and wherein when a resistance value between the electrodes is in the low-resistance state is RL, a resistance value between the electrodes is in the high-resistance state is RH, and a resistance value of a portion other than the variable resistance layer in a current path connecting a first terminal to a second terminal via the first electrode, the variable resistance layer and the second electrode, is R0, R0 satisfies RL <R0.Type: GrantFiled: May 30, 2012Date of Patent: July 23, 2013Assignee: Panasonic CorporationInventors: Koichi Osano, Satoru Fujii, Shunsaku Muraoka
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Patent number: 8450182Abstract: A method of manufacturing a non-volatile semiconductor memory element including a variable resistance element and a non-ohmic element. The variable resistance element includes a first electrode, a variable resistance layer, and a shared electrode. The non-ohmic element includes the shared electrode, a semiconductor or insulator layer, and a second electrode. The method includes: forming the first electrode on a substrate; forming the variable resistance layer on the first electrode; forming the shared electrode by nitriding a front surface of the variable resistance layer; forming the semiconductor or insulator layer on the shared electrode; and forming the second electrode. In the forming of the shared electrode, a front surface of a transition metal oxide is nitrided by a plasma nitriding process to form the shared electrode comprising a transition metal nitride.Type: GrantFiled: December 28, 2010Date of Patent: May 28, 2013Assignee: Panasonic CorporationInventors: Satoru Fujii, Takumi Mikawa