Patents by Inventor Satoru Fujii

Satoru Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8445319
    Abstract: A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0<x<2.5) and a second region comprising a second oxygen-deficient tantalum oxide having a composition represented by TaOy (x<y<2.5), the first region and the second region being arranged in a thickness direction of the resistance variable layer.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: May 21, 2013
    Assignee: Panasonic Corporation
    Inventors: Yoshihiko Kanzawa, Koji Katayama, Satoru Fujii, Shunsaku Muraoka, Koichi Osano, Satoru Mitani, Ryoko Miyanaga, Takeshi Takagi, Kazuhiko Shimakawa
  • Patent number: 8445886
    Abstract: A nonvolatile memory element comprises a first electrode (103); a second electrode (105); and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes (103, 105); the resistance variable layer (104) including a first tantalum oxide layer (107) comprising a first tantalum oxide and a second tantalum oxide layer (108) comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaOx and x<y?2.5 is satisfied when the second tantalum oxide is expressed as TaOy; and the second electrode (105) being in contact with the second tantalum oxide layer (108) and comprising platinum and tantalum.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: May 21, 2013
    Assignee: Panasonic Corporation
    Inventors: Satoru Fujii, Koji Arita, Satoru Mitani, Takumi Mikawa
  • Publication number: 20130122651
    Abstract: Each of the step of forming a first variable resistance layer (18a) and the step of forming a second variable resistance layer (18b) includes performing a cycle once or plural times, the cycle consisting of a first step of introducing a source gas composed of molecules containing atoms of a transition metal; a second step of removing the source gas after the first step; a third step of introducing a reactive gas to form a transition metal oxide after the second step; and a fourth step of removing the reactive gas after the third step. The step of forming the first variable resistance layer (18a) is performed in a state in which the substrate is kept at a temperature at which a self-decomposition reaction of the source gas does not occur.
    Type: Application
    Filed: July 26, 2011
    Publication date: May 16, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Satoru Fujii, Takumi Mikawa, Haruyuki Sorada
  • Patent number: 8441060
    Abstract: A nonvolatile memory element includes a first electrode (103) formed on a substrate (101), a resistance variable layer (108) and a second electrode (107), wherein the resistance variable layer has a multi-layer structure including at least three layers which are a first transition metal oxide layer (104), a second transition metal oxide layer (106) which is higher in oxygen concentration than the first transition metal oxide layer (104), and a transition metal oxynitride layer (105). The second transition metal oxide layer (106) is in contact with either one of the first electrode (103) and the second electrode (107). The transition metal oxynitride layer (105) is provided between the first transition metal oxide layer (104) and the second transition metal oxide layer (106).
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: May 14, 2013
    Assignee: Panasonic Corporation
    Inventors: Takeki Ninomiya, Koji Arita, Takumi Mikawa, Satoru Fujii
  • Publication number: 20120292588
    Abstract: A nonvolatile memory device including: a strip-shaped first electrode line (151); a third interlayer insulating layer (16); a variable resistance layer having a stacked structure including a first variable resistance layer (18a) comprising an oxygen-deficient transition metal oxide and formed in a memory cell hole (29) to cover a bottom and a side face, and a second variable resistance layer (18b) comprising an oxygen- and/or nitrogen-deficient transition metal oxynitride having a different oxygen content than the first variable resistance layer; a first electrode (19) formed in the memory cell hole; and a strip-shaped first line (22) formed in a direction crossing the first electrode line (151) to cover at least an opening of the memory cell hole, and z>(x+y) is satisfied when the transition metal is represented by M and compositions of the first and the second variable resistance layers by MOz and MOxNy, respectively.
    Type: Application
    Filed: December 15, 2011
    Publication date: November 22, 2012
    Inventors: Satoru Fujii, Haruyuki Sorada, Takumi Mikawa
  • Publication number: 20120295413
    Abstract: A method of manufacturing a non-volatile semiconductor memory element including a variable resistance element and a non-ohmic element. The variable resistance element includes a first electrode, a variable resistance layer, and a shared electrode. The non-ohmic element includes the shared electrode, a semiconductor or insulator layer, and a second electrode. The method includes: forming the first electrode on a substrate; forming the variable resistance layer on the first electrode; forming the shared electrode by nitriding a front surface of the variable resistance layer; forming the semiconductor or insulator layer on the shared electrode; and forming the second electrode. In the forming of the shared electrode, a front surface of a transition metal oxide is nitrided by a plasma nitriding process to form the shared electrode comprising a transition metal nitride.
    Type: Application
    Filed: December 28, 2010
    Publication date: November 22, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Satoru Fujii, Takumi Mikawa
  • Patent number: 8309946
    Abstract: A resistance variable element of the present invention comprises a first electrode (103), a second electrode (107), and a resistance variable layer which is interposed between the first electrode (103) and the second electrode (107) to contact the first electrode (103) and the second electrode (107), the resistance variable layer being configured to change in response to electric signals with different polarities which are applied between the first electrode (103) and the second electrode (107), the resistance variable layer comprising an oxygen-deficient transition metal oxide layer, and the second electrode (107) comprising platinum having minute hillocks (108).
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: November 13, 2012
    Assignee: Panasonic Corporation
    Inventors: Satoru Mitani, Shunsaku Muraoka, Yoshihiko Kanzawa, Koji Katayama, Ryoko Miyanaga, Satoru Fujii, Takeshi Takagi
  • Publication number: 20120235111
    Abstract: A nonvolatile memory apparatus includes a first electrode, a second electrode, a variable resistance layer, a resistance value of the variable resistance layer reversibly varying between a plurality of resistance states based on an electric signal applied between the electrodes. The variable resistance layer includes at least a tantalum oxide, and is configured to satisfy 0<x<2.5 when the tantalum oxide is represented by TaOx; and wherein when a resistance value between the electrodes is in the low-resistance state is RL, a resistance value between the electrodes is in the high-resistance state is RH, and a resistance value of a portion other than the variable resistance layer in a current path connecting a first terminal to a second terminal via the first electrode, the variable resistance layer and the second electrode, is R0, R0 satisfies RL<R0.
    Type: Application
    Filed: May 30, 2012
    Publication date: September 20, 2012
    Applicant: Panasonic Corporation
    Inventors: Koichi OSANO, Satoru Fujii, Shunsaku Muraoka
  • Patent number: 8217489
    Abstract: A nonvolatile memory apparatus includes a first electrode, a second electrode, a variable resistance layer, a resistance value of the variable resistance layer reversibly varying between a plurality of resistance states based on an electric signal applied between the electrodes. The variable resistance layer includes at least a tantalum oxide, and is configured to satisfy 0<x<2.5 when the tantalum oxide is represented by TaOx; and wherein when a resistance value between the electrodes is in the low-resistance state is RL, a resistance value between the electrodes is in the high-resistance state is RH, and a resistance value of a portion other than the variable resistance layer in a current path connecting a first terminal to a second terminal via the first electrode, the variable resistance layer and the second electrode, is R0, R0 satisfies RL<R0.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: July 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Koichi Osano, Satoru Fujii, Shunsaku Muraoka
  • Publication number: 20120112153
    Abstract: Provided is a nonvolatile memory device which requires a lower initializing voltage such that the nonvolatile memory device can be operated at a low voltage. The nonvolatile memory device (10) includes: a first electrode layer (105) formed above a semiconductor substrate (100); a first oxygen-deficient tantalum oxide layer (106x) formed on the first electrode layer (105) and having a composition represented by TaOx where 0.8?x?1.9; a second oxygen-deficient tantalum oxide layer (106y) formed on the first oxygen-deficient tantalum oxide layer (106x) and having a composition represented by TaOy where 2.1?y; and a second electrode layer (107) formed on the second tantalum oxide layer (106y). The second tantalum oxide layer (106y) has a pillar structure including a plurality of pillars.
    Type: Application
    Filed: July 13, 2011
    Publication date: May 10, 2012
    Inventors: Takeki Ninomiya, Satoru Fujii, Yukio Hayakawa, Takumi Mikawa
  • Patent number: 8154909
    Abstract: A resistance variable memory apparatus (100) of the present invention includes a current suppressing element (116) which is connected in series with each resistance variable layer (114) and whose threshold voltage is VF, and is configured to apply a first voltage V1 to a first wire (WL) associated with a selected nonvolatile memory element, apply a second voltage V2 to a second wire (BL) associated with the selected nonvolatile memory element, apply a third voltage V3 to a first wire (WL) which is not associated with the selected nonvolatile memory element and apply a fourth voltage V4 to a second wire (BL) which is not associated with the selected memory element when writing data or reading data, wherein V2?V3<V5 and V5<V4?V1 are satisfied and (V1?V4)<VF or (V3?V2)<VF is satisfied when V5=(V1+V2)/2 is a fifth voltage V5.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: April 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Ryotaro Azuma, Kazuhiko Shimakawa, Satoru Fujii
  • Patent number: 8148711
    Abstract: A nonvolatile semiconductor apparatus of the present invention comprises (103), a second electrode (105), and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), a resistance value of the resistance variable layer being switchable reversibly in response to an electric signal applied between the electrodes (103), (105), wherein the resistance variable layer (104) comprises an oxide containing tantalum and nitrogen.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: April 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Satoru Fujii, Yoshihiko Kanzawa, Takeshi Takagi, Kazuhiko Shimakawa
  • Publication number: 20120074369
    Abstract: A nonvolatile memory apparatus includes a first electrode, a second electrode, a variable resistance layer, a resistance value of the variable resistance layer reversibly varying between a plurality of resistance states based on an electric signal applied between the electrodes. The variable resistance layer includes at least a tantalum oxide, and is configured to satisfy 0<x<2.5 when the tantalum oxide is represented by TaOx; and wherein when a resistance value between the electrodes is in the low-resistance state is RL, a resistance value between the electrodes is in the high-resistance state is RH, and a resistance value of a portion other than the variable resistance layer in a current path connecting a first terminal to a second terminal via the first electrode, the variable resistance layer and the second electrode, is R0, R0 satisfies RL<R0.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 29, 2012
    Applicant: Panasonic Corporation
    Inventors: Koichi OSANO, Satoru Fujii, Shunsaku Muraoka
  • Publication number: 20110294259
    Abstract: A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0<x<2.5) and a second region comprising a second oxygen-deficient tantalum oxide having a composition represented by TaOy (x<y<2.5), the first region and the second region being arranged in a thickness direction of the resistance variable layer.
    Type: Application
    Filed: August 8, 2011
    Publication date: December 1, 2011
    Applicant: Panasonic Corporation
    Inventors: Yoshihiko KANZAWA, Koji Katayama, Satoru Fujii, Shunsaku Muraoka, Koichi Osano, Satoru Mitani, Ryoko Miyanaga, Takeshi Takagi, Kazuhiko Shimakawa
  • Publication number: 20110284816
    Abstract: A nonvolatile memory element comprises a first electrode (103); a second electrode (105); and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the electrodes (103, 105); the resistance variable layer (104) including a first tantalum oxide layer (107) comprising a first tantalum oxide and a second tantalum oxide layer (108) comprising a second tantalum oxide which is different in oxygen content from the first tantalum oxide, the first tantalum oxide layer and the second tantalum oxide layer being stacked together, and being configured such that 0<x<2.5 is satisfied when the first tantalum oxide is expressed as TaOx and x<y?2.5 is satisfied when the second tantalum oxide is expressed as TaOy; and the second electrode (105) being in contact with the second tantalum oxide layer (108) and comprising platinum and tantalum.
    Type: Application
    Filed: February 2, 2010
    Publication date: November 24, 2011
    Inventors: Satoru Fujii, Koji Arita, Satoru Mitani, Takumi Mikawa
  • Patent number: 8058636
    Abstract: A nonvolatile memory apparatus includes a first electrode (111), a second electrode (112), a variable resistance layer (113) which is disposed between the electrodes, a resistance value of the variable resistance layer reversibly varying between a plurality of resistance states based on an electric signal applied between the electrodes, a first terminal (103) connected to the first electrode, and a second terminal (104) connected to the second terminal. The variable resistance layer comprises at least a tantalum oxide, and is configured to satisfy 0<x<2.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: November 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Koichi Osano, Satoru Fujii, Shunsaku Muraoka
  • Publication number: 20110249486
    Abstract: A resistance variable memory apparatus (100) of the present invention includes a current suppressing element (116) which is connected in series with each resistance variable layer (114) and whose threshold voltage is VF, and is configured to apply a first voltage V1 to a first wire (WL) associated with a selected nonvolatile memory element, apply a second voltage V2 to a second wire (BL) associated with the selected nonvolatile memory element, apply a third voltage V3 to a first wire (WL) which is not associated with the selected nonvolatile memory element and apply a fourth voltage V4 to a second wire (BL) which is not associated with the selected memory element when writing data or reading data, wherein V2?V3<V5 and V5<V4?V1 are satisfied and (V1?V4)<VF or (V3?V2)<VF is satisfied when V5=(V1+V2)/2 is a fifth voltage V5.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Applicant: Panasonic Corporation
    Inventors: Ryotaro AZUMA, Kazuhiko Shimakawa, Satoru Fujii
  • Patent number: 8022502
    Abstract: A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0<x<2.5) and a second region comprising a second oxygen-deficient tantalum oxide having a composition represented by TaOy (x<y<2.5), the first region and the second region being arranged in a thickness direction of the resistance variable layer.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: September 20, 2011
    Assignee: Panasonic Corporation
    Inventors: Yoshihiko Kanzawa, Koji Katayama, Satoru Fujii, Shunsaku Muraoka, Koichi Osano, Satoru Mitani, Ryoko Miyanaga, Takeshi Takagi, Kazuhiko Shimakawa
  • Patent number: 8018761
    Abstract: A resistance variable element (10), a resistance variable memory apparatus, and a resistance variable apparatus, comprise a first electrode (2), a second electrode (4), and a resistance variable layer (3) which is disposed between the first electrode (2) and the second electrode (4) and is electrically connected to the first electrode (2) and to the second electrode (4), wherein the resistance variable layer (3) contains a material having a spinel structure which is expressed as a chemical formula of (NixFe1-x) Fe2O4, X being not smaller than 0.35 and not larger than 0.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Shunsaku Muraoka, Koichi Osano, Satoru Fujii
  • Patent number: 8018760
    Abstract: A resistance variable element of the present invention and a resistance variable memory apparatus using the resistance variable element are a resistance variable element (10) including a first electrode, a second electrode, and a resistance variable layer (3) provided between the first electrode (2) and the second electrode (4) to be electrically connected to the first electrode (2) and the second electrode (4), wherein the resistance variable layer (3) contains a material having a spinel structure represented by a chemical formula of (ZnxFe1-x)Fe2O4, and the resistance variable element (10) has a feature that an electrical resistance between the first electrode (2) and the second electrode (4) increases by applying a first voltage pulse to between the first electrode (2) and the second electrode (4), and the electrical resistance between the first electrode (2) and the second electrode (4) decreases by applying a second voltage pulse whose polarity is the same as the first voltage pulse to between the first
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Shunsaku Muraoka, Koichi Osano, Satoru Fujii