Patents by Inventor Satoru KAMEYAMA

Satoru KAMEYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150380536
    Abstract: A semiconductor device in which an element region including at least an IGBT region is formed on a semiconductor substrate is presented. The IGBT region including: a collector layer; a drift layer; a body layer; a gate electrode placed inside a trench extending from the front surface of the semiconductor substrate to the drift layer; an emitter layer; and a contact layer having a higher impurity concentration than the body layer. In the semiconductor device, assuming that an x direction is a direction in which the trench extends along the front surface of the semiconductor substrate and that a y direction is a direction orthogonal to the x direction along the front surface of the semiconductor substrate, a distance from the contact layer to the emitter layer in the x direction is larger than a distance from the contact layer to the trench in the y direction.
    Type: Application
    Filed: February 13, 2013
    Publication date: December 31, 2015
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keisuke KIMURA, Satoru KAMEYAMA
  • Publication number: 20150318385
    Abstract: A first semiconductor device presented by the specification includes a semiconductor substrate that includes an anode region and a cathode region. The anode region includes a first conductivity type first region having a maximum impurity concentration of the first conductivity type at a position that is at a first depth from a surface of the semiconductor substrate and a first conductivity type second region having a maximum impurity concentration of the first conductivity type at a position that is at a second depth, and on a surface side of the semiconductor substrate than the first depth, and a third region provided between the first region and the second region, and having an impurity concentration of the first conductivity type that is equal to or less than 1/10 (one-tenth) of a impurity concentration of the surface of the semiconductor substrate.
    Type: Application
    Filed: December 5, 2012
    Publication date: November 5, 2015
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Satoru KAMEYAMA
  • Publication number: 20150295042
    Abstract: The present application discloses a semiconductor device in which an IGBT region and a diode region are formed on one semiconductor substrate. The IGBT region includes: a collector layer; an IGBT drift layer; a body layer; a gate electrode; and an emitter layer. The diode region includes: a cathode layer; a diode drift layer; an anode layer; a trench electrode; and an anode contact layer. The diode region is divided into unit diode regions by the gate electrode or the trench electrode. In a unit diode region adjacent to the IGBT region, when seen in a plan view of the front surface of the semiconductor substrate, the anode layer and the anode contact layer are mixedly placed, and the anode contact layer is placed at least in a location opposite to the emitter layer with the gate electrode interposed therebetween.
    Type: Application
    Filed: December 20, 2012
    Publication date: October 15, 2015
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoru KAMEYAMA, Keisuke KIMURA
  • Patent number: 9153575
    Abstract: When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: October 6, 2015
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keisuke Kimura, Satoru Kameyama, Masaki Koyama, Sachiko Aoi
  • Publication number: 20150187795
    Abstract: An insulated gate type switching element which can control a gate potential appropriately in accordance with a potential of a rear surface electrode is provided. A semiconductor device has a semiconductor substrate, a front surface electrode on a front surface of the semiconductor substrate, and a rear surface electrode on a rear surface thereof. The semiconductor substrate has an element region having the insulated gate type switching element which switches current flowing from the front surface electrode to the rear surface electrode and a peripheral region between the element region and an edge surface of the semiconductor substrate. A detection electrode is located on a part of the front surface and an insulating layer is located on a part of the front surface of the semiconductor substrate in the peripheral region. A diode is located on the insulating layer, a cathode of which is connected to the detection electrode.
    Type: Application
    Filed: December 18, 2014
    Publication date: July 2, 2015
    Inventor: Satoru Kameyama
  • Patent number: 9041053
    Abstract: When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: May 26, 2015
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keisuke Kimura, Satoru Kameyama, Masaki Koyama, Sachiko Aoi
  • Publication number: 20140361333
    Abstract: When a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region.
    Type: Application
    Filed: January 23, 2013
    Publication date: December 11, 2014
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Keisuke Kimura, Satoru Kameyama, Masaki Koyama, Sachiko Aoi
  • Publication number: 20140306267
    Abstract: A semiconductor device including a semiconductor substrate in which a diode region and an IGBT region are formed is provided. In the semiconductor device, the diode region includes a second conductivity type cathode layer. An impurity concentration of second conductivity type impurities of the cathode layer is distributed in a curve pattern having at least two peaks, and the impurity concentration of the second conductivity type impurities is higher than that of first conductivity type impurities at all depths of the cathode layer.
    Type: Application
    Filed: November 9, 2011
    Publication date: October 16, 2014
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Satoru Kameyama
  • Publication number: 20130075783
    Abstract: A semiconductor device includes: a semiconductor substrate, the semiconductor substrate comprising; an n type drift layer, a p type body layer on an upper surface side of the drift layer, and a high impurity n layer on a lower surface side of the drift layer. The high impurity n layer includes hydrogen ion donors as a dopant, and has a higher density of n type impurities than the drift layer. A lifetime control region including crystal defects as a lifetime killer is formed in the high impurity n layer and a part of the drift layer. A donor peak position is adjacent or identical to a defect peak position, at which a crystal defect density is highest in the lifetime control region in the depth direction of the semiconductor substrate. The crystal defect density in the defect peak position of the lifetime control region is 1×1012 atoms/cm3 or more.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 28, 2013
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Shinya YAMAZAKI, Satoru KAMEYAMA, Hitoshi SAKANE, Jyoji ITO