Abstract: The disclosure relates to a vehicle body structure safeguarding a fuel tank from damage resulting from collisions without greatly increasing the weight of the vehicle. The vehicle body structure includes a front floor under which a fuel cell stack case accommodating a fuel cell stack is disposed, and side sills and floor frames which extend along the sides of the vehicle, and on which a sub-frame for housing a fuel tank is installed. The front face of the sub-frame and the rear face of the fuel cell stack case are flat and oppose each other.

Abstract: A body structure of a fuel cell vehicle which is driven using power generated by a fuel cell. The body structure comprises a frame unit which supports a fuel tank for storing fuel for the fuel cell; a fuel cell box which accommodates the fuel cell, the fuel cell box being disposed in proximity of the frame unit at a floor of the vehicle, a fuel feed pipe which connects the fuel tank and the fuel cell, and a pillar which is disposed at a position, viewed from the side of the vehicle, covering at least a part of the fuel cell box and at least a part of the frame unit.

Abstract: A semiconductor memory device that can be reduced in chip area while preventing degradation in characteristic is obtained. In DRAM, a plurality of memory cell array regions are arranged in matrix, spaced apart from each other in a row direction and in a column direction, on a semiconductor substrate. A sense amplifier region is arranged in a gap between the memory cell array regions in the column direction. An element forming a sense amplifier is arranged in the sense amplifier region. A subdecoder region is arranged in a gap between the memory cell array regions in the row direction. A cross region is arranged at an intersection of the sense amplifier regions in line and the subdecoder regions in line. A sense amplifier driver element is arranged in the subdecoder region and used in a sense amplifier operation.

Abstract: In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of ?9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.

Abstract: Excessive CMP (chemical mechanical polishing) of a resistive band region and margin deterioration in processing in a subsequent step are prevented, while a resistive zone is formed with an active region. In the semiconductor device, a source/drain impurity diffusion layer is used as the resistive zone. On a semiconductor substrate, the resistive band region to form the resistive zone, having at least a portion of a surface provided as the active region, is formed. In the resistive band region, the resistive zone is provided. A word line is arranged on the semiconductor substrate so as to surround the resistive zone. In the resistive band region, the area occupancy ratio of the active region per 10 &mgr;m□ is set to be 40% or higher.

Abstract: A semiconductor device includes two sense amplifiers provided on a semiconductor substrate. Each of two sense amplifiers is formed of a pair of transistors. Two transistors are separated from each other by an element-isolating insulating portion provided on the semiconductor substrate. Therefore unlike the conventional, two transistors do not share the source region with each other, resulting in a semiconductor device with an improved sensitivity of a sense amplifier.

Abstract: A semiconductor memory device that can be reduced in chip area while preventing degradation in characteristic is obtained. In DRAM, a plurality of memory cell array regions are arranged in matrix, spaced apart from each other in a row direction and in a column direction, on a semiconductor substrate. A sense amplifier region is arranged in a gap between the memory cell array regions in the column direction. An element forming a sense amplifier is arranged in the sense amplifier region. A subdecoder region is arranged in a gap between the memory cell array regions in the row direction. A cross region is arranged at an intersection of the sense amplifier regions in line and the subdecoder regions in line. A sense amplifier driver element is arranged in the subdecoder region and used in a sense amplifier operation.

Abstract: An arrangement structure for a fuel cell system in a vehicle including a fuel cell box which holds a fuel cell, a sub-frame which holds a fuel gas tank, and a fuel gas dilution box. The sub-frame is placed so as to be aligned with the fuel cell box, and the fuel gas dilution box is disposed between the fuel cell and the sub-frame.

Abstract: A wire and pipe-laying structure for a fuel cell vehicle including a rear frame which is disposed at a back of the fuel cell vehicle and extends in a longitudinal direction of the fuel cell vehicle; a side sill which is disposed at a side of the fuel cell vehicle; and a floor frame which is disposed inside the side sill and extends in a longitudinal direction of the fuel cell vehicle. The floor frame together with the side sill are connected to a front end of the rear frame so as to form a Y-shaped frame having a crotch portion. A fuel pipe or a high-voltage wiring is disposed so as to pass through the crotch portion of the Y-shaped frame, and the fuel pipe or high-voltage wiring connects a fuel tank for fuel gas or a storage device to a fuel cell box.

Abstract: A vehicle front body structure includes a pair of front side frames each of which has, at a rear portion thereof, an easily deformable portion that is easily deformable during a collision, a support frame for mounting a unit box thereon, which has a pair of rear legs that are fixed to the easily deformable portions of the pair of front side frames, and a pair of front legs that are fixed to portions of the pair of front side frames, the portions being located in the front as viewed from the easily deformable portions. Displacement allowing spaces for allowing displacement of the unit box during a collision are provided near side portions of the unit box adjacent to the rear legs.

Abstract: A fuel cell vehicle driven by generated electric power of a fuel cell comprises a fuel cell box disposed underneath a floor for storing therein the fuel call, G sensors for detecting a deformation of a vehicle body sideward of the fuel cell box, and a shut-off valve for closing a supply side piping of a hydrogen gas supplied to the fuel cell when a predetermined amount of deformation or the vehicle body is detected by the G sensors.

Abstract: A body structure of a fuel cell vehicle which is driven using power generated by a fuel cell. The body structure comprises a frame unit which supports a fuel tank for storing fuel for the fuel cell; a fuel cell box which accommodates the fuel cell, the fuel cell box being disposed in proximity of the frame unit at a floor of the vehicle, a fuel feed pipe which connects the fuel tank and the fuel cell, and a pillar which is disposed at a position, viewed from the side of the vehicle, covering at least a part of the fuel cell box and at least a part of the frame unit.

Abstract: A vehicle body structure comprises a front floor under which a fuel cell stack case accommodating a fuel cell stack is disposed, and side sills and floor frames which extend along the sides of the vehicle, and on which a sub-frame having a fuel tank is installed. The front face of the sub-frame and the rear face of the fuel cell stack case are formed to be flat and oppose each other. According to the vehicle body structure, safety of the fuel tank against collision is greatly improved without a great increase in vehicle weight.

Abstract: Excessive CMP (chemical mechanical polishing) of a resistive band region and margin deterioration in processing in a subsequent step are prevented, while a resistive zone is formed with an active region. In the semiconductor device, a source/drain impurity diffusion layer is used as the resistive zone. On a semiconductor substrate, the resistive band region to form the resistive zone, having at least a portion of a surface provided as the active region, is formed. In the resistive band region, the resistive zone is provided. A word line is arranged on the semiconductor substrate so as to surround the resistive zone. In the resistive band region, the area occupancy ratio of the active region per 10 &mgr;m□ is set to be 40% or higher.

Abstract: In an output data control circuit for transferring complementary data signals read from a memory array to an external data output node in accordance with an output clock signal, a clocked gate circuit transferring complementary data signals in synchronization with an output clock signal and an output data latch circuit latching an output signal of the clocked gate circuit are operated using a voltage level not exceeding an internal power supply voltage, and the complementary data signals read from a memory cell is subjected to an amplitude expanding processing in a stage preceding the clocked gate circuit, and then is applied to the clocked gate circuit. A clock synchronous semiconductor memory device allowing reduction of a clock access time is provided.

Abstract: Main word lines are shifted in the width direction in a memory array to generate an empty region formed by a shift-aside region. The width of a conductive interconnection line transmitting a desired signal/voltage is increased in this region. Accordingly, the width of the signal/voltage interconnection line is increased to reduce the resistance without increase in the array occupation area.

Abstract: An MOS capacitor is provided in the proximity of the boundary between a P well and an N well formed of a bottom N well and an N well. Accordingly, the proximity of the boundary corresponding to the so-called dead space can be used effectively.

Abstract: A dummy pattern that is inserted to stabilize the form of a transistor active region is implanted with an impurity of the same conductivity type as a well, and the impurity-doped region of the dummy pattern is supplied with a potential through a metal interconnection. Hence, fluctuation of a well potential due to noise hardly occurs, and a semiconductor device enduring latch up, for example, to a greater extent can be provided.

Abstract: Each of first and second program circuits includes a determination node, first to fourth fuses, first to fourth N channel MOS transistors, and first to fourth supply lines. The first to fourth N channel MOS transistors receive first to fourth row address predecode signals, respectively. The first N channel MOS transistor included in the first program circuit and the first N channel MOS transistor included in the second program circuit are arranged adjacent to each other. The first supply line provides a first row address predecode signal to the gate of these two N channel MOS transistors. The same applies for the second to fourth N channel MOS transistors and the second to fourth supply lines. Accordingly, the interconnection capacitance of the row address predecode signal line can be reduced. Also, the size of the transistor driving the row address predecode signal and the transistors in the program circuit can be reduced to allow a smaller layout area for the entire chip.

Abstract: For initializing and setting operation mode of devices automatically, an automatic type discrimination system of an optical disk mounted on a optical disk unit of the invention comprises: reflection measurement means (3) for measuring reflectivity (101) of back surface of the optical disk (1) provided on an opposite side of the optical disk (1) to an optical head (2); focus sum signal converting means (4) for outputting a level of a focus sum signal (102) during focus searching operation; tracking signal converting means (5) for outputting a peak to peak value of a tracking signal (103); and a microcomputer (6) for estimating material, layer number and recording density of the optical disk (1) by comparing the reflectivity (101), the level of the focus sum signal (102) and the peak to peak value of the tracking signal (103), with reference values prepared therein.