Patents by Inventor Scott M. Dziak

Scott M. Dziak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9672850
    Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for reporting a synchronization indication and for applying a synchronization window. As an example, a system is discussed that includes: a head assembly including a first read head and a second read head; a down track distance calculation circuit operable to calculate a down track distance between the first read head and the second read head; and a synchronization mark detection circuit. The synchronization mark detection circuit is operable to: assert a synchronization mark window based at a location based at least in part on the down track distance; query a first data set derived from the first read head for a synchronization mark occurring within the synchronization mark window; and query a second data set derived from the second read head for the synchronization mark occurring within the synchronization mark window.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: June 6, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Jeffrey P. Grundvig, Richard Rauschmayer, Scott M. Dziak
  • Patent number: 9286915
    Abstract: Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for format efficient processing of data fragments.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: March 15, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Scott M. Dziak, Siva Swaroop Vontela, Daniel A. Bressan
  • Patent number: 9281908
    Abstract: Various embodiments of the present invention provide systems and methods for estimating signal and noise powers in a received signal set. For example, one embodiment of the present invention provides a method for determining signal power and noise power. The method uses a storage medium that includes a Na×Nw data pattern. The Na×Nw data pattern includes Na bits repeated Nw times. Both Na and Nw are each greater than one. The methods further include performing an initial read of the Na×Nw data pattern, which is stored to a first register.
    Type: Grant
    Filed: October 8, 2008
    Date of Patent: March 8, 2016
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, David L. Parker, Scott M. Dziak
  • Patent number: 9147430
    Abstract: An exemplary hard disk (HD) track has a full overhead section followed by user sections interleaved with intervening partial overhead sections that are too short for an HD drive (HDD) to attain sufficient timing lock using only one partial overhead section, but long enough for the drive to attain sufficient timing lock using multiple partial overhead sections to read user data from the user section immediately following the partial overhead section where sufficient timing lock is attained. The drive begins, but does not finish, attaining timing lock based on the first partial overhead section, but the drive does finish attaining timing lock based on the last partial overhead section. The drive can also read user data in subsequent user sections by maintaining or re-attaining sufficient timing lock using each successive partial overhead section. Increased user data storage is achieved without significantly impacting average latency of HDD read sessions compared to conventional HD drives.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: September 29, 2015
    Assignee: Avago Technologies General IP (Singapore) PTE. LTD.
    Inventors: Kurt J. Worrell, Jason D. Byrne, Scott M. Dziak
  • Publication number: 20150243311
    Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for reporting a synchronization indication and for applying a synchronization window. As an example, a system is discussed that includes: a head assembly including a first read head and a second read head; a down track distance calculation circuit operable to calculate a down track distance between the first read head and the second read head; and a synchronization mark detection circuit. The synchronization mark detection circuit is operable to: assert a synchronization mark window based at a location based at least in part on the down track distance; query a first data set derived from the first read head for a synchronization mark occurring within the synchronization mark window; and query a second data set derived from the second read head for the synchronization mark occurring within the synchronization mark window.
    Type: Application
    Filed: March 18, 2014
    Publication date: August 27, 2015
    Applicant: LSI Corporation
    Inventors: Jeffrey P. Grundvig, Richard Rauschmayer, Scott M. Dziak
  • Publication number: 20150243321
    Abstract: An exemplary hard disk (HD) track has a full overhead section followed by user sections interleaved with intervening partial overhead sections that are too short for an HD drive (HDD) to attain sufficient timing lock using only one partial overhead section, but long enough for the drive to attain sufficient timing lock using multiple partial overhead sections to read user data from the user section immediately following the partial overhead section where sufficient timing lock is attained. The drive begins, but does not finish, attaining timing lock based on the first partial overhead section, but the drive does finish attaining timing lock based on the last partial overhead section. The drive can also read user data in subsequent user sections by maintaining or re-attaining sufficient timing lock using each successive partial overhead section. Increased user data storage is achieved without significantly impacting average latency of HDD read sessions compared to conventional HD drives.
    Type: Application
    Filed: March 20, 2014
    Publication date: August 27, 2015
    Applicant: LSI Corporation
    Inventors: Kurt J. Worrell, Jason D. Byrne, Scott M. Dziak
  • Patent number: 9111573
    Abstract: A method and system for detecting an end of a preamble without interpolation. The method includes receiving information from a zero phase start module, the information including a target phase constraint, a polyant, and a zero phase start phase. The method also includes selecting two samples per preamble cycle of short filter outputs and long filter outputs based on the target phase constraint, the polyant, and the zero phase start phase. The method further includes decimating the short filter outputs and the long filter outputs such that the selected two samples for each of the filters per preamble cycle are output upon decimation. The method additionally includes performing a sign comparison on the corresponding short filter and long filter outputs after decimation, wherein a sign mismatch of the corresponding short filter and long filter outputs indicates an end of a preamble.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: August 18, 2015
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Siva Swaroop Vontela, Scott M. Dziak
  • Patent number: 9025265
    Abstract: A method and system for providing format savings in data sectors. The method includes receiving a signal outputted from an analog-to-digital conversion circuit. The method further includes shifting a signal phase of the signal based at least upon a corrected phase at an output of a phase loop and a phase measured when the signal was digitally sampled by the analog-to-digital conversion circuit. The method also includes adjusting a gain of the signal based at least upon a current gain loop correction and a gain correction made when the signal was digitally sampled by the analog-to-digital conversion circuit. Additionally, the method includes adjusting the signal based at least upon an output of a current offset correction and an offset correction made when the signal was digitally sampled by the analog-to-digital conversion circuit. The method also includes outputting an adjusted signal to a sync mark detector.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: May 5, 2015
    Assignee: LSI Corporation
    Inventors: Scott M. Dziak, Richard Rauschmayer, Jason D. Byrne
  • Patent number: 9026891
    Abstract: A method and system for performing a shortened acquire cycle for at least one fragment of at least one data sector having coherently written fragments, the coherently written fragments being written during a single rotation of a storage medium. The method includes performing a full acquire cycle for a first fragment of a particular data sector of the at least one data sector. The method further includes reusing at least a portion of the acquisition information of the first fragment to perform a shortened acquire cycle for at least one subsequent coherently written fragment. The method also includes reusing at least a portion of the acquisition information of the first fragment to perform a shortened acquire cycle for at least one subsequent coherently written fragment. Additionally, the method includes performing the shortened acquire cycle for the at least one subsequent coherently written fragment.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 5, 2015
    Assignee: LSI Corporation
    Inventors: Scott M. Dziak, Jeffrey P. Grundvig, Jason D. Byrne
  • Publication number: 20150085392
    Abstract: The disclosure is directed to a system and method of determining signal quality based upon at least one of: a comparison of energy content of the signal to a threshold energy content, a comparison of energy content of the fundamental harmonic of the signal to a specified percentage of the energy content of the signal, and a comparison of a difference between phase of the signal and a target phase to a threshold phase difference.
    Type: Application
    Filed: October 2, 2013
    Publication date: March 26, 2015
    Applicant: LSI Corporation
    Inventors: Scott M. Dziak, Jason D. Byrne
  • Patent number: 8970975
    Abstract: The disclosure is directed to a system and method of determining signal quality based upon at least one of: a comparison of energy content of the signal to a threshold energy content, a comparison of energy content of the fundamental harmonic of the signal to a specified percentage of the energy content of the signal, and a comparison of a difference between phase of the signal and a target phase to a threshold phase difference.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: March 3, 2015
    Assignee: LSI Corporation
    Inventors: Scott M. Dziak, Jason D. Byrne
  • Patent number: 8949701
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: February 3, 2015
    Assignee: Agere Systems Inc.
    Inventors: Yang Cao, Scott M. Dziak, Nayak Ratnakar Aravind, Richard Rauschmayer, Weijun Tan
  • Patent number: 8875005
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: October 28, 2014
    Assignee: AGERE Systems Inc.
    Inventors: Yang Cao, Scott M. Dziak, Nayak Ratnakar Aravind, Richard Rauschmayer, Weijun Tan
  • Patent number: 8862972
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes first and second data detectors and an error cancellation circuit. The first data detector is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The second data detector circuit is operable to perform a data detection process on a second signal derived from the data input to yield a second detected output. The error cancellation circuit is operable to combine a first error signal derived from the detected output with a second error signal derived from the second detected output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: October 14, 2014
    Assignee: LSI Corporation
    Inventors: Bradley D. Seago, Scott M. Dziak, Jingfeng Liu
  • Publication number: 20140281818
    Abstract: A method and system for performing a shortened acquire cycle for at least one fragment of at least one data sector having coherently written fragments, the coherently written fragments being written during a single rotation of a storage medium. The method includes performing a full acquire cycle for a first fragment of a particular data sector of the at least one data sector. The method further includes reusing at least a portion of the acquisition information of the first fragment to perform a shortened acquire cycle for at least one subsequent coherently written fragment. The method also includes reusing at least a portion of the acquisition information of the first fragment to perform a shortened acquire cycle for at least one subsequent coherently written fragment. Additionally, the method includes performing the shortened acquire cycle for the at least one subsequent coherently written fragment.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: LSI CORPORATION
    Inventors: Scott M. Dziak, Jeffrey P. Grundvig, Jason D. Byrne
  • Patent number: 8837066
    Abstract: An apparatus comprises an alternating current coupling stage comprising a first filter configured to filter an analog signal to remove relatively low-frequency energy and read channel circuitry coupled to the alternating current coupling stage. The read channel circuitry comprises an analog-to-digital converter configured to convert the filtered analog signal to a digital signal, a detector configured to obtain a recovered signal using the digital signal, and a baseline correction module comprising a second filter and being configured to estimate a parameter of the first filter using a least mean squares algorithm based at least in part on the analog signal and an output of the second filter, adjust a parameter of the second filter based on the estimated parameter and add at least a portion of the removed relatively low-frequency energy to the digital signal by combining the output of the second filter and the digital signal.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: September 16, 2014
    Assignee: LSI Corporation
    Inventors: Jason D. Byrne, Scott M. Dziak
  • Patent number: 8811136
    Abstract: The disclosure is directed to a system and method for detecting and classifying at least one media defect. A periodic pattern is written to a medium to yield at least one waveform. The magnitude of the waveform is compared against a defect threshold to detect the presence or absence of media defects in the medium. When at least one defect is detected, a magnitude for each of at least two harmonics of the waveform is determined in the defect range. The defect is classified by comparing a ratio of the magnitudes of the at least two harmonics against a classification threshold.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 19, 2014
    Assignee: LSI Corporation
    Inventors: Scott M. Dziak, Ming Jin, Jonathan Dykhuis
  • Patent number: 8773809
    Abstract: A contact event between a sensing device and a storage medium is detected by receiving a signal indicating a physical proximity between the sensing device and the storage medium; generating a plurality of frequency bin outputs; comparing one or more frequency bin outputs to a corresponding first level threshold to yield a corresponding comparator output; summing the comparator output with at least one prior instance of the comparator output to yield an aggregated value; comparing the aggregated value to an aggregate threshold to yield an aggregate output; and generating a contact event output if one or more of a first group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value and a predefined minimum number of a second group of the plurality of frequency bin outputs has an associated aggregate output set to a predefined binary value.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: July 8, 2014
    Assignee: LSI Corporation
    Inventors: Ming Jin, Erich F. Haratsch, Jason S. Goldberg, Kurt J. Worrell, Scott M. Dziak, Jeffrey P. Grundvig
  • Publication number: 20140140182
    Abstract: The disclosure is directed to a system and method for detecting and classifying at least one media defect. A periodic pattern is written to a medium to yield at least one waveform. The magnitude of the waveform is compared against a defect threshold to detect the presence or absence of media defects in the medium. When at least one defect is detected, a magnitude for each of at least two harmonics of the waveform is determined in the defect range. The defect is classified by comparing a ratio of the magnitudes of the at least two harmonics against a classification threshold.
    Type: Application
    Filed: November 19, 2012
    Publication date: May 22, 2014
    Applicant: LSI CORPORATION
    Inventors: Scott M. Dziak, Ming Jin, Jonathan Dykhuis
  • Patent number: 8610608
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes: a data detector circuit, a low latency detection circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output, and to provide a loop error as a difference between the detected output and the first signal. The low latency detection circuit operable to process a second signal derived from the data input to yield a fast detector output, and to provide a generated error as a difference between the fast detector output and the second signal. The error calculation circuit is operable to calculate an error value based at least in part on the generated error and the loop error.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: December 17, 2013
    Assignee: LSI Corporation
    Inventors: Nayak Ratnakar Aravind, Scott M. Dziak, Haitao Xia