Patents by Inventor Scott P. Dubal

Scott P. Dubal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960429
    Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: April 16, 2024
    Assignee: Intel Corporation
    Inventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
  • Publication number: 20230353508
    Abstract: Examples described herein relate to a system within a package. In some examples, the system includes a communication fabric and circuitry to adjust a packet throughput rate associated with the communication fabric based at least in part on incoming receive rate across multiple input ports and fabric usage. In some examples, the communication fabric is to communicatively couple devices in the package including one or more of: an accelerator, a processor, a memory, or a network interface device.
    Type: Application
    Filed: July 10, 2023
    Publication date: November 2, 2023
    Inventors: Kapil SOOD, Patrick CONNOR, Scott P. DUBAL, James R. HEARN, Brendan RYAN, Chris MACNAMARA, Conor WALSH, David HUNT, John J. BROWNE, Kevin LAATZ
  • Publication number: 20230297410
    Abstract: Examples described herein relate to a trusted and secure emulated device. The emulated device can be assigned to a service based on attestation of a hardware platform of the emulated device, assignment of the emulated device to a trust domain, and attestation of a device configuration associated with the emulated device.
    Type: Application
    Filed: May 22, 2023
    Publication date: September 21, 2023
    Inventors: Kapil SOOD, Scott P. DUBAL, Patrick CONNOR, James R. HEARN
  • Publication number: 20230176987
    Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 8, 2023
    Inventors: Patrick Connor, Matthew A. JARED, Duke C. HONG, Elizabeth M. KAPPLER, Chris Pavlas, Scott P. Dubal
  • Publication number: 20230106581
    Abstract: Examples described herein relate to extending a first trust domain of a service to a service mesh interface executed in a network interface device and to at least one device coupled to the network interface device. In some examples, extending the first trust domain of the service to the service mesh interface executed in the network interface device and to the at least one device coupled to the network interface device includes causing execution of the service mesh interface in a second trust domain in the network interface device; providing a third trust domain for the at least one device, when connected to the network interface device; and extending the first trust domain into the second trust domain or the third trust domain.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 6, 2023
    Inventors: Kapil SOOD, Patrick CONNOR, Scott P. DUBAL, James R. HEARN
  • Patent number: 11593292
    Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: February 28, 2023
    Assignee: Intel Corporation
    Inventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
  • Publication number: 20220329573
    Abstract: Examples described herein relate to a executing a service mesh in a trust domain in a network interface device and executing one or more services in a second trust domain in one or more devices. In some examples, the network interface device is configured to determine trust domain capabilities of the network interface device and provide the trust domain capabilities based on a query.
    Type: Application
    Filed: June 21, 2022
    Publication date: October 13, 2022
    Inventors: Kapil SOOD, Patrick CONNOR, Scott P. DUBAL, James R. HEARN, Andrew J. HERDRICH
  • Publication number: 20220279057
    Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device is to receive a request to transmit data, based on a first reliable transport protocol, and cause the data to be transmitted in at least one packet, based on a second reliable transport protocol, to a destination device and receive at least one packet, from a sender device, based on the second reliable transport protocol and indicate receipt of the at least one packet, based on the first reliable transport protocol, wherein the first reliable transport protocol is different than the second reliable transport protocol.
    Type: Application
    Filed: May 17, 2022
    Publication date: September 1, 2022
    Inventors: Patrick CONNOR, Scott P. DUBAL, James R. HEARN, Andrew J. HERDRICH, Kapil SOOD
  • Publication number: 20220191602
    Abstract: Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.
    Type: Application
    Filed: March 4, 2022
    Publication date: June 16, 2022
    Inventors: Andrew J. Herdrich, Patrick L. Connor, Dinesh Kumar, Alexander W. MIN, Daniel J. DAHLE, Kapil Sood, Jeffrey B. SHAW, Edwin Verplanke, Scott P. Dubal, James Robert Hearn
  • Patent number: 11272267
    Abstract: Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Andrew J. Herdrich, Patrick L. Connor, Dinesh Kumar, Alexander W. Min, Daniel J. Dahle, Kapil Sood, Jeffrey B. Shaw, Edwin Verplanke, Scott P. Dubal, James Robert Hearn
  • Publication number: 20210318885
    Abstract: Generally discussed herein are systems, devices, and methods for network security monitoring (NSM). A hardware queue manager (HQM) may include an input interface to receive first data from at least a first worker thread, queue duplication circuitry to generate a copy of at least a portion of the first data to create first copied data, and an output interface to (a) provide the first copied data to a second worker thread, and/or (b) provide at least a portion of the first data to a third worker thread.
    Type: Application
    Filed: March 25, 2021
    Publication date: October 14, 2021
    Inventors: Kapil Sood, Andrew J. Herdrich, Scott P. Dubal, Patrick L. Connor, James Robert Hearn, Niall D. McDonnell
  • Patent number: 11036531
    Abstract: Examples may include techniques to live migrate a virtual machine (VM) using disaggregated computing resources including compute and memory resources. Examples include copying data between allocated memory resources that serve as near or far memory for compute resources supporting the VM at a source or destination server in order to initiate and complete the live migration of the VM.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: June 15, 2021
    Assignee: Intel Corporation
    Inventors: Patrick Connor, James R. Hearn, Scott P. Dubal, Andrew J. Herdrich, Kapil Sood
  • Patent number: 11032357
    Abstract: Systems, apparatuses, and/or methods to provide data processing offload. An apparatus may determine whether a task is to be processed locally at a client device or remotely off the client device and issue the task to a wireless network and/or a wired network when the task is to be processed remotely off the client device at a server device. An apparatus may identify the task from the wireless network and/or the wired network when the task is to be processed locally at the server device, distribute the task to a server resource at the server device when the task is to be to processed locally at the service device, and provide a result of the task to the wireless network and/or the wired network when the result is to be consumed remotely at the client device.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: June 8, 2021
    Assignee: Intel Corporation
    Inventors: Karthik Veeramani, Ujwal Paidipathi, Rajneesh Chowdhury, Prakash N. Iyer, Maciej Machnikowski, Chris Pavlas, Scott P. Dubal
  • Publication number: 20210041929
    Abstract: An I/O controller includes a port to couple to a network, a buffer to buffer network data, and an interface to support a link to couple the I/O controller to another device. The I/O controller monitors a buffer to determine an amount of traffic on the port, initiates, at the interface, a power management transition on the link based on the amount of traffic, and mitigate latency associated with the power management transition at the port.
    Type: Application
    Filed: October 21, 2020
    Publication date: February 11, 2021
    Applicant: Intel Corporation
    Inventors: Patrick Lewis Connor, James R. Hearn, Kevin D. Liedtke, Scott P. Dubal, Benjamin Cheong, Rafael Guerra
  • Patent number: 10884814
    Abstract: System and techniques for multifactor intelligent agent control are described herein. A workload request may be received from a user device via a network. The workload may be instantiated in an isolated environment on an edge computing platform. Here, the isolated environment may be a container or a virtual machine. The instantiation of the workload may include using a hardware security component (SEC) of the mobile edge computing platform to prevent access to data or code of the workload from other environments hosted by the mobile edge computing platform. The workload may then be executed in the isolated environment and a result of the workload returned to the user device.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: January 5, 2021
    Assignee: Intel Corporation
    Inventors: Kapil Sood, Patrick L. Connor, Scott P. Dubal, James Robert Hearn, Andrew J. Herdrich
  • Publication number: 20200322287
    Abstract: Examples described herein relate to a switch device for a rack of two or more physical servers, wherein the switch device is coupled to the two or more physical servers and the switch device performs packet protocol processing termination for received packets and provides payload data from the received packets without a received packet header to a destination buffer of a destination physical server in the rack. In some examples, the switch device comprises at least one central processing unit, the at least one central processing unit is to execute packet processing operations on the received packets. In some examples, a physical server executes at least one virtualized execution environments (VEE) and the at least one central processing unit executes a VEE for packet processing of packets with data to be accessed by the physical server that executes the VEE.
    Type: Application
    Filed: June 18, 2020
    Publication date: October 8, 2020
    Inventors: Patrick CONNOR, James R. HEARN, Kevin LIEDTKE, Scott P. DUBAL
  • Publication number: 20200301864
    Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.
    Type: Application
    Filed: June 5, 2020
    Publication date: September 24, 2020
    Applicant: INTEL CORPORATION
    Inventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
  • Publication number: 20200257518
    Abstract: Examples described herein relate to a network interface receiving a firmware update from one or more packets. In some examples, the one or more packets indicate a start of a firmware update. In some examples, the network interface can also perform authenticating the start of firmware update indication and based on authentication of the firmware update, permit a firmware update of a device. In some examples, the device is one or more of: Board Management Controller (BMC), central processing unit (CPU), network interface, Ethernet controller, storage controller, memory controller, display engine, graphics processing unit (GPU), accelerator device, or peripheral device. In some examples, an end of firmware update indicator is received in the one or more packets. In some examples, communications are maintained through a port during a firmware change.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 13, 2020
    Inventors: Kevin LIEDTKE, James R. HEARN, Scott P. DUBAL, Jeffery OLIVER, Patrick J. McLAUGHLIN, Sharada Ashok SHIDDIBHAVI, Daniel K. OSAWA, Kelly J. COUCH, Maciej PLUCINSKI
  • Patent number: 10684973
    Abstract: Methods, apparatus, and computer platforms and architectures employing many-to-many and many-to-one peripheral switches. The methods and apparatus may be implemented on computer platforms having multiple nodes, such as those employing a Non-uniform Memory Access (NUMA) architecture, wherein each node comprises a plurality of components including a processor having at least one level of memory cache and being operatively coupled to system memory and operatively coupled to a many-to-many peripheral switch that includes a plurality of downstream ports to which NICs and/or peripheral expansion slots are operatively coupled, or a many-to-one switch that enables a peripheral device to be shared by multiple nodes. During operation, packets are received at the NICs and DMA memory writes are initiated using memory write transactions identifying a destination memory address.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: June 16, 2020
    Assignee: Intel Corporation
    Inventors: Patrick Connor, Matthew A. Jared, Duke C. Hong, Elizabeth M. Kappler, Chris Pavlas, Scott P. Dubal
  • Patent number: 10572650
    Abstract: Technologies for monitoring service level agreement (SLA) performance in an end-to-end SLA monitoring architecture include a network functions virtualization (NFV) SLA controller configured to manage SLA agents initialized in various network processing components of the end-to-end SLA monitoring architecture. To do so, the NFV SLA controller is configured to provide instruction to the SLA agents indicating which types of telemetry data to monitor and receive the requested telemetry data, as securely collected and securely packaged by the SLA agents. The NFV SLA controller is further configured to securely analyze the received telemetry data to determine one or more performance metrics and compare performance benchmarks against the performance metrics to generate an SLA report that includes the results of the comparison. Other embodiments are described and claimed.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: February 25, 2020
    Assignee: Intel Corporation
    Inventors: Trevor Cooper, Kapil Sood, Scott P. Dubal, Michael Hingston McLaughlin Bursell, Jesse C. Brandeburg, Stephen T. Palermo