Patents by Inventor Scott R. Velazquez
Scott R. Velazquez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11463072Abstract: The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The adaptive Volterra compensator effectively removes nonlinear distortion in these systems by implementing an adaptive background algorithm to periodically update actual filter coefficients to maintain optimal performance in operating conditions varying over time (e.g., temperature, frequency, signal level, and drift); or both. The xadaptive background algorithm calculates the optimal nonlinear filter coefficients to reduce nonlinear distortion.Type: GrantFiled: November 8, 2017Date of Patent: October 4, 2022Assignee: Linearity, LLCInventors: Scott R. Velazquez, Ramsin Khoshabeh
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Patent number: 10911029Abstract: The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The multi-dimensional compensator effectively removes linear and nonlinear distortion in these systems by accurately modeling the state of the device by tracking multiple functions of the input, including but not limited to present signal value, delay function, derivative function (including higher order derivatives), integral function (including higher order integrals), signal statistics (mean, median, standard deviation, variance), covariance function, power calculation function (RMS or peak), or polynomial functions.Type: GrantFiled: March 5, 2019Date of Patent: February 2, 2021Assignee: Innovation Digital, LLCInventors: Scott R. Velazquez, Yujia Wang
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Patent number: 9705477Abstract: The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The compensator effectively removes nonlinear distortion in these systems in a computationally efficient hardware or software implementation by using one or more factored multi-rate Volterra filters. Volterra filters are efficiently factored into parallel FIR filters and only the filters with energy above a prescribed threshold are actually implemented, which significantly reduces the complexity while still providing accurate results.Type: GrantFiled: September 3, 2015Date of Patent: July 11, 2017Assignee: Innovation Digital, LLCInventor: Scott R. Velazquez
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Publication number: 20160191020Abstract: The present invention is a computationally-efficient compensator for removing nonlinear distortion. The compensator operates in a digital post-compensation configuration for linearization of devices or systems such as analog-to-digital converters and RF receiver electronics. The compensator also operates in a digital pre-compensation configuration for linearization of devices or systems such as digital-to-analog converters, RF power amplifiers, and RF transmitter electronics. The compensator effectively removes nonlinear distortion in these systems in a computationally efficient hardware or software implementation by using one or more factored multi-rate Volterra filters. Volterra filters are efficiently factored into parallel FIR filters and only the filters with energy above a prescribed threshold are actually implemented, which significantly reduces the complexity while still providing accurate results.Type: ApplicationFiled: September 3, 2015Publication date: June 30, 2016Inventor: Scott R. Velazquez
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Patent number: 9160310Abstract: The present invention is an improved linearizer that implements more complex transfer functions to provide the necessary linearization performance with a reasonable amount of signal processing resources. Particularly, the linearizer operates on an analog-to-digital converter and comprises a distortion compensator and one or more factored Volterra compensators, which may include a second-order factored Volterra compensator, a third-order factored Volterra compensator, and additional higher-order factored Volterra compensators. Inclusion of factored Volterra distortion compensators improves linearization processing performance while significantly reducing the computational complexity compared to a traditional Volterra-based compensator.Type: GrantFiled: June 11, 2013Date of Patent: October 13, 2015Inventors: Scott R. Velazquez, Richard J. Velazquez
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Patent number: 9118513Abstract: The present invention provides a high-performance adaptive digital receiver with adaptive background control that optimizes the performance in rapidly changing signal environments and provides 3.6 GHz instantaneous bandwidth, SFDR>90 dB, SNR=66 dB, with dynamic digital channelization. The receiver takes advantage of several levels of adaptivity that conventional approaches do not offer. In addition to a dynamic digital channelizer that is adaptively tuned based on detected signals, the present invention employs a powerful software reconfigurable digitizer that is adaptively optimized for the current signal environment to control important receiver parameters such as bandwidth, dynamic range, resolution, and sensitivity.Type: GrantFiled: October 2, 2013Date of Patent: August 25, 2015Inventors: Scott R. Velazquez, Richard J. Velazquez
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Publication number: 20150032788Abstract: The present invention is an improved linearizer that implements more complex transfer functions to provide the necessary linearization performance with a reasonable amount of signal processing resources. Particularly, the linearizer operates on an analog-to-digital converter and comprises a distortion compensator and one or more factored Volterra compensators, which may include a second-order factored Volterra compensator, a third-order factored Volterra compensator, and additional higher-order factored Volterra compensators. Inclusion of factored Volterra distortion compensators improves linearization processing performance while significantly reducing the computational complexity compared to a traditional Volterra-based compensator.Type: ApplicationFiled: June 11, 2013Publication date: January 29, 2015Inventors: Scott R. Velazquez, Rich J. Velazquez
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Publication number: 20140133603Abstract: The present invention provides a high-performance adaptive digital receiver with adaptive background control that optimizes the performance in rapidly changing signal environments and provides 3.6 GHz instantaneous bandwidth, SFDR>90 dB, SNR=66 dB, with dynamic digital channelization. The receiver takes advantage of several levels of adaptivity that conventional approaches do not offer. In addition to a dynamic digital channelizer that is adaptively tuned based on detected signals, the present invention employs a powerful software reconfigurable digitizer that is adaptively optimized for the current signal environment to control important receiver parameters such as bandwidth, dynamic range, resolution, and sensitivity.Type: ApplicationFiled: October 2, 2013Publication date: May 15, 2014Inventors: Scott R. Velazquez, Richard J. Velazquez
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Patent number: 8582694Abstract: The present invention provides a high-performance adaptive digital receiver with adaptive background control that optimizes the performance in rapidly changing signal environments and provides 3.6 GH; instantaneous bandwidth, SFDR>90 dB, SNR=66 dB, with dynamic digital channelization. The receiver takes advantage of several levels of adaptivity that conventional approaches do not offer. In addition to a dynamic digital channelizer that is adaptively tuned based on detected signals, the present invention employs a powerful software reconfigurable digitizer that is adaptively optimized for the current signal environment to control important receiver parameters such as bandwidth, dynamic range, resolution, and sensitivity.Type: GrantFiled: April 24, 2012Date of Patent: November 12, 2013Inventors: Scott R. Velazquez, Rich J. Velazquez
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Publication number: 20130016798Abstract: The present invention provides a high-performance adaptive digital receiver with adaptive background control that optimizes the performance in rapidly changing signal environments and provides 3.6 GH; instantaneous bandwidth, SFDR>90 dB, SNR=66 dB, with dynamic digital channelization. The receiver takes advantage of several levels of adaptivity that conventional approaches do not offer. In addition to a dynamic digital channelizer that is adaptively tuned based on detected signals, the present invention employs a powerful software reconfigurable digitizer that is adaptively optimized for the current signal environment to control important receiver parameters such as bandwidth, dynamic range, resolution, and sensitivity.Type: ApplicationFiled: April 24, 2012Publication date: January 17, 2013Inventors: Scott R. Velazquez, Rich J. Velazquez
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Patent number: 8164496Abstract: In a compensator for compensating mismatches, and in methods for such compensation, the compensator compensates for mismatches in output signals of a system with mismatches during normal operation of the system with mismatches. The compensator comprises: a mismatch estimator that monitors at least two mismatched signals output by the system with mismatches during normal operation and that generates matching parameters indicating an amount of mismatch between the at least two mismatched signals, the mismatch estimator updating the matching parameters during normal operation of the system with mismatches, and a mismatch equalizer that compensates mismatches in the mismatched signals output by the system with mismatches during normal operation of the system with mismatches in response to the matching parameters.Type: GrantFiled: October 20, 2010Date of Patent: April 24, 2012Inventor: Scott R. Velazquez
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Patent number: 8085175Abstract: The present invention provides an advanced adaptive predistortion linearization technique to dramatically reduce nonlinear distortion in power amplifiers over a very wide instantaneous bandwidth (up to 2 GHz) and over a wide range of amplifier types, input frequencies, signal types, amplitudes, temperature, and other environmental and signal conditions. In an embodiment of the invention, the predistortion linearization circuitry comprises (1) a higher-order polynomial model of an amplifier's gain and phase characteristics—higher than a third-order polynomial model; (2) an adaptive calibration technique; and (3) a heuristic calibration technique. The higher-order polynomial model is generated by introducing, for example, a plurality of multi-tone test signals with varying center frequency and spacing into the power amplifier. From the power amplifier's corresponding output, the nonlinearities are modeled by employing a higher-order curve fit to capture the irregularities in the nonlinear transfer function.Type: GrantFiled: April 4, 2011Date of Patent: December 27, 2011Assignee: V Corp Technologies, Inc.Inventor: Scott R. Velazquez
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Publication number: 20110260898Abstract: In a compensator for compensating mismatches, and in methods for such compensation, the compensator compensates for mismatches in output signals of a system with mismatches during normal operation of the system with mismatches. The compensator comprises: a mismatch estimator that monitors at least two mismatched signals output by the system with mismatches during normal operation and that generates matching parameters indicating an amount of mismatch between the at least two mismatched signals, the mismatch estimator updating the matching parameters during normal operation of the system with mismatches, and a mismatch equalizer that compensates mismatches in the mismatched signals output by the system with mismatches during normal operation of the system with mismatches in response to the matching parameters.Type: ApplicationFiled: October 20, 2010Publication date: October 27, 2011Inventor: Scott R. Velazquez
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Publication number: 20110175678Abstract: The present invention provides an advanced adaptive predistortion linearization technique to dramatically reduce nonlinear distortion in power amplifiers over a very wide instantaneous bandwidth (up to 2 GHz) and over a wide range of amplifier types, input frequencies, signal types, amplitudes, temperature, and other environmental and signal conditions. In an embodiment of the invention, the predistortion linearization circuitry comprises (1) a higher-order polynomial model of an amplifier's gain and phase characteristics—higher than a third-order polynomial model; (2) an adaptive calibration technique; and (3) a heuristic calibration technique. The higher-order polynomial model is generated by introducing, for example, a plurality of multi-tone test signals with varying center frequency and spacing into the power amplifier. From the power amplifier's corresponding output, the nonlinearities are modeled by employing a higher-order curve fit to capture the irregularities in the nonlinear transfer function.Type: ApplicationFiled: April 4, 2011Publication date: July 21, 2011Inventor: Scott R. Velazquez
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Patent number: 7940198Abstract: The present invention provides an advanced adaptive predistortion linearization technique to dramatically reduce nonlinear distortion in power amplifiers over a very wide instantaneous bandwidth (up to 2 GHz) and over a wide range of amplifier types, input frequencies, signal types, amplitudes, temperature, and other environmental and signal conditions. In an embodiment of the invention, the predistortion linearization circuitry comprises (1) a higher-order polynomial model of an amplifier's gain and phase characteristics—higher than a third-order polynomial model; (2) an adaptive calibration technique; and (3) a heuristic calibration technique. The higher-order polynomial model is generated by introducing, for example, a plurality of multi-tone test signals with varying center frequency and spacing into the power amplifier. From the power amplifier's corresponding output, the nonlinearities are modeled by employing a higher-order curve fit to capture the irregularities in the nonlinear transfer function.Type: GrantFiled: June 16, 2010Date of Patent: May 10, 2011Assignee: V Corp Technologies, Inc.Inventor: Scott R. Velazquez
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Publication number: 20110095819Abstract: The present invention provides an advanced adaptive predistortion linearization technique to dramatically reduce nonlinear distortion in power amplifiers over a very wide instantaneous bandwidth (up to 2 GHz) and over a wide range of amplifier types, input frequencies, signal types, amplitudes, temperature, and other environmental and signal conditions. In an embodiment of the invention, the predistortion linearization circuitry comprises (1) a higher-order polynomial model of an amplifier's gain and phase characteristics—higher than a third-order polynomial model; (2) an adaptive calibration technique; and (3) a heuristic calibration technique. The higher-order polynomial model is generated by introducing, for example, a plurality of multi-tone test signals with varying center frequency and spacing into the power amplifier. From the power amplifier's corresponding output, the nonlinearities are modeled by employing a higher-order curve fit to capture the irregularities in the nonlinear transfer function.Type: ApplicationFiled: June 16, 2010Publication date: April 28, 2011Inventor: Scott R. Velazquez
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Patent number: 7782235Abstract: In a compensator for compensating mismatches, and in methods for such compensation, the compensator compensates for mismatches in output signals of a system with mismatches during normal operation of the system with mismatches. The compensator comprises: a mismatch estimator that monitors at least two mismatched signals output by the system with mismatches during normal operation and that generates matching parameters indicating an amount of mismatch between the at least two mismatched signals, the mismatch estimator updating the matching parameters during normal operation of the system with mismatches, and a mismatch equalizer that compensates mismatches in the mismatched signals output by the system with mismatches during normal operation of the system with mismatches in response to the matching parameters.Type: GrantFiled: April 30, 2008Date of Patent: August 24, 2010Assignee: V Corp Technologies, Inc.Inventor: Scott R. Velazquez
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Publication number: 20040104839Abstract: A wireless communication system employs directive antenna arrays and knowledge of position of users to form narrow antenna beams to and from desired users and away from undesired users to reduce co-channel interference. By reducing co-channel interference coming from different directions, spatial filtering with antenna arrays improves the call capacity of the system. A space division multiple access (SDMA) system allocates a narrow antenna beam pattern to each user in the system so that each user has its own communication channel free from co-channel interference. The position of the users is determined using geo-location techniques. Geo-location can be derived via triangulation between cellular base stations or via a global positioning system (GPS) receiver. The system can be optimized by applying partially adaptive processing algorithms, which are seeded by geo-location data.Type: ApplicationFiled: July 14, 2003Publication date: June 3, 2004Applicant: TeraTech CorporationInventors: Scott R. Velazquez, Steven R. Broadstone, Alice M. Chiang
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Patent number: 6593880Abstract: A wireless communication system employs directive antenna arrays and knowledge of position of users to form narrow antenna beams to and from desired users and away from undesired users to reduce co-channel interference. By reducing co-channel interference coming from different directions, spatial filtering with antenna arrays improves the call capacity of the system. A space division multiple access (SDMA) system allocates a narrow antenna beam pattern to each user in the system so that each user has its own communication channel free from co-channel interference. The position of the users is determined using geo-location techniques. Geo-location can be derived via triangulation between cellular base stations or via a global positioning system (GPS) receiver. The system can be optimized by applying partially adaptive processing algorithms, which are seeded by geo-location data.Type: GrantFiled: November 9, 1998Date of Patent: July 15, 2003Assignee: TeraTech CorporationInventors: Scott R. Velazquez, Steven R. Broadstone, Alice M. Chiang
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Patent number: 6570514Abstract: In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for calibrating linearity error compensators.Type: GrantFiled: July 12, 2002Date of Patent: May 27, 2003Inventor: Scott R. Velazquez