Patents by Inventor Scott R. Velazquez

Scott R. Velazquez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6512481
    Abstract: A wireless communication system employs directive antenna arrays and knowledge of position of users to form narrow antenna beams to and from desired users and away from undesired users to reduce co-channel interference. By reducing co-channel interference coming from different directions, spatial filtering with antenna arrays improves the call capacity of the system. A space division multiple access (SDMA) system allocates a narrow antenna beam pattern to each user in the system so that each user has its own communication channel free from co-channel interference. The position of the users is determined using geo-location techniques. Geo-location can be derived via triangulation between cellular base stations or via a global positioning system (GPS) receiver.
    Type: Grant
    Filed: October 10, 1996
    Date of Patent: January 28, 2003
    Assignee: TeraTech Corporation
    Inventors: Scott R. Velazquez, Steven R. Broadstone
  • Patent number: 6473013
    Abstract: In one aspect, the present invention is directed to a converter for converting a signal from a first format to a second format. The converter includes a decomposition section, a converter array operatively coupled to the decomposition section, and a recombination section operatively coupled to the converter array. The decomposition section includes an input to receive the input signal, a splitter to divide the input signal into a plurality of signals, a plurality of signal outputs, each of which provides as an output one of the plurality of signals, and a clock circuit having a plurality of clock outputs for providing sample clocks to the converter array. The converter array includes a plurality of converters each having a signal input to receive one of the plurality of signals, each having a clock input to receive one of the sample clocks and each having an output that provides a converted signal.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: October 29, 2002
    Inventors: Scott R. Velazquez, Richard J. Velazquez
  • Publication number: 20020121993
    Abstract: In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for adaptively calibrating the linearity error compensator.
    Type: Application
    Filed: December 21, 2001
    Publication date: September 5, 2002
    Inventor: Scott R. Velazquez
  • Patent number: 6424275
    Abstract: In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for adaptively calibrating the linearity error compensator.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: July 23, 2002
    Inventor: Scott R. Velazquez
  • Patent number: 6388594
    Abstract: In one aspect, the present invention is directed to a converter for converting a signal from a first format to a second format. The converter includes a decomposition section, a converter array operatively coupled to the decomposition section, and a recombination section operatively coupled to the converter array. The decomposition section includes an input to receive the input signal, a splitter to divide the input signal into a plurality of signals, a plurality of signal outputs, each of which provides as an output one of the plurality of signals, and a clock circuit having a plurality of clock outputs for providing sample clocks to the converter array. The converter array includes a plurality of converters each having a signal input to receive one of the plurality of signals, each having a clock input to receive one of the sample clocks and each having an output that provides a converted signal.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: May 14, 2002
    Inventors: Scott R. Velazquez, Richard J. Velazquez
  • Patent number: 6344810
    Abstract: In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for calibrating the linearity error compensator. Another aspect of the invention is directed to a modeling linearity errors in a device.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: February 5, 2002
    Inventor: Scott R. Velazquez
  • Patent number: 6339390
    Abstract: In one aspect, the present invention is directed to a converter for converting a signal from a first format to a second format. The converter includes a decomposition section, a converter array operatively coupled to the decomposition section, and a recombination section operatively coupled to the converter array. The decomposition section includes an input to receive the input signal, a splitter to divide the input signal into a plurality of signals, a plurality of signal outputs, each of which provides as an output one of the plurality of signals, and a clock circuit having a plurality of clock outputs for providing sample clocks to the converter array. The converter array includes a plurality of converters each having a signal input to receive one of the plurality of signals, each having a clock input to receive one of the sample clocks and each having an output that provides a converted signal.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: January 15, 2002
    Inventors: Scott R. Velazquez, Richard J. Velazquez
  • Publication number: 20010033238
    Abstract: In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for calibrating the linearity error compensator. Another aspect of the invention is directed to a modeling linearity errors in a device.
    Type: Application
    Filed: January 18, 2001
    Publication date: October 25, 2001
    Inventor: Scott R. Velazquez
  • Publication number: 20010003443
    Abstract: A wireless communication system employs directive antenna arrays and knowledge of position of users to form narrow antenna beams to and from desired users and away from undesired users to reduce co-channel interference. By reducing co-channel interference coming from different directions, spatial filtering with antenna arrays improves the call capacity of the system. A space division multiple access (SDMA) system allocates a narrow antenna beam pattern to each user in the system so that each user has its own communication channel free from co-channel interference. The position of the users is determined using geo-location techniques. Geo-location can be derived via triangulation between cellular base stations or via a global positioning system (GPS) receiver. The system can be optimized by applying partially adaptive processing algorithms, which are seeded by geo-location data.
    Type: Application
    Filed: November 9, 1998
    Publication date: June 14, 2001
    Inventors: SCOTT R. VELAZQUEZ, STEVEN R. BROADSTONE, ALICE M. CHIANG
  • Patent number: 6198416
    Abstract: In one aspect, the present invention is directed to a compensator for compensating linearity errors, such as harmonic distortion and intermodulation distortion, in devices. The compensator includes a means for phase-shifting and a means for exponentiation to generate a compensation signal such that the linearity error distortion signals are canceled in the system output while maintaining the desired fundamental signal. Another aspect of the invention is directed to methods for calibrating the linearity error compensator. Another aspect of the invention is directed to a modeling linearity errors in a device.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: March 6, 2001
    Inventor: Scott R. Velazquez
  • Patent number: 6177893
    Abstract: In one aspect, the present invention is directed to a converter for converting a signal from a first format to a second format. The converter includes a decomposition section, a converter array operatively coupled to the decomposition section, and a recombination section operatively coupled to the converter array. The decomposition section includes an input to receive the input signal, a splitter to divide the input signal into a plurality of signals, a plurality of signal outputs, each of which provides as an output one of the plurality of signals, and a clock circuit having a plurality of clock outputs for providing sample clocks to the converter array. The converter array includes a plurality of converters each having a signal input to receive one of the plurality of signals, each having a clock input to receive one of the sample clocks and each having an output that provides a converted signal.
    Type: Grant
    Filed: September 15, 1998
    Date of Patent: January 23, 2001
    Inventors: Scott R. Velazquez, Richard J. Velazquez
  • Patent number: 5568142
    Abstract: A hybrid filter bank analog-to-digital converter includes continuous-time analysis filters and discrete-time synthesis filters. The continuous-time analysis filters partition a continuous-time wideband input signal into continuous-time subband signals. An analog-to-digital converter bank quantizes the subband signals at a low data rate. A bank of upsamplers increases the data rate of the quantized subband signals. A bank of discrete-time synthesis filters processes the upsampled subband signals, generating signals which are the discrete-time approximation of the continuous-time subband signals. The subband signals may be recombined into a discrete-time wideband signal which is the discrete-time approximation of the continuous-time wideband input signal. The linearity errors, analog-to-digital converter mismatches and quantization noise are not compounded between the frequency bands, thereby increasing resolution.
    Type: Grant
    Filed: October 20, 1994
    Date of Patent: October 22, 1996
    Assignee: Massachusetts Institute of Technology
    Inventors: Scott R. Velazquez, Truong O. Nguyen, Steven R. Broadstone