Patents by Inventor Seiichiro Kanno

Seiichiro Kanno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060291132
    Abstract: An electrostatic chuck which is built in a heater and can change, at a high speed, the temperature distribution of a wafer being processed by a plasma is provided at low cost. Also, there is provided a processing method which realizes uniform etching by suppressing CD variations in the plane of the wafer even when etching conditions change. The electrostatic chuck includes a base material in which multiple coolant grooves are formed, a high resistance layer which is formed on the base material, multiple heaters which are formed by thermally spraying conductors within the high resistance layer, multiple electrostatic chuck electrodes which are formed similarly by thermally spraying conductors within the high resistance layer, and temperature measuring means, and adjusts outputs of the heaters on the basis of temperature information of the temperature measuring means.
    Type: Application
    Filed: March 8, 2006
    Publication date: December 28, 2006
    Inventors: Seiichiro Kanno, Tsunehiko Tsubone, Masakazu Isozaki, Toshio Masuda, Go Miya, Hiroho Kitada, Tooru Aramaki
  • Patent number: 7138606
    Abstract: A wafer processing method for use with a wafer processing apparatus having a liquid cooling jacket with a built-in coolant liquid circulation path and a ceramic plate as attached onto the liquid cooling jacket and having therein a heater and an electrode for an electrostatic chuck. The method enables performance of wafer processing while letting a wafer be mounted on the ceramic plate by a wafer transport. The method includes causing the wafer transport to transport the wafer onto the ceramic plate, pre-heating the wafer while the wafer is held on the ceramic plate for a predetermined length of time, and mounting the preheated wafer on the ceramic plate.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: November 21, 2006
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Seiichiro Kanno, Ken Yoshioka, Ryoji Nishio, Saburou Kanai, Hideki Kihara, Koji Okuda
  • Publication number: 20060191482
    Abstract: A wafer processing apparatus capable of obtaining a uniform CD distribution within a wafer is provided. The wafer processing apparatus comprises at least two separate circuits of temperature regulating means provided in a wafer stage, a plurality of cooling gas pressure regulating means for feeding cooling gas between the semiconductor wafer and the wafer stage, means for regulating heater input power, and a control computer. The control computer receives input of line width dimensions resulting from processes in an arbitrary plurality of temperature conditions obtained by changing at least one of the conditions of the temperature of the temperature regulating agent, the cooling gas pressure, and the input power of the heater. The line width dimensions are used to calculate, and control, at least one of the temperature of the temperature regulating agent, the cooling gas pressure, and the input power of the heater for obtaining an arbitrary etching line width dimension.
    Type: Application
    Filed: March 9, 2005
    Publication date: August 31, 2006
    Inventors: Seiichiro Kanno, Junichi Tanaka, Go Miya, Tsunehiko Tsubone, Akitaka Makino, Toshio Masuda
  • Publication number: 20060169671
    Abstract: To provide a plasma etching apparatus that achieves a high in-plane uniformity of the CD shift.
    Type: Application
    Filed: March 7, 2005
    Publication date: August 3, 2006
    Inventors: Go Miya, Junichi Tanaka, Seiichiro Kanno, Akitaka Makino, Motohiko Yoshigai
  • Publication number: 20060042757
    Abstract: In a wafer processing apparatus, wafers are sequentially placed one by one on a ceramic plate of a wafer stage within a vacuum chamber. The pressure of a heat-conductive gas introduced at this time between the wafer and the ceramic plate is adjusted to control the temperature of the wafer, and the wafer is processed by use of plasma. In this case, the user can select any one of a process for regulating the pressure of the heat-conductive gas each time the wafers are sequentially placed on the wafer stage, a process for optimizing aging conditions, and a process for optimizing heater conditions so that the wafer temperature variation within lot can be reduced by performing the selected process. The selected process is performed on the basis of its conditions that are computed to determine by a control-purpose computer of the processing apparatus.
    Type: Application
    Filed: August 27, 2004
    Publication date: March 2, 2006
    Inventors: Seiichiro Kanno, Manabu Edamura, Ryujiro Udo, Masatsugu Arai, Junichi Tanaka, Saburo Kanai, Ryoji Nishio, Tsunehiko Tsubone, Toru Aramaki
  • Publication number: 20060043064
    Abstract: A plasma processing system includes a process chamber equipped with a gas supply unit, a gas exhaust and an electromagnetic energy supply unit for generating plasma from process gasses, thereby subjecting a specimen placed on a specimen stage to a plasma process. The system includes a spectrometer detecting a spectrum of plasma emission generated in the chamber, flow controllers controlling flow rates of process gasses to be supplied, and a controller controlling the flow controllers. The controller includes a calculation unit for calculating an amount of reaction byproducts generated in the chamber, in accordance with the spectrum of the plasma emission detected with the spectrometer and an input unit for inputting a target timeline of the amount of reaction byproducts, and controls amounts of the process gasses such that a calculation result of the amount of reaction byproducts becomes coincident with the input target timeline.
    Type: Application
    Filed: September 7, 2004
    Publication date: March 2, 2006
    Inventors: Junichi Tanaka, Takehisa Iwakoshi, Seiichiro Kanno, Go Miya, Motohiko Yoshigai
  • Patent number: 6895179
    Abstract: A wafer stage for use in a wafer processing apparatus having a liquid cooling jacket with a built-in coolant liquid circulation path and a ceramic plate as attached onto the liquid cooling jacket and having therein a heater and an electrode for an electrostatic chuck. The wafer stage enables performance of wafer processing while letting a wafer be mounted on the ceramic plate. The liquid cooling jacket enables attachment of the ceramic plate through a gap for circulation of a coolant gas as formed over the liquid cooling jacket, and a heat resistant seal material containing therein an elastic body for sealing the coolant gas between the liquid cooling jacket and the ceramic plate.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: May 17, 2005
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Seiichiro Kanno, Ken Yoshioka, Ryoji Nishio, Saburou Kanai, Hideki Kihara, Koji Okuda
  • Publication number: 20050089625
    Abstract: A method for operating a semiconductor processing apparatus that plasma-processes a semiconductor wafer mounted on a stage placed in a container using a plasma generated therein. The method includes setting a temperature of the semiconductor wafer, and controlling an operation of the semiconductor processing apparatus based on information about the temperature of the semiconductor wafer which is set.
    Type: Application
    Filed: November 29, 2004
    Publication date: April 28, 2005
    Inventors: Seiichiro Kanno, Ryoji Nishio, Ken Yoshioka, Saburou Kanai, Hideki Kihara, Hideyuki Yamamoto
  • Publication number: 20050045104
    Abstract: A plasma processing apparatus having an electrostatic chucking electrode that allows temperature control of a semiconductor wafer during etching process with high efficiency comprises: a holder stage comprising an electrode block S having a dielectric film 4 on the surface thereof and a coolant flow passage 6 therein, in which temperature control is performed while holding a semiconductor wafer W on the dielectric film on the surface of the electrode block; and a cooling cycle 50 including a compressor 52, a condenser 55, an expansion valve 53, a heat exchanger 54 having a heater built therein, and an evaporator, wherein the temperature control of the electrode block S is performed by using a direct-expansion-type temperature controller in which the electrode block S is used as the evaporator of the cooling cycle, and the coolant is directly circulated and expanded inside the electrode block.
    Type: Application
    Filed: March 9, 2004
    Publication date: March 3, 2005
    Inventors: Masatsugu Arai, Ryujiro Udo, Seiichiro Kanno, Tsuyoshi Yoshida
  • Patent number: 6825617
    Abstract: A semiconductor processing apparatus that processes a semiconductor wafer disposed in a process chamber of a processing apparatus main unit includes a setting unit for enabling a user to set a temperature of the semiconductor wafer and control unit for controlling a processing of the semiconductor wafer based on the temperature of the semiconductor wafer set by the setting unit.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: November 30, 2004
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Seiichiro Kanno, Ryoji Nishio, Ken Yoshioka, Saburou Kanai, Hideki Kihara, Hideyuki Yamamoto
  • Publication number: 20040168767
    Abstract: A semiconductor processing apparatus that processes a semiconductor wafer disposed in a process chamber of a processing apparatus main unit 38 comprises: a setting unit 33 for enabling a user to set a temperature of the semiconductor wafer; and a control unit 26 for controlling a processing of the semiconductor wafer based on the temperature of the semiconductor wafer set by the setting unit.
    Type: Application
    Filed: February 27, 2003
    Publication date: September 2, 2004
    Inventors: Seiichiro Kanno, Ryoji Nishio, Ken Yoshioka, Saburou Kanai, Hideki Kihara, Hideyuki Yamamoto
  • Publication number: 20040149384
    Abstract: A semiconductor manufacturing apparatus includes a unit for generating a plasma in a vacuum chamber, a wafer stage for holding a semiconductor wafer introduced into the vacuum chamber, a high frequency power supply for applying a high frequency voltage to the wafer stage, a wafer voltage probe for measuring a voltage of the semiconductor wafer at a rear surface of the semiconductor wafer, a current and voltage probe for measuring at least one of a voltage and a current applied to the wafer stage from the high frequency power supply, and a control portion. The control portion obtains an impedance from the semiconductor wafer to earth through the plasma on the basis of a voltage value of the semiconductor wafer measured by the wafer voltage probe, and a voltage value or a current value measured by the current and voltage probe, and performs a processing based on the obtained impedance.
    Type: Application
    Filed: October 7, 2003
    Publication date: August 5, 2004
    Inventors: Seiichiro Kanno, Ryoji Nishio, Tsutomu Tetsuka, Junichi Tanaka, Hideyuki Yamamoto, Kazuyuki Ikenaga, Saburou Kanai
  • Patent number: 6771481
    Abstract: A plasma processing apparatus comprises: a body that comprises a vacuum processing chamber with a wafer stage on which a semiconductor wafer is held, a plasma producing unit for producing plasma within the vacuum chamber, and a high frequency source for applying a high frequency bias voltage to the wafer stage. A control unit controls various parameters of the body of the plasma processing apparatus. The control unit comprises a detecting unit for detecting the high frequency voltage or high frequency current applied to the wafer stage and for calculating a difference in phase between the high frequency voltage and the high frequency current, and a unit for obtaining a characteristic of the plasma or an electric characteristic of the plasma processing apparatus based on the detected high frequency voltage, the detected high frequency current, and the obtained difference in phase.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: August 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Ryoji Nishio, Seiichiro Kanno, Hideyuki Yamamoto, Akira Kagoshima
  • Patent number: 6747239
    Abstract: A plasma processing apparatus having a process chamber to process specimens; a status detecting unit for detecting the internal processing status of the process chamber and outputting a plurality of signals; and a signal converting unit for extracting an arbitrary number of signal processing filters from a signal filter database using a signal filter selector and creating an arbitrary number of device status signals. The signal converting unit creates fewer effective device status signals of a time series from the output signals.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: June 8, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Junichi Tanaka, Hiroyuki Kitsunai, Ryoji Nishio, Seiichiro Kanno, Hideyuki Yamamoto
  • Publication number: 20040076411
    Abstract: A wafer processing method for use with a wafer processing apparatus having a liquid cooling jacket with a built-in coolant liquid circulation path and a ceramic plate as attached onto the liquid cooling jacket and having therein a heater and an electrode for an electrostatic chuck. The method enables performance of wafer processing while letting a wafer be mounted on the ceramic plate by a wafer transport. The method includes causing the wafer transport to transport the wafer onto the ceramic plate, pre-heating the wafer while the wafer is held on the ceramic plate for a predetermined length of time, and mounting the preheated wafer on the ceramic plate.
    Type: Application
    Filed: September 10, 2003
    Publication date: April 22, 2004
    Inventors: Seiichiro Kanno, Ken Yoshioka, Ryoji Nishio, Saburou Kanai, Hideki Kihara, Koji Okuda
  • Patent number: 6716301
    Abstract: A semiconductor manufacturing apparatus includes a unit for generating a plasma in a vacuum chamber, a wafer stage for holding a semiconductor wafer introduced into the vacuum chamber, a high frequency power supply for applying a high frequency voltage to the wafer stage, a wafer voltage probe for measuring a voltage of the semiconductor wafer at a rear surface of the semiconductor wafer, a current and voltage probe for measuring at least one of a voltage and a current applied to the wafer stage from the high frequency power supply, and a control portion. The control portion obtains an impedance from the semiconductor wafer to earth through the plasma on the basis of a voltage value of the semiconductor wafer measured by the wafer voltage probe, and a voltage value or a current value measured by the current and voltage probe, and performs a processing based on the obtained impedance.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: April 6, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Seiichiro Kanno, Ryoji Nishio, Tsutomu Tetsuka, Junichi Tanaka, Hideyuki Yamamoto, Kazuyuki Ikenaga, Saburou Kanai
  • Publication number: 20040055540
    Abstract: A wafer stage for use in a wafer processing apparatus having a liquid cooling jacket with a built-in coolant liquid circulation path and a ceramic plate as attached onto the liquid cooling jacket and having therein a heater and an electrode for an electrostatic chuck. The wafer stage enables performance of wafer processing while letting a wafer be mounted on the ceramic plate. The liquid cooling jacket enables attachment of the ceramic plate through a gap for circulation of a coolant gas as formed over the liquid cooling jacket, and a heat resistant seal material containing therein an elastic body for sealing the coolant gas between the liquid cooling jacket and the ceramic plate.
    Type: Application
    Filed: September 10, 2003
    Publication date: March 25, 2004
    Inventors: Seiichiro Kanno, Ken Yoshioka, Ryoji Nishio, Saburou Kanai, Hideki Kihara, Koji Okuda
  • Publication number: 20040045813
    Abstract: A heater function and an electrostatic chuck function are incorporated in a ceramic plate for placing a wafer, and the ceramic plate is fixed to a cooling jacket with ceramic bolts having a low coefficient of thermal conductivity with an intervening heat insulating member. In order to transmit heat input in the wafer to the water-cooling jacket with high repeatability, a heat-conducting member having elasticity in the vertical direction is sandwiched between the ceramic plate and the cooling jacket. The degradation of temperature distribution of wafers due to the radiant heat radiation from the sidewall of the ceramic plate to the chamber can be minimized by covering the circumference of the ceramic plate with a radiation insulator.
    Type: Application
    Filed: September 3, 2002
    Publication date: March 11, 2004
    Inventors: Seiichiro Kanno, Ken Yoshioka, Ryoji Nishio, Saburou Kanai, Hideki Kihara, Koji Okuda, Manabu Edamura
  • Publication number: 20040040933
    Abstract: A method of processing a wafer, incorporating a processing chamber for subjecting a semiconductor wafer to a plasma process, a generator for generating plasma in the processing chamber, and a wafer stage for carrying thereon the semiconductor wafer so as to subject the semiconductor wafer to the plasma process, wherein the wafer stage has an attaching part for attachment to the wafer processing apparatus, which is commonly used among a plurality of wafer stages, and is configured to cope with a change of the wafer stage into a wafer stage having a different function, and a high frequency voltage for applying a bias voltage to the semiconductor wafer, and a D.C. voltage for providing a potential difference between the semiconductor wafer and the wafer stage are applied to the wafer stage.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 4, 2004
    Inventors: Seiichiro Kanno, Hironobu Kawahara, Mitsuru Suehiro, Saburou Kanai, Toshio Masuda
  • Publication number: 20040040662
    Abstract: A plasma processing apparatus having a process chamber, a process gas feeding pipe for introducing a process gas into the process chamber, a holding electrode for receiving and holding a sample placed in the process chamber, a bias-potential-generating radio-frequency power source for supplying a bias potential to the sample, and an induction coil to produce a plasma, wherein the process chamber comprises a conductor member, disposed to face a portion of an internal surface of the process chamber, for supplying a bias potential to the portion, and a detachable trap member having a surface for deposition of reaction products formed at another portion of the internal surface of the process chamber.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 4, 2004
    Inventors: Manabu Edamura, Seiichiro Kanno, Ryoji Nishio, Ken Yoshioka, Saburou Kanai, Tadamitsu Kanekiyo