Abstract: A request is received to program host data to a memory device of a memory sub-system. The host data is associated with a logical address. A redundancy factor that corresponds to the logical address associated with the host data is obtained. A first physical address associated with a first set of cells of the memory device and a second physical address associated with a second set of cells of the memory device are determined based on the redundancy factor. The first set of memory cells is to store the host data and the second set of memory cells is to store redundancy metadata associated with the host data. The host data is programmed to the first set of memory cells. The redundancy metadata associated with the host data is programmed to the second set of memory cells.

Abstract: A plurality of memory device life metrics are determined, where one of the plurality of memory device life metrics comprises a read count metric that specifies a number of read operations performed on the memory device. A plurality of normalized metric values are calculated, where each of the normalized metric values is based on a ratio of a respective memory device life metric to a respective lifetime target value associated with the respective memory device life metric. A normalized metric value that satisfies a selection criterion is identified from the plurality of normalized metric values. The identified normalized metric value corresponds to an amount of used device life of the memory device. An amount of remaining device life of the memory device is determined based on the identified normalized metric value. An indication of the amount of remaining device life is provided to a host system.

Abstract: A request to program host data to a memory device of a memory sub-system is received. Redundancy metadata associated with the host data is generated. A determination is made, in view of the received request, whether the host data is valid data or invalid data. In response to a determination that the host data is invalid data, updated redundancy metadata associated with the host data is generated. The updated redundancy metadata indicates that the host data is invalid data. The host data and the updated redundancy metadata is programmed to the memory device.

Abstract: A logical-to-physical (L2P) data structure and a physical-to-logical (P2L) data structure are maintained. The L2P data structure comprises table entries that map a logical address to a physical address. The P2L data structure comprises data entries that map a physical address to a logical address. The P2L data entries also comprise a data move status, a base address, and a boundary indicator. A move operation is detected, wherein the move operation indicates that data referenced by a logical address is to be moved from a source physical address to a destination physical address. Responsive to detecting the move operation, the data move status associated with the source physical address in the P2L data structure is updated.

Abstract: A memory access operation performed on a first memory unit of a memory device is detected. A counter associated with the first memory unit is modified. It is determined that the counter satisfies a threshold criterion, wherein the threshold criterion is based on a random or pseudo-random number within a margin of an average number of memory access operations. A refresh operation is performed on a second memory unit.

Abstract: A method includes performing a memory operation to access memory cells of a memory sub-system. The method can further include determining, for the memory operation, a quantity of memory cells available to be accessed during the performance of the memory operation. The method can further include determining that a quantity of memory cells that are accessed during the performance of the memory operation comprises fewer than the quantity of memory cells available to be accessed. The method can further include incrementing a counter in response to the determination that the quantity of memory cells accessed is fewer than the quantity of memory cells available to be accessed.

Abstract: A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.

Abstract: A corresponding value of a data state metric associated with each of a value of a plurality of values of a memory access operation parameter used in one or more memory access operation is measured. An optimal metric value based on the measured values of the predetermined data state metric is determined. An optimal value of the memory access operation parameter from the plurality of values of the memory access operation parameter is selected.

Abstract: An apparatus includes an error read flow component resident on a memory sub-system. The error read flow component can cause performance of a plurality of read recovery operations on a group of memory cells that are programmed or read together, or both. The error read flow component can determine whether a particular read recovery operation invoking the group of memory cells was successful. The error read flow component can further cause a counter corresponding to each of the plurality of read recovery operations to be incremented in response to a determination that the particular read recovery operation invoking the group of memory cells was successful.

Abstract: Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device performs operations comprising receiving a memory access command specifying a logical address; determining a physical address associated with the logical address; determining a portion of the memory device that is referenced by the physical address; determine an endurance factor associated with the portion; and increasing, by a value derived from the endurance factor, a media management metric associated with a management unit of the memory device, wherein the management unit is referenced by the physical address.

Abstract: Respective life expectancies of a first data unit and a second data unit of the memory device is obtained. A first initial age value corresponding to the first data unit and a second initial age value corresponding to the second data unit are determined. A lower one of the first initial age value and the second initial age value is identified. A first media management operation on a corresponding one of the first data unit or the second data unit associated with the lower one of the first initial age value and the second initial age value is performed. A second media management operation on the first data unit and the second data unit is performed.

Abstract: A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.

Abstract: A memory device is set to a performance mode. Data item is received. The data item in a page of a logical unit of the memory device associated with a fault tolerant stripe is stored. A redundancy metadata update for the fault tolerant stripe is delayed until a subsequent media management operation.

Abstract: A write operation performed on a first memory unit of a memory device is detected, wherein the first memory unit comprises one or more memory cells. Responsive to detecting the write operation, a value of a counter associated with the first memory unit is incremented. It is determined whether the value of the counter satisfies a threshold criterion, wherein the threshold criterion is based on a random or pseudo-random number within a defined range. Responsive to determining that the value of the counter satisfies the threshold criterion, a refresh operation is performed on a second memory unit.

Abstract: A corresponding value of a data state metric associated with each of a value of a plurality of values of a memory access operation parameter used in one or more memory access operation is measured. An optimal metric value based on the measured values of the predetermined data state metric is determined. An optimal value of the memory access operation parameter from the plurality of values of the memory access operation parameter is selected.

Abstract: A method includes providing, via a command, a request of enablement of a media management operation to a memory sub-system. The method further includes providing, via the command, an indication of one of a plurality of write types to the media management operation to the memory sub-system. The media management operation can be performed using the indicated write type in response to receipt of the command.

Abstract: An apparatus includes an error read flow component resident on a memory sub-system. The error read flow component can cause performance of a plurality of read recovery operations on a group of memory cells that are programmed or read together, or both. The error read flow component can determine whether a particular read recovery operation invoking the group of memory cells was successful. The error read flow component can further cause a counter corresponding to each of the plurality of read recovery operations to be incremented in response to a determination that the particular read recovery operation invoking the group of memory cells was successful.

Abstract: A method includes providing, via a command, a request of enablement of a media management operation to a memory sub-system. The method further includes providing, via the command, an indication of one of a plurality of write types to the media management operation to the memory sub-system. The media management operation can be performed using the indicated write type in response to receipt of the command.

Abstract: Systems and methods are disclosed including a memory device and a processing device, operatively coupled with the memory device, to perform operations comprising: receiving a write data request to store write data to the memory device; determining a physical block address associated with the write data request; performing a bitwise operation on each bit of the physical block address to generate a seed value; generating an output sequence based on the seed value; performing another bitwise operation on the output sequence and the write data to generate a randomized sequence; and storing, on the memory device, the randomized sequence.

Abstract: An apparatus includes an error read flow component resident on a memory sub-system. The error read flow component can cause performance of a plurality of read recovery operations on a group of memory cells that are programmed or read together, or both. The error read flow component can determine whether a particular read recovery operation invoking the group of memory cells was successful. The error read flow component can further cause a counter corresponding to each of the plurality of read recovery operations to be incremented in response to a determination that the particular read recovery operation invoking the group of memory cells was successful.