Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.

Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout.

Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout.

Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.

Abstract: A system and method for encoding and receiving data is provided. The data is encoded as a pulse amplitude modulated signal such that the amplitude signals do not transition from the highest signal level to the lowest signal level and do not transition from the lowest signal level to the highest signal level. The encoding and decoding is performed in some embodiments via a lookup table, and in further embodiments is designed to minimize the step between sequential pulse amplitude modulated symbols.

Abstract: An extraction system detects a voltage stored in a capacitor and then extracts energy from the capacitor when the voltage falls below a predetermined value. The capacitor may be an ultracapacitor formed in silicon or another semiconductor material, and the predetermined value may equal or be based on a minimum operating voltage of a load driven by the ultracapacitor. Once the energy is extracted, the system converts the energy into a voltage sufficient to continue driving the load. Energy extraction may be performed by a variety of circuits including a linear regulator, a switched capacitor voltage converter, an adiabatic amplifier, and a DC-to-DC boost converter. The system may further include a monitoring circuit which detects dynamic changes in the converted ultracapacitor voltage over to maintain the operating voltage of the load.

Abstract: In general, in one aspect, the disclosure describes a semiconductor device that includes a functional circuit and a dc-to-dc power converter. The power converter converts, regulates, and filters a DC input voltage to produce a DC output voltage and provides the DC output voltage to the functional circuit. The dc-to-dc power converter has an operating frequency above 10 MHz.

Abstract: A system and method for encoding and receiving data is provided. The data is encoded as a pulse amplitude modulated signal such that the amplitude signals do not transition from the highest signal level to the lowest signal level and do not transition from the lowest signal level to the highest signal level. The encoding and decoding is performed in some embodiments via a lookup table, and in further embodiments is designed to minimize the step between sequential pulse amplitude modulated symbols.

Abstract: A system and method for encoding and receiving data is provided. The data is encoded as a pulse amplitude modulated signal such that the amplitude signals do not transition from the highest signal level to the lowest signal level and do not transition from the lowest signal level to the highest signal level. The encoding and decoding is performed in some embodiments via a lookup table, and in further embodiments is designed to minimize the step between sequential pulse amplitude modulated symbols.

Abstract: An ultracapacitor formed on a semiconductor substrate includes a plurality conductive layers with intervening dielectric layers. These layers form a plurality of capacitors which may be connected in parallel to store a charge for powering an electronic circuit or for performing a variety of integrated circuit applications. A plurality of ultracapacitors of this type may be connected in series or may be designed in stacked configuration for attaining a specific charge distribution profile.

Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a power management die bonded to the CPU die in a three dimensional packaging layout.

Abstract: Packet processing techniques that can be used, for example, by a network protocol off-load engine. For example, the techniques may be used in an engine that performs transmission control protocol (TCP) operations for received packets for a host.

Abstract: A device includes a bus, a first transmitter connected to the bus and configured to transmit a first signal over the bus in a first frequency band, a second transmitter connected to the bus and configured to transmit a second signal over the bus in a second frequency band at the same time that the first transmitter is transmitting the first signal, a first receiver connected to the bus and configured to receive the first signal transmitted over the bus in the first frequency band, and a second receiver connected to the bus and configured to receive the second signal transmitted over the bus in the second frequency band. The first frequency band and the second frequency band occupy different portions of the frequency spectrum.

Abstract: The invention provides, in an embodiment, an apparatus, method and means for unintrusively observing, echoing and reading signals transmitted by one of a bus and wireless communication, without disturbing electrical properties of the bus, without adding bus latency, and without adding signal discontinuities. In an aspect, a buffer having a trigger is coupled with a component that connects to a memory bus, the buffer echoes signals to an observability port, and a diagnostic device reads the echoed signals. In an aspect, the bus is one of a simultaneous bi-directional (SBD) bus having ternary logic levels, a single ended bus, a differential bus, an optically coupled bus, a chipset bus, a frontside bus, an input/output (I/O) bus, a peripheral component interface (PCI) bus, and an industry standard architecture (ISA) bus. In an aspect, the buffer echoes bus signals having frequencies between 500 MHz. and 5 GHz. In an aspect, the buffer echoes bus signals having frequencies of at least 5 GHz.

Abstract: A light-emitting device and optical communication system based on the light-emitting device is disclosed. The light-emitting device is formed in a float-zone substrate. The light-emitting device includes on the substrate lower surface a reflective layer and on the upper surface spaced apart doped regions. The portion of the upper surface between the doped regions is textured and optionally covered with an antireflection coating to enhance light emission. The light-emitting device can operate as a laser or as a light-emitting diode, depending on the reflectivities of the antireflection coating and the reflective layer.

Abstract: Leakage power consumed by an integrated circuit is estimated as the difference between total power consumption and a nominal expected power consumption. Leakage power is reduced by cooling the integrated circuit in an active cooling system. By expending power in the active cooling system, the integrated circuit is cooled and the total power consumption is decreased. When the decrease in total power consumption is greater than the power expended in the cooling system, an overall power savings is achieved.

Abstract: A multiply-accumulate circuit includes a compressor tree to generate a product with a binary exponent and a mantissa in carry-save format. The product is converted into a number having a three bit exponent and a fifty-seven bit mantissa in carry-save format for accumulation. An adder circuit accumulates the converted products in carry-save format. Because the products being summed are in carry-save format, post-normalization is avoided within the adder feedback loop. The adder operates on floating point number representations having exponents with a least significant bit weight of thirty-two, and exponent comparisons within the adder exponent path are limited in size. Variable shifters are avoided in the adder mantissa path. A single mantissa shift of thirty-two bits is provided by a conditional shifter.

Abstract: An ultracapacitor formed on a semiconductor substrate includes a plurality conductive layers with intervening dielectric layers. These layers form a plurality of capacitors which may be connected in parallel to store a charge for powering an electronic circuit or for performing a variety of integrated circuit applications. A plurality of ultracapacitors of this type may be connected in series or may be designed in stacked configuration for attaining a specific charge distribution profile.

Abstract: In general, in one aspect, the disclosure describes a method for use in packet processing. The method can include receiving at least a portion of at least one packet and, based on the at least a portion of the at least one packet, determining a clock signal to provide to processing logic that processes the at least one packet.

Abstract: A light-emitting device and optical communication system based on the light-emitting device is disclosed. The light-emitting device is formed in a float-zone substrate. The light-emitting device includes on the substrate lower surface a reflective layer and on the upper surface spaced apart doped regions. The portion of the upper surface between the doped regions is textured and optionally covered with an antireflection coating to enhance light emission. The light-emitting device can operate as a laser or as a light-emitting diode, depending on the reflectivities of the antireflection coating and the reflective layer.