Abstract: A method of creating a barrier to metal contamination in interconnect and gate oxides comprises ion implantation of an alkaline earth metal into the silicon dioxide. The presence of the implanted alkaline earth metal, preferably calcium, traps metal contaminants and thereby creates a barrier to further contamination. Alternatively, the alkaline earth metal can be implanted into the silicon dioxide as a low energy plasma. The implantation of atomic calcium into gate oxide serves to trap boron and thereby minimize boron diffusion from a polysilicon gate into silicon.

Abstract: A method of preparing a polysilicon gate to minimize gate depletion and dopant penetration and to increase conductivity is revealed. Several monolayers of atomic are condensed onto a gate dielectric. Polysilicon is deposited onto the calcium and patterned in a standard way. The exposed calcium is then removed by raising the temperature to approximately 600° C. The calcium remaining between the gate dielectric and the polysilicon blocks channeling of dopant to minimize depletion and penetration, increase conductivity, and allow for longer and higher-temperature annealing.

Abstract: Embodiments of the invention include a capping layer of alloy material formed over a copper-containing layer, the alloy configured to prevent diffusion of copper through the capping layer. In another embodiment the alloy capping layer is self-aligned to the underlying conducting layer. Specific embodiments include capping layers formed of alloys of copper with materials including but not limited to calcium, strontium, barium, and other alkaline earth metals, as well as materials from other groups, for example, cadmium or selenium. The invention also includes methods for forming an alloy capping layer on a copper-containing conducting structure. One such method includes providing a substrate having formed thereon electrically conducting layer comprised of a copper-containing material and forming an alloy capping layer on the electrically conducting layer. In another method embodiment, forming the alloy capping layer includes forming a self-aligned capping layer over the conducting layer.

Abstract: A method of forming a layer over a substrate is provided. Generally, a layer of a first reactive species is deposited over the substrate. The layer of the first reactive species is reacted with a second reactive species to create a first product. Unreacted reactive species is preferentially desorbed leaving a layer of the first product.

Abstract: A new relatively high-k gate dielectric gate material comprising calcium oxide will reduce leakage from the silicon substrate to the polysilicon gate, prevent boron penetration in p-channel devices, and reduce electron trapping in the dielectric. The surface of a silicon wafer is saturated with hydroxyl groups. A calcium halide, preferably calcium bromide, is heated to a temperature sufficient to achieve atomic layer deposition, and is transported to the silicon wafer. The calcium halide reacts with the hydroxyl groups. Water is added to carry away the resultant hydrogen halide. Gaseous calcium and water are then added to form a calcium oxide gate dielectric, until the desired thickness has been achieved. In an alternative embodiment of the method, the calcium halide is transported to the silicon wafer to react with the hydroxyl groups, followed by transport of gaseous water to the silicon wafer. These two steps are repeated until the desired thickness has been achieved.

Abstract: A method of forming a reticle is provided. In general, a metal containing material is vaporized through simple vaporization. The metal containing material is condensed on a substrate to form a metal containing layer on the substrate. A patterned photoresist layer is formed over the metal containing layer, defining exposed metal containing layer regions and covered metal containing layer regions. The metal containing layer in the exposed metal containing layer regions is removed from the substrate, while the metal containing layer in the covered metal containing layer regions remains on the substrate to form a metal containing mask. The substrate is plasma etched. The remaining metal containing layer is removed from the substrate.

Abstract: A method of chemically altering a silicon surface and associated dielectric materials are disclosed.

Abstract: The invention provides a process for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes containing one or more organofluoro silanes having the formula SiR1R2R3R4, where: (a) R1 is selected from H, a 3 to 10 carbon alkyl, and an alkoxy; (b) R2 contains at least one C atom bonded to at least one F atom, and no aliphatic C—H bonds; and (c) R3 and R4 are selected from H, alkyl, alkoxy, a moiety containing at least one C atom bonded to at least one F atom, and ((L)Si(R5)(R6))n(R7); where n ranges from 1 to 10; L is O or CFR8; each n R5 and R6 is selected from H, alkyl, alkoxy, and a moiety containing at least one C atom bonded to at least one F atom; R7 is selected from H, alkyl, alkoxy, and a moiety containing at least one C atom bonded to at least one F atom; and each R8 is selected from H, alkyl, alkoxy, and a moiety containing at least one C atom bonded to at least one F atom.

Abstract: A process is provided for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes including one or more organofluoro silanes characterized by the absence of aliphatic C—H bonds. In one embodiment, the process is carried out using a mild oxidizing agent. Also provided is a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material for use in an integrated circuit structure containing silicon atoms bonded to oxygen atoms, silicon atoms bonded to carbon atoms, and carbon atoms bonded to fluorine atoms, where the dielectric material is characterized by the absence of aliphatic C—H bonds and where the dielectric material has a ratio of carbon atoms to silicon atoms of C:Si greater than about 1:3.

Abstract: A method of chemically altering a silicon surface and associated dielectric materials are disclosed.

Abstract: A method of forming a narrow isolation structure in a semiconducting substrate. The isolation structure is a trench that has a bottom and sidewalls, and that is to be filled with an isolating material. The isolating material has desired electrical properties and desired chemical properties, and is substantially reactively grown from the semiconducting substrate. A precursor material layer is formed on the bottom of the trench and on the sidewalls of the trench. The precursor material layer has electrical properties and chemical properties that are substantially similar to the desired electrical properties and the desired chemical properties of the isolating material. A substantial portion of the precursor material layer is removed from the bottom of the trench to expose the semiconducting substrate at the bottom of the trench, while leaving a substantial portion of the precursor material layer on the sidewalls of the trench.

Abstract: A method of forming a narrow isolation structure in a semiconducting substrate. The isolation structure is a trench that has a bottom and sidewalls, and that is to be filled with an isolating material. The isolating material has desired electrical properties and desired chemical properties, and is substantially reactively grown from the semiconducting substrate. A precursor material layer is formed on the bottom of the trench and on the sidewalls of the trench. The precursor material layer has electrical properties and chemical properties that are substantially similar to the desired electrical properties and the desired chemical properties of the isolating material. A substantial portion of the precursor material layer is removed from the bottom of the trench to expose the semiconducting substrate at the bottom of the trench, while leaving a substantial portion of the precursor material layer on the sidewalls of the trench.

Abstract: A process is provided for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes including one or more organofluoro silanes characterized by the absence of aliphatic C—H bonds. In one embodiment, the process is carried out using a mild oxidizing agent. Also provided is a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material for use in an integrated circuit structure containing silicon atoms bonded to oxygen atoms, silicon atoms bonded to carbon atoms, and carbon atoms bonded to fluorine atoms, where the dielectric material is characterized by the absence of aliphatic C—H bonds and where the dielectric material has a ratio of carbon atoms to silicon atoms of C:Si greater than about 1:3.

Abstract: Embodiments of the invention include a capping layer of alloy material formed over a copper-containing layer, the alloy configured to prevent diffusion of copper through the capping layer. In another embodiment the alloy capping layer is self-aligned to the underlying conducting layer. Specific embodiments include capping layers formed of alloys of copper with materials including but not limited to calcium, strontium, barium, and other alkaline earth metals, as well as materials from other groups, for example, cadmium or selenium. The invention also includes methods for forming an alloy capping layer on a copper-containing conducting structure. One such method includes providing a substrate having formed thereon electrically conducting layer comprised of a copper-containing material and forming an alloy capping layer on the electrically conducting layer. In another method embodiment, forming the alloy capping layer includes forming a self-aligned capping layer over the conducting layer.

Abstract: In accordance with the invention a high-k gate dielectric is formed by the steps of first forming a silicon oxide layer over a silicon substrate and then exposing the silicon oxide to a flux of low energy plasma containing metal ions which, when inserted into silicon oxide, form a high-k dielectric material suitable for use as a high-k gate dielectric. In one embodiment, the silicon oxide is exposed to a first plasma containing a first species of metal ions and then to a plasma of another species of metal ions which, when inserted into the silicon oxide with the metal ions in the first plasma, further increase the dielectric constant of the silicon oxide.

Abstract: The invention provides a process for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes containing one or more organofluoro silanes having the formula SiR1R2R3R4, where: (a) R1 is selected from H, a 3 to 10 carbon alkyl, and an alkoxy; (b) R2 contains at least one C atom bonded to at least one F atom, and no aliphatic C-H bonds; and (c) R3 and R4 are selected from H, alkyl, alkoxy, a moiety containing at least one C atom bonded to at least one F atom, and ((L)Si(R5)(R6))n(R7); where n ranges from 1 to 10; L is O or CFR8; each n R5 and R6 is selected from H, alkyl, alkoxy, and a moiety containing at least one C atom bonded to at least one F atom; R7 is selected from H, alkyl, alkoxy, and a moiety containing at least one C atom bonded to at least one F atom; and each R8 is selected from H, alkyl, alkoxy, and a moiety containing at least one C atom bonded to at least one F atom.

Abstract: The invention provides a process for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes that include one or more organofluoro silanes selected from: (a) an organofluoro silane containing two silicon atoms linked by one oxygen atom; (b) an organofluoro silane containing two silicon atoms linked by one or more carbon atoms, where the one or more carbon atoms each are bonded to one or more fluorine atoms, or to one or more organofluoro moieties, or to a combination thereof; and (c) an organofluoro silane containing a silicon atom bonded to an oxygen atom. The invention also provides a process for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes that include one or more organofluoro silanes characterized by the presence of Si—O bonds.

Abstract: A process is provided for forming a low k fluorine and carbon-containing silicon oxide dielectric material by reacting with an oxidizing agent one or more silanes including one or more organofluoro silanes characterized by the absence of aliphatic C—H bonds. In one embodiment, the process is carried out using a mild oxidizing agent. Also provided is a low dielectric constant fluorine and carbon-containing silicon oxide dielectric material for use in an integrated circuit structure containing silicon atoms bonded to oxygen atoms, silicon atoms bonded to carbon atoms, and carbon atoms bonded to fluorine atoms, where the dielectric material is characterized by the absence of aliphatic C—H bonds and where the dielectric material has a ratio of carbon atoms to silicon atoms of C:Si greater than about 1:3.

Abstract: A process for inhibiting the passage of dopant from a gate electrode into a thin gate oxide comprises nitridation of the upper surface of the thin gate oxide, prior to formation of the gate electrode over the gate oxide, to thereby form a barrier of nitrogen atoms in the upper surface region of the gate oxide adjacent the interface between the gate oxide and the gate electrode to inhibit passage of dopant atoms from the gate electrode into the thin gate oxide during annealing of the structure. In one embodiment, a selective portion of silicon oxide on a silicon substrate may be etched to thin the oxide to the desired thickness using a nitrogen plasma with a bias applied to the silicon substrate. Nitridation of the surface of the etched silicon oxide is then carried out in the same apparatus by removing the bias from the silicon substrate.

Abstract: A process is described for using a silicon layer as an implant and out-diffusion layer, for forming defect-free source/drain regions in a semiconductor substrate, and also for subsequent formation of silicon nitride spacers. A nitrogen-containing dopant barrier layer is first formed over a single crystal semiconductor substrate by nitridating either a previously formed gate oxide layer, or a silicon layer formed over the gate oxide layer, to form a barrier layer comprising either a silicon, oxygen, and nitrogen compound or a compound of silicon and nitrogen. The nitridating may be carried out using a nitrogen plasma followed by an anneal. A polysilicon gate electrode is then formed over this barrier layer, and the exposed portions of the barrier layer remaining are removed. An amorphous silicon layer of predetermined thickness is then formed over the substrate and polysilicon gate electrode.