Patents by Inventor Shi-Yun Cho

Shi-Yun Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110155426
    Abstract: An embedded circuit board is disclosed including a first copper clad laminate formed with a plurality of cavities and including a plurality of chips having different thicknesses embedded in the cavities, a second copper clad laminate provided in the cavities to allow the first copper clad laminate to level with the chips; and a resin coated copper foil provided on upper surfaces of the first and second copper clad laminates.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 30, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Wan PARK, Shi-Yun Cho, Byung-Jik Kim, Ho-Seong Seo, Youn-Ho Chol, Yu-Su Kim, Seok-Myong Kang, Ji-Hyun Jung
  • Publication number: 20110157858
    Abstract: Provided is a System-In-Package (SIP) having embedded circuit boards in which boards are electrically connected and a plurality of chips are embedded in a board in a stacked manner. The SIP includes a first board on a surface of which a first circuit is formed, a second board which is provided on a top surface of the first board in a stacked manner and includes a plurality of chips embedded therein in a stacked manner, and a third board which is provided on a top surface of the second board in a stacked manner and on a surface of which a second circuit is formed.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 30, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ji-Hyun Jung, Byung-Jik Kim, Shi-Yun Cho, Ho-Seong Seo, Kyung-Wan Park, Yeun-Ho Choi, Yu-Su Kim, Seok-Myong Kang
  • Patent number: 7902652
    Abstract: Disclosed are a semiconductor package and semiconductor system in package using the same. The semiconductor package includes: a printed circuit board (PCB); a semiconductor die disposed on the PCB and having conductive posts formed on an upper surface of the semiconductor die; and a molding formed on the PCB to cover the semiconductor die, wherein the conductive posts have a surface exposed out of an upper surface of the molding. The semiconductor system in package includes: a first semiconductor package having a semiconductor die on which conductive posts are formed, and a molding formed so that upper surfaces of the conductive posts are exposed; and a second semiconductor package disposed on the first semiconductor package and electrically connected to the conductive posts.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ho-Seong Seo, Shi-Yun Cho, Young-Min Lee, Sang-Hyun Kim
  • Publication number: 20100140782
    Abstract: A Printed Circuit Board (PCB) is provided in which at least one built-in Integrated Circuit (IC) package has a plurality of conductive bumps on an IC. The plurality of conductive bumps are for external electrical connection. The IC package is accommodated within a core layer of a multi-layer PCB by a connection member on the IC. The connection member is formed between the conductive bumps and the core layer with contact holes in contact with the conductive bumps. The conductive bumps are electrically connected through conductor layers formed in the contact holes.
    Type: Application
    Filed: December 8, 2009
    Publication date: June 10, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hyun Kim, Shi-Yun Cho, Young-Min Lee, Kyu-sub Kwak, Youn-Ho Choi
  • Publication number: 20100146463
    Abstract: A watch phone and a method for handling an incoming call using the watch phone are provided. In the watch phone, a display device includes a touch screen panel and a display, turns off the touch screen panel in a watch mode, turns on the touch screen panel in an idle mode or upon receipt of an incoming call, and displays at least two areas for call connection and call rejection, upon receipt of the incoming call. A single mode selection key selects one of the watch mode and the idle mode. A controller performs control operations so that the touch screen panel is turned off in the watch mode and is turned on in the idle mode or upon receipt of the incoming call, and connects or rejects the incoming call, when the at least two areas for call connection or call rejection, which are displayed upon receipt of the incoming call, are pointed to or dragged to.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 10, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Shi-Yun CHO, Ji-Hyun Jung, Ho-Jin Lee, Young-Min Lee, Ho-Seong Seo, Youn-Ho Choi
  • Publication number: 20100007475
    Abstract: An apparatus and method for allowing a user to dynamically enjoy a video. A difference between image data is computed at every preset unit of time and a vibration corresponding to the computed difference is generated so that the user can sense a motion change of an object within the video. Upon video reproduction, scenes are displayed by applying the lighting effect of a strobe light or the like between the scenes to be reproduced. Upon video reproduction, more enjoyment and various haptic effects can be provided to the user.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 14, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ho-Jin Lee, Young-Min Lee, Shi-Yun Cho, Ho-Seong Seo, Youn-Ho Choi, Ji-Hyun Jung
  • Publication number: 20090124126
    Abstract: A SIM card connector of a portable wireless terminal has a structure that forms a space thereunder using its lower edges to place electronic parts of a printed circuit board (PCB) within the space, so that the PCB can increase its space efficiency. The SIM card connector further forms an electromagnetic wave shield around the space, so that the electromagnetic wave shield can block electromagnetic waves generated from the electronic parts.
    Type: Application
    Filed: July 17, 2008
    Publication date: May 14, 2009
    Inventors: Shi Yun CHO, Shin Hee Cho
  • Publication number: 20090057001
    Abstract: An IC package includes: a multi-layered PCB having a plurality of insulating layers and a plurality of conductive pattern layers stacked in sequence and a plurality of via-holes formed through the plurality of the insulating layers for an electrical connection between the layers; and an IC chip disposed in a core insulating layer of the plurality of the insulating layers to be embedded in the multi-layered PCB and including a plurality of input/output pads on their surface. The input/output pads disposed at an outermost area of the IC chip are coupled to outer terminals by connection members without passing through said via-hole, the remaining input/output pads except for the input/output pads disposed at the outermost area of the IC chip are coupled to the outer terminals through the via-hole.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 5, 2009
    Inventors: Ji-Hyun JUNG, Shi-Yun Cho, Young-Min Lee, Youn-Ho Choi
  • Publication number: 20080273314
    Abstract: A multi-layer PCB includes a plurality of insulating layers and a plurality of conductive pattern layers alternatively and repeatedly stacked; contact-hole formed in the insulating layers so as to allow electrical connection through the contact-holes; a first integrated circuit arranged in a first insulating layer as one of the insulating layers so as to be embedded in the multi-layer PCB, the first integrated circuit having a plurality of connection bumps for electric connection on an upper surface of the first integrated circuit; and a second integrated circuit stacked on a lower surface of the first integrated circuit, the second integrated circuit having a plurality of connection bumps for electric connection on an upper surface of the second integrated circuit.
    Type: Application
    Filed: April 25, 2008
    Publication date: November 6, 2008
    Inventors: Shi-Yun Cho, Ho-Seong Seo, Youn-Ho Choi
  • Publication number: 20080191337
    Abstract: A semiconductor die package having an enhanced degree of heating radiation from the semiconductor, thereby reducing mechanical and electrical failure from excessive temperatures. A semiconductor die has circuit patterns formed thereon; a bump pad deposited on the semiconductor die and supporting at least one of the bumps electrically connected to the circuit patterns; and a radiating pad formed on an upper surface of the bump pad such that the radiating pad surrounds the bumps. An embedded printed circuit substrate includes a radiating pad formed on the bump pad to surround the bumps; and a core substrate has a through-hole formed in the core substrate, that extends from an upper surface of the core substrate to a lower surface thereof. The semiconductor die is deposited on the upper surface of the core substrate such that the bumps extend through the through-hole.
    Type: Application
    Filed: February 12, 2008
    Publication date: August 14, 2008
    Inventor: Shi-Yun CHO
  • Publication number: 20080192449
    Abstract: An electric circuit package includes: a printed circuit substrate having an insulating layer and conductive pattern layers formed on an upper surface of the insulating layer; at least one of electronic parts disposed on an upper surface of the printed circuit substrate; at least one of conductive pins electrically connected to an conductive pattern layer providing grounding among the conductive pattern layers; and a molding member formed on the insulating layer in such a manner that the conductive pins and the electric parts are buried in the molding member, wherein each conductive pin has an upper surface exposed to an upper part of the molding member.
    Type: Application
    Filed: February 11, 2008
    Publication date: August 14, 2008
    Inventors: Dong-Churl Kim, Shi-Yun Cho, Hong-Kweun Kim, Kyu-Sub Kwak, Kyung-Wan Park, Seung-Woo Han
  • Publication number: 20080117608
    Abstract: Disclosed are a multi-layer PCB and a fabricating method thereof. The multi-layer PCB includes: a core; a plurality of insulation layers and a plurality of conductive pattern layers alternatively stacked on both sides of the core; and a plurality of via holes formed through the core and the insulation layers. The fabricating method may includes the steps of: forming a conductive pattern layer on each of both sides of a core, and forming via holes through the core; attaching a double-stick tape with weak adhesive strength to a portion of each of a upper surface and a lower surface of the core; and forming an insulation layer on each of a upper surface and a lower surface of the core to cover the double-stick tapes, and forming a conductive pattern layer on each of the insulation layers.
    Type: Application
    Filed: October 17, 2007
    Publication date: May 22, 2008
    Inventors: Ho-Seong Seo, Young-Min Lee, Shi-Yun Cho, Youn-Ho Choi, Sang-Hyun Kim
  • Publication number: 20080073797
    Abstract: A semiconductor die module, a semiconductor package, and a fabrication method of the semiconductor package. A method for manufacturing a semiconductor package includes the steps of: preparing a printed circuit board in which a hole is formed to extend through a core, and an insulation layer and a circuit pattern are formed on a surface of the core, the printed circuit board having an open surface; forming conductive bumpers on some of the electric pads of each semiconductor die; forming a semiconductor die module in which the electric pads of each semiconductor die are connected to one another; inserting the semiconductor die module into the hole of the core so as to safely seat the semiconductor die module on the insulation layer and the circuit pattern; and forming the insulation layer and the circuit patterns on an open upper surface of the core.
    Type: Application
    Filed: September 6, 2007
    Publication date: March 27, 2008
    Inventors: Sang-Hyun Kim, Shi-Yun Cho, Ho-Seong Seo, Youn-Ho Choi
  • Publication number: 20080073771
    Abstract: Disclosed are a semiconductor package and semiconductor system in package using the same. The semiconductor package includes: a printed circuit board (PCB); a semiconductor die disposed on the PCB and having conductive posts formed on an upper surface of the semiconductor die; and a molding formed on the PCB to cover the semiconductor die, wherein the conductive posts have a surface exposed out of an upper surface of the molding. The semiconductor system in package includes: a first semiconductor package having a semiconductor die on which conductive posts are formed, and a molding formed so that upper surfaces of the conductive posts are exposed; and a second semiconductor package disposed on the first semiconductor package and electrically connected to the conductive posts.
    Type: Application
    Filed: August 21, 2007
    Publication date: March 27, 2008
    Inventors: Ho-Seong Seo, Shi-Yun Cho, Young-Min Lee, Sang-Hyun Kim
  • Publication number: 20080061404
    Abstract: An electronic circuit package and fabricating method thereof. The method includes: integrating a radio frequency circuit device and a semiconductor die on a printed circuit board; forming a bumper pad of metal on the printed circuit board around the radio frequency circuit device; forming a molding on the printed circuit board to include the radio frequency circuit device and the semiconductor die therein; and forming one or more grooves on a portion of the molding and inserting a can into the grooves. The electronic circuit package includes: a printed circuit board; a radio frequency circuit device and a semiconductor die integrated on the printed circuit board; a molding formed on the printed circuit board to include the radio frequency circuit device and the semiconductor die therein; one or more grooves formed in the molding to enclose the radio frequency circuit device; and a can inserted into the grooves.
    Type: Application
    Filed: August 24, 2007
    Publication date: March 13, 2008
    Inventors: Shi-Yun Cho, Young-Min Lee, Youn-Ho Choi, Ho-Seong Seo, Sang-Hyun Kim
  • Patent number: 7300212
    Abstract: A semiconductor optical package for optical communication includes a cooling plate dissipating internal heat generated from the semiconductor optical package and having one or more grooves passing through top and bottom surfaces thereof. There is a housing having one or more slots formed on its bottom face, the housing at least partly enclosing an optical transmission module resting on the cooling plate such that the respective slots thereof correspond to the respective grooves of the cooling plate. There are also one or more screws passing through the grooves and inserted into the slots for coupling the housing to the optical transmission module.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: November 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Shi-Yun Cho
  • Patent number: 7301751
    Abstract: An embedded capacitor comprises a first substrate on which a plurality of electrically insulated electrode patterns and a ground pattern are formed, a second substrate separated from the first substrate, a plurality of dielectric layers stacked between the first and second substrates, a plurality of metal layers inserted between the dielectric layers and connected to the electrode patterns of the first substrate, and a plurality of ground layers inserted between the dielectric layers alternately with the metal layers.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: November 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jea-Hyuck Lee, Young-Min Lee, Shi-Yun Cho, Shin-Hee Cho, Kyung-Wan Park
  • Patent number: 7245644
    Abstract: A semiconductor monolithic integrated optical transmitter including a plurality of active layers formed on a semiconductor substrate is disclosed, which comprises: a distributed feedback laser diode including a grating for reflecting light with a predetermined wavelength and a first active layer for oscillating received light from the grating; an electro-absorption modulator including a second active layer for receiving light from the first active layer, wherein the received light intensity is modulated through a change of absorbency in accordance with an applied voltage; an optical amplifier including a third active layer for amplifying received light from the second active layer; a first optical attenuator between the first active layer and the second active layer; and a second optical attenuator between the second active layer and the third active layer.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: July 17, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Kwon Kang, Shi-Yun Cho, In Kim, Do-Young Rhee, Tae-Il Kim, Dong-Hoon Jang, Seung-Won Lee, Duk-Ho Jeon, June-Hyeon Ahn, Young-Min Lee, Jong-Ryeol Kim
  • Patent number: 7236505
    Abstract: A Fabry-Perot laser generates a mode-locked channel having the same wavelength as that of light injected into the laser. The laser includes a semiconductor substrate and a lower cladding layer formed on the substrate. An active layer is formed on the lower cladding layer and has a band gap distribution that continuously varies in a longitudinal direction of the substrate. The laser further includes an upper cladding layer formed on the active layer and the lower cladding layer.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: June 26, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Shi-Yun Cho
  • Publication number: 20060181389
    Abstract: A thin film type resistor is disclosed. The thin film type resistor comprises first and second pads, a first resistance layer, and a second resistance layer. The first and second resistance layers are spaced apart from each other. Both ends of a first resistance layer are connected to the first and second pads. A second resistance layer is disposed on the first resistance layer, and has a resistance value different from that of the first resistance layer.
    Type: Application
    Filed: January 12, 2006
    Publication date: August 17, 2006
    Inventor: Shi-Yun Cho