Abstract: A chip package comprises a chip having a first temperature sensor. The first temperature sensor is configured to measure a first temperature of the chip in a localized area around the first temperature sensor. The chip package also includes a chip carrier coupled to the chip via a plurality of solder connections. The chip carrier includes a second temperature sensor vertically aligned with the first temperature sensor. The second temperature sensor is configured to measure a second temperature of the chip carrier in a localized area around the second temperature sensor. The chip carrier further includes a localized heater element located near the second temperature sensor and configured to generate heat in response to a detected difference based on comparison of the first temperature and the second temperature such that the detected difference is adjusted in the localized area around the first temperature sensor.

Abstract: An aquatic weed planting plate for an aquarium is provided. The aquatic weed planting plate for aquarium includes a plate body and at least four feet. A plurality of planting holes is formed in the plate body at intervals. A plurality of dirt collecting holes is formed around each planting hole. The plate body is provided with fixing devices for fixing aquatic weeds, and each fixing device corresponds to one planting hole. The fixing device includes a fixing sleeve, two clamping members and a luminous ring. The plate body is provided with nets for collecting dirt, each net corresponds to one dirt collecting hole, the lower portion of each net is provided with a connecting tube; a plurality of conveying pipes is also arranged below the plate body, each conveying pipe is communicated with the plurality of connecting tubes, each connecting tube is communicated with the corresponding conveying pipe.

Abstract: A technique relates to an electronic package. A substrate is configured to receive a chip. A stiffener is attached to the substrate. The stiffener includes a core material with a first material formed on opposing sides of the core material.

Abstract: An integrated circuit package substrate (ICPS) system includes a die including a first array of connectors and a substrate including a second array of connectors that is configured to be thermocompression bonded to the first array of connectors at a bonding temperature that is above a solder melting temperature. The first die is bonded to the substrate such that the first die is asymmetric with respect to a substrate center, and the second array of connectors is adjusted, at an alignment temperature that is below the solder melting temperature, for thermal expansion to the bonding temperature with respect to a reference point that is not a first die center.

Abstract: Structural combinations of TIMs and methods of combining these TIMs in semiconductor packages are disclosed. An embodiment forms the structures by selectively metallizing a backside of a semiconductor chip (chip) on chip hot spots, placing a higher performance thermal interface material (TIM) on the metallized hot spots, selectively metalizing an underside of a lid in one or more metalized lid locations, and assembling a lid over the backside of the chip to create an assembly so that metalized lid locations are in contact with the higher performance TIMs. A lower performance TIM fills the region surrounding the higher performance TIM on the underside of the lid enclosing the chips. Disclosed are methods of disposing both solid and dispensable TIMs, curing and not curing the thermal interface, and structures to keep the TIMs in place while assembly the package and compressing dispensable TIMs.

Abstract: A module includes a substrate having a plurality of contact regions, and a spacer-chip assembly. The spacer-chip assembly in turn includes at least first and second semiconductor dies, each having a plurality of electrical interconnect pillars and a plurality of contact pads, and a spacer wafer. The at least first and second semiconductor dies are secured to the spacer wafer, and the spacer wafer includes at least first and second semiconductor circuit features coupled to a first portion of the contact pads of the at least first and second semiconductor dies. The spacer wafer includes wiring electrically coupling the at least first and second semiconductor dies via a second portion of the contact pads. The spacer wafer has a plurality of holes formed therethrough. The plurality of electrical interconnect pillars extend through the holes and are secured to the contact regions on the substrate.

Abstract: A module includes a substrate having a plurality of contact regions, and a spacer-chip assembly. The spacer-chip assembly in turn includes at least first and second semiconductor dies, each having a plurality of electrical interconnect pillars and a plurality of contact pads, and a spacer wafer. The at least first and second semiconductor dies are secured to the spacer wafer, and the spacer wafer includes at least first and second semiconductor circuit features coupled to a first portion of the contact pads of the at least first and second semiconductor dies. The spacer wafer includes wiring electrically coupling the at least first and second semiconductor dies via a second portion of the contact pads. The spacer wafer has a plurality of holes formed therethrough. The plurality of electrical interconnect pillars extend through the holes and are secured to the contact regions on the substrate.

Abstract: Tamper-respondent assemblies are provided which include a circuit board, an enclosure assembly mounted to the circuit board, and a pressure sensor. The circuit board includes an electronic component, and the enclosure assembly is coupled to the circuit board to enclose the electronic component within a secure volume. The enclosure assembly includes an enclosure with a sealed inner compartment, and a structural material within the sealed inner compartment of the enclosure. The structural material within the enclosure inhibits deflection of the enclosure due to a pressure differential between pressure of the sealed inner compartment and pressure around, at least in part, the enclosure. The pressure sensor senses pressure within the sealed inner compartment of the enclosure to facilitate identifying a pressure change indicative of a tamper event.

Abstract: A module includes a substrate having a plurality of contact regions, and a spacer-chip assembly. The spacer-chip assembly in turn includes at least first and second semiconductor dies, each having a plurality of electrical interconnect pillars and a plurality of contact pads, and a spacer wafer. The at least first and second semiconductor dies are secured to the spacer wafer, and the spacer wafer includes at least first and second semiconductor circuit features coupled to a first portion of the contact pads of the at least first and second semiconductor dies. The spacer wafer includes wiring electrically coupling the at least first and second semiconductor dies via a second portion of the contact pads. The spacer wafer has a plurality of holes formed therethrough. The plurality of electrical interconnect pillars extend through the holes and are secured to the contact regions on the substrate.

Abstract: Systems and/or techniques associated with active control of electronic package warpage are provided. In one example, a system includes an electronic package and an integrated circuit. The electronic package includes a patterned structural material associated with a mechanical characteristic that changes in response to an applied condition. The integrated circuit controls the applied condition associated with the patterned structural material based on sensor data associated with a status of the electronic package.

Abstract: The present invention discloses a door-in-door having a display screen assembly and a refrigerator having the same. The door-in-door comprises a first door body and a second door body; the first door body has a transparent panel, and the second door body is provided with a display screen assembly. When the first door body closes the cabinet, a display interface of the display screen assembly is displayed through the transparent panel of the first door body. According to the present invention, an operation state of the refrigerator can be learnt about without opening the first door body.

Abstract: An electronic apparatus that includes a semiconductor device; an electronic packaging substrate for receiving the semiconductor device; a thermal interface material on the semiconductor device; and a lid in contact with the thermal interface material and having a zone of targeted flexibility spaced from the semiconductor device.

Abstract: An integrated circuit (IC) package, and a method for fabricating an IC package is described. A set of semiconductor chips, a set of corner guard structures and a chip carrier are provided. The set of semiconductor chips and the set of corner guard structure placed and bonded to a first surface of the chip carrier. The set of semiconductor chips are in electrical contact with the chip carrier. Respective corner guard structures are placed proximate to the corners of respective semiconductor chips. The coefficient of thermal expansion (CTE) of the set of corner guard structures is selected to ameliorate chip-package interaction (CPI) related failures due to differences between a CTE of the set of semiconductor chips and a CTE of the chip carrier.

Abstract: In some examples, an electronic package and methods for forming the electronic package are described. The electronic package can be formed by disposing an interposer on a surface of a substrate having a first pitch wiring density. The interposer can have a second pitch wiring density different from the first pitch wiring density. A layer of non-conductive film can be situated between the interposer and the surface of the substrate. A planarization process can be performed on a surface of the substrate. A solder resist patterning can be performed on the planarized surface the substrate. A solder reflow and coining process can be performed to form a layer of solder bumps on top of the planarized surface of the substrate. The interposer can provide bridge connection between at least two die disposed above the substrate. Solder bumps under the interposer electrically connect the substrate and the interposer.

Abstract: Moisture-driven degradation of a crack stop in a semiconductor die is mitigated by forming a groove in an upper surface of the die between an edge of the die and the crack stop; entirely filling the groove with a moisture barrier material; preventing moisture penetration of the semiconductor die by presence of the moisture barrier material; and dissipating mechanical stress in the moisture barrier material without presenting a stress riser in the bulk portion of the die. The moisture barrier material is at least one of moisture-absorbing, moisture adsorbing, and hydrophobic.

Abstract: An integrated circuit (IC) module includes a carrier and multiple IC devices. A heterogenous seal band connects a lid to the carrier. A perimeter wall of the lid is joined to a low modulus seal band and an inner wall of the lid is joined to a high modulus seal band. The low modulus seal band is located around the perimeter of the lid and a perimeter of the multiple IC devices. The high modulus seal band is located between the multiple IC devices. The low modulus seal band has a low resistance to being deformed elastically and the high modulus seal band has a high resistance to being deformed elastically. The low modulus seal band allows for dimensional fluctuations between the lid and carrier. The high modulus seal band allows for adequate joining of the lid and the carrier with relatively less seal band material.

Abstract: Structural combinations of TIMs and methods of combining these TIMs in semiconductor packages are disclosed. An embodiment forms the structures by selectively metallizing a backside of a semiconductor chip (chip) on chip hot spots, placing a higher performance thermal interface material (TIM) on the metallized hot spots, selectively metalizing an underside of a lid in one or more metalized lid locations, and assembling a lid over the backside of the chip to create an assembly so that metalized lid locations are in contact with the higher performance TIMs. A lower performance TIM fills the region surrounding the higher performance TIM on the underside of the lid enclosing the chips. Disclosed are methods of disposing both solid and dispensable TIMs, curing and not curing the thermal interface, and structures to keep the TIMs in place while assembly the package and compressing dispensable TIMs.

Abstract: An electronic system includes two integrated circuit (IC) packages that are connected by a package to package (PP) connector. The PP connector may include cabling between a first cabling connector and a second cabling connector. The first cabling connector may be seated to a first carrier connector upon a first IC device carrier of the first IC device package. The second cabling connector may be seated to a second carrier connector upon a second IC device carrier of the second IC device package. The electronic system may further include a heat sink connected to the IC packages, to the first cabling connector, and to the second cabling connector. An IC device may route I/O data through the PP connector, effectively increasing the number of I/O routes.

Abstract: A multiple chip carrier assembly including a carrier having a first surface and a second surface is attached to a plurality of chips is described. The plurality of chips include a first chip and a second chip. Each of the chips has first surface with a first set of solder balls for connecting to a package and a second set of solder balls for connecting to a high signal density bridge element. A second surface of each chip is bonded to the first surface of the carrier. A package has a first surface which is connected to the first sets of solder balls of the first and second chips. A high signal density bridge element having high signal density wiring on one or more layers is connected to the second sets of solder balls of the first and second chips. The bridge element is disposed between the first surface of the package and the first surfaces of the first and second chips.

Abstract: The present invention discloses a refrigerator and a control method thereof. The refrigerator comprises a door body with an inner door and an outer door, a locking mechanism for locking the outer door, an unlocking mechanism for unlocking the outer door, and a detection unit for detecting an open state and a closed state of the inner door. The present disclosure avoids damages caused by collision between the inner door and the outer door when the outer door is opened, and also avoids simultaneous opening of the inner door and outer door and facilitates the user to use and achieves an energy-saving effect.