Patents by Inventor Shigekazu Komatsu
Shigekazu Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150638Abstract: It is an object of the present invention to provide a thermally conductive sheet that is excellent in thermally conductive property, has insulation property, has a low permittivity, and is excellent in designability. The thermally conductive sheet 1 comprises a binder component 11, titanium oxide, titanium nitride, and a thermally conductive filler 12 other than these, and a ratio of the titanium oxide to the total of the titanium oxide and the titanium nitride is 20 to 90% by mass. An L* value of a surface of the thermally conductive sheet 1 in the L*a*b* color system is preferably 41 or less. The total content of the titanium oxide and the titanium nitride is preferably 0.3 to 10.0 parts by mass based on the total amount 100 parts by mass of the thermally conductive filler 12.Type: ApplicationFiled: March 11, 2022Publication date: May 9, 2024Inventors: Yuusuke HARUNA, Hiroshi TAJIMA, Shigekazu UMEMURA, Kanoe KOMATSU, Yuu IIHARA, Junichi KINOSHITA, Kiyoshi IWAI
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Publication number: 20240019487Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: August 9, 2023Publication date: January 18, 2024Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 11762012Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: GrantFiled: December 28, 2022Date of Patent: September 19, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20230134360Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: December 28, 2022Publication date: May 4, 2023Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 11567123Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: GrantFiled: March 10, 2021Date of Patent: January 31, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 11061071Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: GrantFiled: August 31, 2020Date of Patent: July 13, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20210190861Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: March 10, 2021Publication date: June 24, 2021Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 10976364Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: GrantFiled: July 16, 2020Date of Patent: April 13, 2021Assignee: TOKYO ELECTRON LIMITEDInventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20200400743Abstract: A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: August 31, 2020Publication date: December 24, 2020Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20200348358Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: July 16, 2020Publication date: November 5, 2020Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 10753972Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: GrantFiled: May 1, 2017Date of Patent: August 25, 2020Assignee: TOKYO ELECTRON LIMITEDInventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20200064400Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: November 1, 2019Publication date: February 27, 2020Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20170234924Abstract: A wafer inspection system is provided. The wafer inspection system comprises: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.Type: ApplicationFiled: May 1, 2017Publication date: August 17, 2017Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 9671459Abstract: A maintenance carriage of a wafer inspection apparatus can easily unload a test head. A wafer inspection apparatus 10 includes a cell tower 12 in which cells 11 are arranged at four levels, and each of the cells 11 accommodates a test head 15. At an outside of the cell tower 12, a maintenance carriage 27 is arranged. The maintenance carriage 27 includes a carriage base 29 configured to be moved through rollers 28; a test head case 31 configured to accommodate the test head 15; a lift device 30 provided uprightly from the carriage base 29 and configured to move up and down the test head case 31; and a horizontal position adjusting stage 35 provided between a lifter 34 of the lift device 30 and the test head case 31 and configured to move the test head case 31 horizontally with respect to the lifter 34.Type: GrantFiled: October 28, 2014Date of Patent: June 6, 2017Assignees: TOKYO ELECTRON LIMITED, NIPPO PRECISION CO., LTDInventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Publication number: 20150145540Abstract: Provided are a semiconductor inspection system and a method for preventing condensation at an interface part. The inspection system is characterized by being equipped with: a probe apparatus configured to bring a probe into contact with a target object whose temperature is controlled so that the probe is electrically connected with the target object; a tester configured to inspect the target object by supplying an inspection signal to the target object and detect an output signal outputted from the target object; an interface part which electrically connects the probe with the tester; a vacuum seal mechanism configured to seal the interface part in an airtight state; a gas exhaust unit configured to evacuate the interior of the interface part to a depressurized atmosphere; and a dry gas supply unit configured to supply a dry gas into the evacuated interface part while controlling a flow rate of the dry gas.Type: ApplicationFiled: June 18, 2013Publication date: May 28, 2015Inventors: Shigekazu Komatsu, Takaaki Hoshino
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Publication number: 20150115991Abstract: A maintenance carriage of a wafer inspection apparatus can easily unload a test head. A wafer inspection apparatus 10 includes a cell tower 12 in which cells 11 are arranged at four levels, and each of the cells 11 accommodates a test head 15. At an outside of the cell tower 12, a maintenance carriage 27 is arranged. The maintenance carriage 27 includes a carriage base 29 configured to be moved through rollers 28; a test head case 31 configured to accommodate the test head 15; a lift device 30 provided uprightly from the carriage base 29 and configured to move up and down the test head case 31; and a horizontal position adjusting stage 35 provided between a lifter 34 of the lift device 30 and the test head case 31 and configured to move the test head case 31 horizontally with respect to the lifter 34.Type: ApplicationFiled: October 28, 2014Publication date: April 30, 2015Inventors: Junichi Hagihara, Shigekazu Komatsu, Kunihiro Furuya, Tadayoshi Hosaka, Naoki Muramatsu
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Patent number: 8766658Abstract: A probe includes a contact member brought into contact with an object to be tested. Contact particles having conductivity are uniformly distributed in the contact member. A part of the contact particles protrude from a surface of the contact member on the side of the object to be tested. A conductive member having elasticity is placed on a surface of the contact member on the opposite side to the object to be tested. The probe further includes an insulating sheet including a through hole and the contact member is so positioned as to penetrate the through hole. An upper part of the contact member is formed of a conductor which does not include the contact particles. An additional conductor is placed on a surface of the conductor on the side opposite to the object to be tested.Type: GrantFiled: April 1, 2009Date of Patent: July 1, 2014Assignee: Tokyo Electron LimitedInventor: Shigekazu Komatsu
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Patent number: 8723544Abstract: A probe card installed in a probe device includes a supporting plate capable of supporting a contact body and a circuit board installed above a top surface of the supporting plate. A connection member is installed at a top surface of the circuit board and the supporting plate and the connection member are connected to each other by a connection body. Load control members are installed at a top surface of the connection member and capable of maintaining a contact load between the contact body and an object to be inspected at a constant level. Elastic members are installed at a peripheral portion of the connection member and capable of fixing a horizontal position of the supporting plate. An intermediate member is installed between the circuit board and the supporting plate and configured to elastically and electrically connect the circuit board and the supporting plate.Type: GrantFiled: October 7, 2009Date of Patent: May 13, 2014Assignee: Tokyo Electron LimitedInventors: Shigekazu Komatsu, Syuichi Tsukada
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Patent number: 8468690Abstract: A holding member for use in a test includes a base made of silicon or glass and chips in which devices are formed is mountable thereon. Positioning members made of resist sheets are formed on the top surface of the base. A resist film is formed on the bottom surface of the base, and suction grooves (intersection portions, connection portions) and support members are formed in the resist film. Suction holes are formed in regions of the top surface of the base where the chips are mounted, wherein the suction holes are formed through the base and communicate with the suction groove.Type: GrantFiled: November 5, 2008Date of Patent: June 25, 2013Assignee: Tokyo Electron LimitedInventors: Yasunori Kumagai, Shigekazu Komatsu
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Patent number: 8471585Abstract: A yield and productivity of a semiconductor module are improved. A sheet having electrical conductivity is fixed to a main surface of a semiconductor substrate on which a plurality of semiconductor devices having a surface structure and a rear surface electrode are arranged. The semiconductor substrate is divided into semiconductor chips on a first support stage in the state where the sheet is fixed to its main surface. The plurality of divided semiconductor chips are mounted on a second support stage via the sheet and further, the plurality of mounted semiconductor chips are continuously subjected to a dynamic characteristic test on the second support stage. The proposed semiconductor device evaluation method permits a fissure growing and propagating from a crack occurring in the dynamic characteristic test of the vertical semiconductor devices to be suppressed, and the yield and productivity of the semiconductor module to be improved.Type: GrantFiled: July 21, 2010Date of Patent: June 25, 2013Assignees: Tokyo Electron Limited, Fuji Electric Systems Co., Ltd.Inventors: Mitsuyoshi Miyazono, Shigekazu Komatsu, Dai Shinozaki, Masahiro Kato, Atsushi Yoshida