Abstract: A semiconductor storage includes a stack, columns, and first, second, third, fourth, and fifth insulators. The stack includes first conductive layers, and second and third conductive layers below and above the first conductive layers, respectively. The columns penetrate the stack in a first direction. The first and second insulators penetrate the stack and are separated from each other in a second direction. The third insulator is between the first and second insulators in a third direction. The third insulator includes first and second portions apart from each other in the second direction. The fourth insulator is between the first and second portions. The fifth insulator is between the first and second portions above the fourth insulator. The second conductive layer includes two electrically-separated regions, between which the third and fourth insulators are provided. The third conductive layer includes two electrically-separated regions between which the third and fifth insulators are provided.

Abstract: A semiconductor storage device includes: a stacked body in which a plurality of electrically conductive layers is stacked with an insulating layer interposed in between; and a circuit section that is provided to overlap with the stacked body in a stack direction. The stacked body includes a memory section in which a plurality of memory cells is disposed and a staircase section in which the plurality of electrically conductive layers has stepped ends. The circuit section includes row decoders that are joined to the plurality of electrically conductive layers. The staircase section includes a first structure in which the row decoders are provided to overlap with each other in the stack direction and a second structure different from the first structure. The second structure has a greater step gap than a step gap of the first structure.

Abstract: A semiconductor storage includes a stack, columns, and first, second, third, fourth, and fifth insulators. The stack includes first conductive layers, and second and third conductive layers below and above the first conductive layers, respectively. The columns penetrate the stack in a first direction. The first and second insulators penetrate the stack and are separated from each other in a second direction. The third insulator is between the first and second insulators in a third direction. The third insulator includes first and second portions apart from each other in the second direction. The fourth insulator is between the first and second portions. The fifth insulator is between the first and second portions above the fourth insulator. The second conductive layer includes two electrically-separated regions, between which the third and fourth insulators are provided. The third conductive layer includes two electrically-separated regions between which the third and fifth insulators are provided.

Abstract: According to one embodiment, a semiconductor memory device includes: a first bit line; a first memory cell transistor coupled to the first bit line; and a first capacitor coupled between the first memory cell transistor and the first bit line.

Abstract: A semiconductor storage includes a stack, columns, and first, second, third, fourth, and fifth insulators. The stack includes first conductive layers, and second and third conductive layers below and above the first conductive layers, respectively. The columns penetrate the stack in a first direction. The first and second insulators penetrate the stack and are separated from each other in a second direction. The third insulator is between the first and second insulators in a third direction. The third insulator includes first and second portions apart from each other in the second direction. The fourth insulator is between the first and second portions. The fifth insulator is between the first and second portions above the fourth insulator. The second conductive layer includes two electrically-separated regions, between which the third and fourth insulators are provided. The third conductive layer includes two electrically-separated regions between which the third and fifth insulators are provided.

Abstract: A memory device includes a substrate, first, second, and third conductive layers, a stack of fourth conductive layers, a memory pillar, and an insulator. The first, second, and third conductive layer are provided above the substrate. The stack of fourth conductive layers is provided above the third conductive layer. The memory pillar extends in the thickness direction through the stack and the third conductive layer and into the second conductive layer in a first region of the memory device. The insulator extends in a thickness direction through the stack, the third conductive layer, and the second conductive layer in a second region of the memory device. The insulator also extends in a second surface direction of the substrate. A thickness of the third conductive layer in a region through which the insulator extends is greater than a thickness of the third conductive layer in the first region.

Abstract: To provide a liquid composition whereby a resin powder can be uniformly dispersed in a resin or the like without being scattered, and a method for producing a film, a laminate or the like by using the liquid composition. The liquid composition comprises a liquid medium and a resin powder dispersed in the liquid medium, and characterized in that the average particle size of the resin powder is from 0.3 to 6 ?m, the volume-based cumulative 90% diameter of the resin powder is at most 8 ?m, and the resin powder is a resin containing a fluorinated copolymer having a specific functional group. And, the method is a method for producing a film, a laminate or the like by using the liquid composition.

Abstract: According to one embodiment, a semiconductor memory device includes: a first bit line; a capacitor; and a first memory cell transistor and a second memory cell transistor that are coupled in series between the first bit line and the capacitor.

Abstract: To provide a modified polytetrafluoroethylene which is excellent in the moldability by paste extrusion and the mechanical property of the molded article. A modified polytetrafluoroethylene fine powder which is a fine powder of a non-melt-moldable modified polytetrafluoroethylene, characterized in that the modified polytetrafluoroethylene comprises units derived from tetrafluoroethylene, units derived from a perfluoroalkyl vinyl ether represented by CF2?CFO—CnF2n+1 (wherein n is an integer of from 1 to 6), and units derived from a perfluoroalkylethylene represented by CH2?CH—CmF2m+1 (wherein m is an integer of from 3 to 6), and that the content of the units derived from the perfluoroalkyl vinyl ether is from 0.1 to 0.25 mass % and the content of the units derived from a perfluoroalkylethylene is from 0.001 to 0.1 mass %, based on all monomer units in the modified polytetrafluoroethylene.

Abstract: To provide a PTFE aqueous dispersion which is excellent in mechanical stability, while being not susceptible to foaming. A polytetrafluoroethylene aqueous dispersion which is characterized by containing from 15 to 70 mass % of PTFE particles having an average primary particle diameter of from 0.1 to 0.5 ?m; from 0.1 to 20,000 ppm, to the PTFE particles, of a fluorinated emulsifier selected from a C4-7 fluorinated carboxylic acid which may have an etheric oxygen atom, and salts of thereof; from 1 to 20 parts by mass, to 100 parts by mass of the PTFE particles, of a nonionic surfactant represented by R1—O-A-H (wherein R1 is a C8-18 alkyl group, and A is a polyoxyalkylene chain); from 0.004 to 0.040 parts by mass, to 100 parts by mass of the PTFE particles, of a polyether polysiloxane copolymer, wherein the polyether chain consists solely of a polyoxypropylene group; and water.

Abstract: To optimize the primary particle size of a modified PTFE fine powder to shorten the sintering time during the extrusion molding. A modified polytetrafluoroethylene fine powder which is a fine powder of a non-melt-processable modified polytetrafluoroethylene comprising units derived from tetrafluoroethylene, units derived from hexafluoropropylene, units derived from a perfluoro(alkyl vinyl ether) represented by CF2?CFO—CnF2n+1 (n is an integer of from 1 to 6) and units derived from a (perfluoalkyl)ethylene represented by CH2?CH—CmF2m+1 (m is an integer of from 3 to 7).

Abstract: A semiconductor memory device includes: a first conductive layer and a first insulating layer extending in a first direction, these layers being arranged in a second direction intersecting the first direction; a first semiconductor layer opposed to the first conductive layer, and extending in a third direction intersecting the first and second directions; a second semiconductor layer opposed to the first conductive layer, extending in the third direction; a first contact electrode connected to the first semiconductor layer; and a second contact electrode connected to the second semiconductor layer. In a first cross section extending in the first and second directions, an entire outer peripheral surface of the first semiconductor layer is surrounded by the first conductive layer, and an outer peripheral surface of the second semiconductor layer is surrounded by the first conductive layer and the first insulating layer.

Abstract: A memory device includes a substrate, first, second, and third conductive layers, a stack of fourth conductive layers, a memory pillar, and an insulator. The first, second, and third conductive layer are provided above the substrate. The stack of fourth conductive layers is provided above the third conductive layer. The memory pillar extends in the thickness direction through the stack and the third conductive layer and into the second conductive layer in a first region of the memory device. The insulator extends in a thickness direction through the stack, the third conductive layer, and the second conductive layer in a second region of the memory device. The insulator also extends in a second surface direction of the substrate. A thickness of the third conductive layer in a region through which the insulator extends is greater than a thickness of the third conductive layer in the first region.

Abstract: A semiconductor memory device includes a plurality of first conductor layers that are stacked in a first direction; a first pillar including a first semiconductor layer and extending through the first conductor layers in the first direction; a first charge storage layer that is provided between the first conductor layers and the first semiconductor layer; a plurality of second conductor layers that are stacked in the first direction above an uppermost conductor layer of the first conductor layers; a second pillar including a second semiconductor layer and extending through the second conductor layers in the first direction, the second semiconductor layer electrically connected to the first semiconductor layer; and a conductor pillar or film extending in the first direction through the second conductor layers other than a lowermost layer of the second conductor layers and being in contact with a respective upper surface of each of the second conductor layers.

Abstract: To provide a production method for an aqueous emulsion of modified polytetrafluoroethylene which is environmentally friendly and which is suitable for producing a stretched porous body having excellent breaking strength. A production method for an aqueous emulsion of modified polytetrafluoroethylene, which is a method to obtain an aqueous emulsion of modified polytetrafluoroethylene particles having an average primary particle diameter of from 0.10 to 0.30 ?m, by subjecting tetrafluoroethylene and a perfluoroalkyl ethylene to emulsion polymerization in an aqueous medium, using a polymerization initiator, in the presence of a fluorinated anionic surfactant having a LogPOW of from 2.4 to 3.

Abstract: A semiconductor memory device includes a plurality of first conductor layers that are stacked in a first direction; a first pillar including a first semiconductor layer and extending through the first conductor layers in the first direction; a first charge storage layer that is provided between the first conductor layers and the first semiconductor layer; a plurality of second conductor layers that are stacked in the first direction above an uppermost conductor layer of the first conductor layers; a second pillar including a second semiconductor layer and extending through the second conductor layers in the first direction, the second semiconductor layer electrically connected to the first semiconductor layer; and a conductor pillar or film extending in the first direction through the second conductor layers other than a lowermost layer of the second conductor layers and being in contact with a respective upper surface of each of the second conductor layers.

Abstract: A storage device includes a conductive layer, a plurality of electrode layers stacked on the conductive layer, a wiring above the plurality of electrode layers, an interlayer insulating film between the plurality of electrode layers and the wiring, a semiconductor film penetrating the plurality of electrode layers and the interlayer insulating film in a stacking direction of the plurality of electrode layers, a contact plug penetrating the interlayer insulating film in the stacking direction, and connected to each of the plurality of electrode layers, and a conductive film in the vicinity of the contact plug and penetrating at least one of the plurality of electrode layers in the stacking direction. The semiconductor film is electrically connected to the conductive layer and the wiring, and an entire upper end of the conductive film is covered by an insulating layer.

Abstract: According to one embodiment, a stacked body includes a plurality of conductive layers stacked with an insulator interposed. The stacked body includes a first stacked portion and a second stacked portion. The second stacked portion includes a plurality of terrace portions arranged in a staircase configuration with level differences in a first direction and a second direction. The second stacked portion includes a conductive portion and a spacer portion. The conductive portion is connected to the conductive layer and is provided in same layer as the conductive layer. The spacer portion is provided in same layer as the conductive layer and the conductive portion. The spacer portion is of a material different from the conductive portion.

Abstract: A semiconductor memory device includes: a first conductive layer and a first insulating layer extending in a first direction, these layers being arranged in a second direction intersecting the first direction; a first semiconductor layer opposed to the first conductive layer, and extending in a third direction intersecting the first and second directions; a second semiconductor layer opposed to the first conductive layer, extending in the third direction; a first contact electrode connected to the first semiconductor layer; and a second contact electrode connected to the second semiconductor layer. In a first cross section extending in the first and second directions, an entire outer peripheral surface of the first semiconductor layer is surrounded by the first conductive layer, and an outer peripheral surface of the second semiconductor layer is surrounded by the first conductive layer and the first insulating layer.

Abstract: To provide a PTFE aqueous dispersion which is excellent in mechanical stability, while being not susceptible to foaming. A polytetrafluoroethylene aqueous dispersion which is characterized by containing from 15 to 70 mass % of PTFE particles having an average primary particle diameter of from 0.1 to 0.5 ?m; from 0.1 to 20,000 ppm, to the PTFE particles, of a fluorinated emulsifier selected from a C4-7 fluorinated carboxylic acid which may have an etheric oxygen atom, and salts of thereof; from 1 to 20 parts by mass, to 100 parts by mass of the PTFE particles, of a nonionic surfactant represented by R1—O-A-H (wherein R1 is a C8-18 alkyl group, and A is a polyoxyalkylene chain); from 0.004 to 0.040 parts by mass, to 100 parts by mass of the PTFE particles, of a polyether polysiloxane copolymer, wherein the polyether chain consists solely of a polyoxypropylene group; and water.