Patents by Inventor Shigeki Kobayashi

Shigeki Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9362500
    Abstract: According to one embodiment, a manufacturing method of a semiconductor memory device includes forming a stacked body in which word line material layers and insulating layers are alternately stacked on a base layer. The method includes forming first holes on the stacked body so as to be arranged in a first direction and in a second direction that intersects with the first direction. The method includes forming resistance-change films on inner walls of the first holes, forming bit lines inside the resistance-change films in the first holes, and dividing the stacked body in the first direction by forming second holes so that a portion in the stacked body adjacent to the resistance-change films in the second direction. The method includes forming inter-bit line insulating films in the second holes.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: June 7, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Yamato, Takeshi Yamaguchi, Shigeki Kobayashi
  • Patent number: 9339906
    Abstract: A pneumatic rotary tool including a housing having an inlet passage. The inlet passage extends from an inlet operatively connectable to an air source. The inlet passage extends to a motor cylinder inside the housing. The housing has an outlet passage extending from the motor cylinder to an outlet. The tool includes a rotor mounted in the cylinder for rotation relative to the cylinder under pneumatic power. The tool includes a valve positioned along the inlet passage operable to selectively permit air to pass for rotating the rotor and flowing through the outlet. The tool has a cutter head connected to the rotor including a clamp for holding a cutter to cut material as the head rotates. The cutter head is positioned in the outlet so air passing through the outlet passes over the head to blow material away from the head as the cutter cuts the material.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: May 17, 2016
    Assignee: SP Air Kabushiki Kaisha
    Inventor: Shigeki Kobayashi
  • Patent number: 9312306
    Abstract: According to an embodiment, a first impurity diffusion layer is provided in a region lower than a drain region and the first impurity diffusion layer diffuses impurities of a second conductivity type. A second impurity diffusion layer is provided between the drain region and the first impurity diffusion layer, and the second impurity diffusion layer diffuses impurities of a first conductivity type or the second conductivity type, and a concentration of the second impurity diffusion layer is lower than that of the first conductivity type of the drain region and that of the second conductivity type of the first impurity diffusion layer.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: April 12, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori Nakakubo, Shigeki Kobayashi, Takeshi Yamaguchi
  • Publication number: 20160099289
    Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.
    Type: Application
    Filed: December 11, 2015
    Publication date: April 7, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaki YAMATO, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
  • Patent number: 9289885
    Abstract: A power driven tool for rotating a mechanical element includes a housing including a base and a head connected to the base. The head has a yoke formed by opposing arms separated by an opening. A selectively operable motor is positioned in the housing having an output shaft that rotates relative to the housing during operation of the motor. A ratchet mechanism is mounted in the housing and includes an output drive at least partially mounted in the opening for rotation relative to the housing to rotate the mechanical element in a selected direction. A cap is positioned on the head of the housing across the opening forming the yoke. The cap reinforces the yoke during operation of the tool to prevent the arms from separating and blocking at least part of the opening between the arms to prevent debris from entering the ratchet mechanism.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 22, 2016
    Assignee: SP Air Kabushiki Kaisha
    Inventor: Shigeki Kobayashi
  • Patent number: 9246088
    Abstract: A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: January 26, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaki Yamato, Yasuhiro Nojiri, Shigeki Kobayashi, Hiroyuki Fukumizu, Takeshi Yamaguchi
  • Publication number: 20160004109
    Abstract: An electro-optical device includes an element substrate, a counter substrate arranged so as to face the element substrate through a seal material, in which the element substrate, the counter substrate, and the seal material are arranged so that a ratio of a length from a side face of each of the element substrate and the counter substrate to the seal material to a length of an interval between the element substrate and the counter substrate becomes from 50 to 300, and a barrier film is provided so as to cover the seal material and at least a part of side faces of the element substrate and the counter substrate.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 7, 2016
    Inventors: Takashi Shinohara, Yuichi Shimizu, Shigeki Kobayashi, Takuya Miyakawa
  • Patent number: 9224788
    Abstract: According to an embodiment, a nonvolatile memory device includes a first wiring extending to a first direction, a second wiring disposed on the first wiring in a second direction which is orthogonal to the first direction, a first insulating film provided between the first wiring and the second wiring, a bit line extending in the second direction, and a variable resistance film contacting an end portion of the first wiring, an end portion of the second wiring, and an end portion of the first insulating film. A dielectric constant of a center portion between the first and second wirings in the second direction is higher than at vicinities of the first and the second wirings. The variable resistance film is disposed between the bit line and the first wiring, between the bit line and the second wiring, and between the bit line and the first insulating film.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: December 29, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeki Kobayashi, Takeshi Yamaguchi, Masaki Yamato, Yoshinori Nakakubo, Hiroyuki Ode
  • Publication number: 20150367469
    Abstract: A pneumatic rotary tool including a housing having an inlet passage. The inlet passage extends from an inlet operatively connectable to an air source. The inlet passage extends to a motor cylinder inside the housing. The housing has an outlet passage extending from the motor cylinder to an outlet. The tool includes a rotor mounted in the cylinder for rotation relative to the cylinder under pneumatic power. The tool includes a valve positioned along the inlet passage operable to selectively permit air to pass for rotating the rotor and flowing through the outlet. The tool has a cutter head connected to the rotor including a clamp for holding a cutter to cut material as the head rotates. The cutter head is positioned in the outlet so air passing through the outlet passes over the head to blow material away from the head as the cutter cuts the material.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 24, 2015
    Inventor: Shigeki Kobayashi
  • Patent number: 9209394
    Abstract: According to one embodiment, a resistance change element includes: a first electrode; a second electrode; and a resistance change film provided between the first electrode and the second electrode, and the resistance change film including: a first transition metal oxide-containing layer; a second transition metal oxide-containing layer; and an intermediate layer provided between the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, the intermediate layer having a higher crystallization temperature than the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, and the intermediate layer including an amorphous material.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: December 8, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Ode, Takeshi Yamaguchi, Masaki Yamato, Shigeki Kobayashi, Yoshinori Nakakubo
  • Patent number: 9190614
    Abstract: According to an embodiment, a non-volatile memory device includes a first conductive layer, a second conductive layer, and a resistance change layer provided between the first conductive layer and the second conductive layer. The resistance change layer is capable of making a transition between a low-resistance state and a high-resistance state, and includes an oxide containing at least one of hafnium (Hf) and zirconium (Zr), at least one selected from the group consisting of barium (Ba), lanthanum (La), gadolinium (Gd) and lutetium (Lu), and nitrogen (N).
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: November 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumihiko Aiga, Takeshi Yamaguchi, Shigeki Kobayashi
  • Publication number: 20150295174
    Abstract: According to one embodiment, a manufacturing method of a semiconductor memory device includes forming a stacked body in which word line material layers and insulating layers are alternately stacked on a base layer. The method includes forming first holes on the stacked body so as to be arranged in a first direction and in a second direction that intersects with the first direction. The method includes forming resistance-change films on inner walls of the first holes, forming bit lines inside the resistance-change films in the first holes, and dividing the stacked body in the first direction by forming second holes so that a portion in the stacked body adjacent to the resistance-change films in the second direction. The method includes forming inter-bit line insulating films in the second holes.
    Type: Application
    Filed: June 24, 2015
    Publication date: October 15, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaki YAMATO, Takeshi YAMAGUCHI, Shigeki KOBAYASHI
  • Publication number: 20150263278
    Abstract: A memory device according to an embodiment, includes a selection element, a first interconnection provided in a first direction when viewed from the selection element and extending in the first direction, a plurality of second interconnections provided in a second direction crossing the first direction when viewed from the first interconnection and arranged in the first direction, a memory element provided between the first interconnection and the second interconnection, and a high resistance component connected between the selection element and the first interconnection and having a resistivity higher than a resistivity of the first interconnection and a resistivity of the second interconnection.
    Type: Application
    Filed: September 19, 2014
    Publication date: September 17, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki ODE, Takeshi YAMAGUCHI, Shigeki KOBAYASHI, Masaki YAMATO, Yoshinori NAKAKUBO, Takeshi TAKAGI, Takayuki TSUKAMOTO
  • Publication number: 20150255513
    Abstract: In accordance with an embodiment, a semiconductor memory device includes a substrate, first and second wirings on the substrate across each other, and a storage element at an intersection of the first and second wirings between the first and second wirings. The storage element includes first and second electrodes having first and second materials, respectively, a first film having a first dielectric constant, and a second film having a second dielectric constant lower than the first dielectric constant. The first film is formed on the first electrode. The second electrode is formed on the first film. The second film is disposed between the second electrode and the first film. An energy difference between a vacuum level and a Fermi level of the second material is equal to or more than an energy difference between the vacuum level and a Fermi level of the first material.
    Type: Application
    Filed: June 17, 2014
    Publication date: September 10, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori NAKAKUBO, Shigeki Kobayashi, Takeshi Yamaguchi, Hiroyuki Ode, Masaki Yamato
  • Publication number: 20150249113
    Abstract: According to one embodiment, a nonvolatile memory device includes a first wiring, a second wiring, and a memory cell that is disposed at a position where the first and second wirings cross so as to be interposed between the first and second wirings. The memory cell includes a variable resistive layer and a tunnel barrier layer that is formed of an insulating film provided in contact with the variable resistive layer. The tunnel barrier layer is provided close to the first wiring to which a positive voltage with applied during set operation changing the variable resistive layer to a low-resistance state from a high-resistance state.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 3, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi TAKAGI, Shigeki Kobayashi, Takeshi Yamaguchi
  • Patent number: 9099648
    Abstract: According to one embodiment, a manufacturing method of a semiconductor memory device includes forming a stacked body in which word line material layers and insulating layers are alternately stacked on a base layer. The method includes forming first holes on the stacked body so as to be arranged in a first direction and in a second direction that intersects with the first direction. The method includes forming resistance-change films on inner walls of the first holes, forming bit lines inside the resistance-change films in the first holes, and dividing the stacked body in the first direction by forming second holes so that a portion in the stacked body adjacent to the resistance-change films in the second direction. The method includes forming inter-bit line insulating films in the second holes.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: August 4, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaki Yamato, Takeshi Yamaguchi, Shigeki Kobayashi
  • Publication number: 20150207071
    Abstract: In accordance with an embodiment, a manufacturing method of a resistive element film includes sequentially repeating, a desired number of times, first and second film formation cycles. In the first film formation cycle, an insulating film is formed up to a continuous layer by an ALD film formation method under a first condition. In the second film formation cycle a metal film is formed on the insulating film up to a continuous layer by the ALD film formation method under a second condition.
    Type: Application
    Filed: June 9, 2014
    Publication date: July 23, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki ODE, Takeshi Yamaguchi, Shigeki Kobayashi, Masaki Yamato, Yoshinori Nakakubo
  • Publication number: 20150202750
    Abstract: A power driven tool for rotating a mechanical element. The tool includes a housing and motor. The motor has an output shaft. The shaft rotates relative to the housing. The tool also includes an impact drive axially fixed within the housing. The impact drive includes a base and an anvil shaft having an anvil. The impact drive includes annular hammers, each having opposite impact lands pivotally mounted on the base for movement between three positions, including a forward position in which the hammer is positioned so one impact land engages the anvil, a reverse position in which the hammer is positioned so another of the impact lands engages the anvil, and a disengaged position in which neither of the impact lands engages the anvil. Further, the tool includes a ratchet mechanism. The ratchet mechanism includes an output drive mounted for rotation relative to the housing for rotating a mechanical element.
    Type: Application
    Filed: January 22, 2014
    Publication date: July 23, 2015
    Applicant: SP Air Kabushiki Kaisha
    Inventor: Shigeki Kobayashi
  • Publication number: 20150194210
    Abstract: A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively. The control circuit includes a detection circuit configured to detect a transition of a resistance state of a selected memory cell using a reference voltage. The control circuit is configured to execute a read operation in which the control circuit applies the third voltage to the selected first line and the non-selected first line, applies the second voltage to the selected second line, and applies the fourth voltage to the non-selected second line, and set the reference voltage based on a voltage value of the selected second line.
    Type: Application
    Filed: March 24, 2015
    Publication date: July 9, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeki KOBAYASHI, Takeshi YAMAGUCHI
  • Patent number: 9075097
    Abstract: There is provided a transmission device. The transmission device includes: an adapter device (11) including: a first surface having a plurality of first terminals (21) thereon; and a second surface opposite to the first surface and having a plurality of second terminals (22) thereon, wherein a pitch between the adjacent second terminals is different from a pitch between the adjacent first terminals, a plurality of signal lines each electrically connecting a corresponding one of the first terminals and a corresponding one of the second terminals; and a signal compensation device (12) connected to the adapter device through the signal lines and configured to compensate for a transmission loss of a signal path between the corresponding first terminal and the corresponding second terminal such that the transmission loss is set to a given value.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: July 7, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Shigeki Kobayashi