Patents by Inventor Shih-Cheng Wang

Shih-Cheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11984363
    Abstract: A semiconductor device includes a semiconductor substrate, a first epitaxial feature having a first semiconductor material over the semiconductor substrate, and a second epitaxial feature having a second semiconductor material over the semiconductor substrate. The second semiconductor material being different from the first semiconductor material. The semiconductor device further includes a first silicide layer on the first epitaxial feature, a second silicide layer on the second epitaxial feature, a metal layer on the first silicide layer, a first contact feature over the metal layer, and a second contact feature over the second silicide layer. A first number of layers between the first contact feature and the first epitaxial feature is greater than a second number of layers between the second contact feature and the second epitaxial feature.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Cheng Chen, Chun-Hsiung Lin, Chih-Hao Wang
  • Publication number: 20240153958
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a plurality of semiconductor layers having a first group of semiconductor layers, a second group of semiconductor layers disposed over and aligned with the first group of semiconductor layers, and a third group of semiconductor layers disposed over and aligned with the second group of semiconductor layers. The structure further includes a first source/drain epitaxial feature in contact with a first number of semiconductor layers of the first group of semiconductor layers and a second source/drain epitaxial feature in contact with a second number of semiconductor layers of the third group of semiconductor layers. The first number of semiconductor layers of the first group of semiconductor layers is different from the second number of semiconductor layers of the third group of semiconductor layers.
    Type: Application
    Filed: January 7, 2024
    Publication date: May 9, 2024
    Inventors: Jung-Hung CHANG, Zhi-Chang LIN, Shih-Cheng CHEN, Chien Ning YAO, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240136418
    Abstract: A device includes an active region, a gate structure, a source/drain epitaxial structure, an epitaxial layer, a metal alloy layer, a contact, and a contact etch stop layer. The gate structure is across the active region. The source/drain epitaxial structure is over the active region and adjacent the gate structure. The epitaxial layer is over the source/drain epitaxial structure. The metal alloy layer is over the epitaxial layer. The contact is over the metal alloy layer. The contact etch stop layer lines sidewalls of the source/drain epitaxial structure. The metal alloy layer is spaced apart from the contact etch stop layer.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Cheng CHEN, Chun-Hsiung LIN, Chih-Hao WANG
  • Patent number: 11967594
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Cheng Chen, Zhi-Chang Lin, Jung-Hung Chang, Lo Heng Chang, Chien Ning Yao, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20240121939
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: SHIH-FAN KUAN, HSU-CHENG FAN, JIANN-JONG WANG, CHUNG-HSIN LIN, YU-TING LIN
  • Publication number: 20240121940
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 11, 2024
    Inventors: SHIH-FAN KUAN, HSU-CHENG FAN, JIANN-JONG WANG, CHUNG-HSIN LIN, YU-TING LIN
  • Publication number: 20240096895
    Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Jui-Chien Huang, Shih-Cheng Chen, Chih-Hao Wang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Shi Ning Ju, Guan-Lin Chen
  • Patent number: 11803745
    Abstract: A method for estimating firefighting data includes: obtaining firefighting condition data of a site, wherein the firefighting condition data comprises information on firefighting equipment, information on flammable articles; and estimating firefighting input data and firefighting damage data based on the firefighting condition data using a simulation analysis model, wherein the simulation analysis model is created based on firefighting condition data, firefighting input data and firefighting damage data of different sites.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: October 31, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventor: Shih-Cheng Wang
  • Patent number: 11711074
    Abstract: An optical receiver device includes a boost converter circuit, an optical receiver circuit, and a pulse width modulation controller circuitry. The boost converter circuit is configured to convert a supply voltage according to a pulse width modulation signal, in order to generate an output voltage. The optical receiver circuit is configured to set a gain according to the output voltage, in order to convert an optical signal to a data signal according to the gain. The pulse width modulation controller circuitry is configured to perform a digital to analog conversion according to a control code to gradually adjust a current associated with the output voltage, and to compare the output voltage with a reference voltage to generate the pulse width modulation signal.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: July 25, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Cheng Wang, Hsin-Chuan Chen, Ko-Li Hung, Hung-Chih Kuo, Shih-Chieh Chen
  • Patent number: 11586959
    Abstract: An environmental state analysis method includes obtaining key data that affects an environmental state of a designated place, and determining a degree of influence of the key data on the environmental state of the designated place according to the key data by using an analysis model. The key data includes one or more of environmental protection data, pollution source data, and environmental monitoring data. The environmental state includes one or more of a diffusion speed of harmful gas and a concentration of dust in the air.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: February 21, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventor: Shih-Cheng Wang
  • Patent number: 11569730
    Abstract: A power supply device includes a pulse frequency modulation controller circuitry and a cycle controller circuitry. The pulse frequency modulation controller circuitry is configured to adjust a transiting speed of a first signal according to at least one control bit, and to compare the first signal with a first reference voltage to generate a second signal, and to generate a driving signal to a power converter circuit according to an output voltage, a second reference voltage, and the second signal, in which the power converter circuit is configured to generate the output voltage according to the driving signal. The cycle controller circuitry is configured to detect a frequency of the driving signal according to a clock signal having a predetermined frequency, in which the predetermined frequency is set based on a frequency range capable of being heard by humans.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: January 31, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Cheng Wang, Hung-Wan Liu, Shih-Chieh Chen, Chun-Fu Chang, Liang-Hui Li
  • Patent number: 11552978
    Abstract: A disaster security resource calculation method includes obtaining disaster prevention data of a place to be evaluated and loss assessment data of the place in a disaster scenario, and determining disaster security resources required by the place to be evaluated in the disaster scenario using a preset calculation model according to the disaster prevention data and the loss assessment data. The disaster prevention data includes environmental information, item information, and personnel information.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: January 10, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventor: Shih-Cheng Wang
  • Patent number: 11474789
    Abstract: A power supplier circuit supplies a power signal to a codec of an audio apparatus. The power supplier circuit includes a random sequence generation circuit, a control circuit, and a power circuit. The random sequence generation circuit generates a random sequence. The control circuit outputs a first control signal according to the random sequence, a first reference signal, and the power signal. The power circuit generates the power signal according to the first control signal, such that the power signal is spread in response to the random sequence.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: October 18, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Cheng Wang, Chun-Yu Luo, Shih-Chieh Chen
  • Patent number: 11453127
    Abstract: A method for ensuring safety of humans within operating area or in close proximity to an automatic apparatus is applied in and by a control apparatus. The control apparatus is coupled to one or more cameras arranged around the operating area of the automatic apparatus. The control apparatus uses deep learning techniques to analyze images captured by the cameras to determine whether there is a person in the operating area and powers off the automatic apparatus if any person is deemed present.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: September 27, 2022
    Assignee: Shenzhen Fugui Precision Ind. Co., Ltd.
    Inventors: Chang-Ching Liao, Shao-Wen Wang, Shih-Cheng Wang
  • Patent number: 11387823
    Abstract: A PFM control circuit includes a switching circuit, a slope-decision circuit, a flip-flop, a first and a second comparison circuits. The first comparison circuit outputs a first signal according to an output voltage of a power conversion circuit. The switching circuit outputs a switching signal according to an output current of the power conversion circuit. The slope-decision circuit outputs a slope modulation voltage, and determines a slope modulation voltage with a first or a second slope according to the switching signal. The second comparison circuit outputs the second signal according to the slope modulation voltage. The flip-flop outputs a control signal to the power conversion circuit according to the first and the second signals. When the slope modulation voltage has the first or the second slope, the control signal has a first or a second frequency accordingly. The first frequency is higher than the second frequency.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: July 12, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Shih-Cheng Wang, Chun-Yu Luo, Shih-Chieh Chen, Liang-Hui Li, Chun-Fu Chang
  • Patent number: 11243527
    Abstract: A production process control method includes acquiring first recorded production process information, extracting second production process information from the first recorded production process information, establishing a matching model for correlating a first satisfied parameter with a second satisfied parameter, establishing a production capability prediction model for predicting production capability, inputting a first production parameter into the matching model to obtain a value of a second production parameter for producing a preset workpiece, inputting the value of the first production parameter and the value of the second production parameter into the production capability prediction model to calculate a complex production capability index (CPK) value, determining whether the CPK value reaches a preset capability standard, and setting the value of the first production parameter and the value of the second production parameter when the CPK value reaches the preset capability standard.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: February 8, 2022
    Assignee: HONGFUJIN PRECISION ELECTRONICS(TIANJIN)CO., LTD.
    Inventor: Shih-Cheng Wang
  • Patent number: 11244092
    Abstract: A fire development situation prediction method includes collecting simulation data of a fire, establishing a neural network of an engineered deep learning model, training the neural network with the simulation data, determining whether an output value of the neural network is less than or equal to a preset error threshold value, stopping training of the neural network when the output value of the neural network is less than or equal to a preset error threshold value, recollecting the simulation data of the fire when the output value of the neural network is not less than or equal to a preset error threshold value, and evaluating the development situation of the fire according to the engineered deep learning model. The fire development situation prediction method is for predicting a development situation of a fire.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: February 8, 2022
    Assignee: Shenzhen Fulian Fugui Precision Industry Co., Ltd.
    Inventor: Shih-Cheng Wang
  • Publication number: 20210391855
    Abstract: An optical receiver device includes a boost converter circuit, an optical receiver circuit, and a pulse width modulation controller circuitry. The boost converter circuit is configured to convert a supply voltage according to a pulse width modulation signal, in order to generate an output voltage. The optical receiver circuit is configured to set a gain according to the output voltage, in order to convert an optical signal to a data signal according to the gain. The pulse width modulation controller circuitry is configured to perform a digital to analog conversion according to a control code to gradually adjust a current associated with the output voltage, and to compare the output voltage with a reference voltage to generate the pulse width modulation signal.
    Type: Application
    Filed: March 16, 2021
    Publication date: December 16, 2021
    Inventors: SHIH-CHENG WANG, HSIN-CHUAN CHEN, KO-LI HUNG, HUNG-CHIH KUO, SHIH-CHIEH CHEN