Abstract: A method of forming a semiconductor structure includes following steps. A first substrate and a second substrate are bonded together, in which the first substrate has a landing pad. The second substrate is etched to form an opening, in which the landing pad is exposed through the opening. A metal layer is formed over the landing pad and a sidewall of the second substrate that surrounds the opening. A buffer structure is formed over the metal layer. The buffer structure is etched such that a top surface of the buffer structure is below a top surface of the metal layer. A barrier structure is formed over metal layer and the buffer structure.

Abstract: Provided are a semiconductor structure and a manufacturing method thereof. A first device structure layer is between a first substrate and a second substrate. A second device structure layer is between the second substrate and the first device structure layer. A first dielectric layer is between the first and second device structure layers. A second dielectric layer is on the second substrate. A through-silicon via (TSV) structure is in the second dielectric layer, the second substrate, the second device structure layer and the first dielectric layer. A connection pad is at the surface of the second dielectric layer and connected to the TSV structure. A first liner is between the TSV structure and the second dielectric layer, the second substrate and the second device structure layer. A second liner is between the top of the TSV structure and the second dielectric layer and a part of the second substrate.

Abstract: A method of forming a semiconductor structure includes following steps. A first wafer is bonded to a second wafer, in which the first wafer includes a first substrate and a first conductive pad above a first surface of the first substrate, and the second wafer comprises a second substrate and a second conductive pad above a second surface of the second substrate. A mask layer is formed above the first substrate. The mask layer and the first substrate are etched to form a first opening in the first substrate. A sacrificial spacer is formed in the first substrate at a sidewall of the first opening. The first conductive pad is etched to form a second opening communicated to the first opening. A conductive material is filled in the first opening and the second opening to form a conductive structure interconnecting the first and second conductive pads.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a semiconductor substrate, a plurality of first conductive elements separately positioned above the semiconductor substrate, a plurality of first supporting pillars respectively correspondingly positioned between an adjacent pairs of the plurality of first set conductive elements, and a plurality of spaces respectively correspondingly positioned adjacent to the plurality of first set supporting pillars.

Abstract: The provides a method for fabricating a semiconductor device including performing a bonding process to bond a second die onto a first die including a pad layer, forming a through-substrate opening along the second die and extending to the pad layer in the first die, conformally forming an isolation layer in the through-substrate opening, performing a punch etch process to remove a portion of the isolation layer and expose a portion of a top surface of the pad layer, performing an isotropic etch process to form a recessed space extending from the through substrate opening and in the pad layer, conformally forming a barrier layer in the through-substrate opening and the recessed space, and forming a filler layer in the through-substrate opening and the recessed space.

Abstract: A method of forming a semiconductor structure includes following steps. A first wafer is bonded to a second wafer, in which the first wafer includes a first substrate and a first conductive pad above a first surface of the first substrate, and the second wafer comprises a second substrate and a second conductive pad above a second surface of the second substrate. A mask layer is formed above the first substrate. The mask layer and the first substrate are etched to form a first opening in the first substrate. A sacrificial spacer is formed in the first substrate at a sidewall of the first opening. The first conductive pad is etched to form a second opening communicated to the first opening. A conductive material is filled in the first opening and the second opening to form a conductive structure interconnecting the first and second conductive pads.

Abstract: A semiconductor device includes a conductive pattern formed over a semiconductor substrate, and an interconnect structure formed over the conductive pattern.

Abstract: A method of manufacturing a semiconductor structure includes steps of providing a first wafer including a first substrate, a first dielectric layer over the first substrate, and a first conductive pad surrounded by the first dielectric layer; providing a second wafer including a second substrate, a second dielectric layer over the second substrate, and a second conductive pad surrounded by the second dielectric layer; bonding the first dielectric layer with the second dielectric layer; forming a first opening extending through the second substrate and partially through the second dielectric layer; disposing a dielectric liner conformal to the first opening; forming a second opening extending through the second dielectric layer and the second conductive pad to at least partially expose the first conductive pad; and disposing a conductive material within the first opening and the second opening to form a conductive via over the first conductive pad.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first die, a first conductive feature positioned in the first die, a second die positioned on the first die, a first mask layer positioned on the second die, a second mask layer positioned on the first mask layer, a conductive filler layer positioned penetrating the second mask layer, the first mask layer, and the second die, extending to the first die, and contacting the first conductive feature, isolation layers positioned between the conductive filler layer and the first die, between the conductive filler layer and the second die, and between the conductive filler layer and the first mask layer, and protection layers positioned between the conductive filler layer and the second mask layer and between the conductive filler layer and the first mask layer, and covering upper portions of the isolation layers.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a conductive feature, a redistribution layer, at least one through silicon via and at least one bump. The conductive feature is disposed over a front surface of the substrate, and the redistribution layer is disposed over a back surface opposite to the front surface. The through silicon via penetrates through the substrate and contacts the conductive feature embedded in an insulative layer. The bump contacts the redistribution layer and the through silicon via and serves as an electrical connection therebetween.

Abstract: The present disclosure provides a method for preparing a semiconductor structure. The method includes forming a conductive structure over a semiconductor substrate, and forming a first inter-layer dielectric (ILD) layer over the conductive structure. The method also includes forming a first spacer and a conductive plug penetrating through the first ILD layer. The conductive plug is electrically connected to the conductive structure, and the first spacer is between the first ILD layer and the conductive plug. The method further includes removing a portion of the first ILD layer to form a gap adjacent to the first spacer, and filling the gap with an energy removable material. In addition, the method includes performing a heat treatment process to transform the energy removable material into a second spacer, wherein the first spacer is separated from the first ILD layer by an air gap after the heat treatment process is performed.

Abstract: The present disclosure provides a method of manufacturing a semiconductor package assembly. The method includes steps of providing a plurality of first dies arranged horizontally; forming a redistribution layer on the first dies and the first insulative material, wherein the redistribution layer is divided into a first segment and a second segment electrically isolated from the first segment; mounting a plurality of second dies on the first segment of the redistribution layer; depositing a second insulative layer on the second dies and the redistribution layer; and forming a plurality of conductive plugs penetrating through the second insulative material and contacting the second segment of the redistribution layer.

Abstract: The present application discloses a method for fabricating a semiconductor device. The method for fabricating a semiconductor device includes providing a substrate comprising a center area and a peripheral area surrounding the center area, forming a first gate stack on the peripheral area and having a top surface, and forming an active column in the center area and having a top surface at a same vertical level as the top surface of the first gate stack.

Abstract: The present disclosure provides a semiconductor structure and a method for preparing the semiconductor structure. The semiconductor device structure includes: a first conductive structure and a second conductive structure disposed at different vertical heights over a semiconductor substrate; a first conductive plug and a second conductive plug correspondingly disposed over the first conductive structure and the second conductive structure; a first spacer disposed on a sidewall surface of the first conductive plug; an etch stop layer disposed over the semiconductor substrate, wherein the etch stop layer adjoins the first spacer; and a first inter-layer dielectric (ILD) layer disposed over the etch stop layer and next to the first conductive plug, wherein the first ILD layer is separated from the first spacer by an air gap.

Abstract: The present disclosure provides a method for preparing a semiconductor package structure. The method includes the following steps. A first die is provided. A second die including a plurality of first conductors is bonded to the first die. A plurality of second conductors are disposed on the first die. A molding is disposed to encapsulate the first die, the second die and the plurality of second conductors. An RDL is disposed on the second die and the molding. A plurality of connecting structures are disposed on the RDL.

Abstract: The present application discloses a method for fabricating a semiconductor device. The method includes providing a first semiconductor structure; and forming a first connecting structure comprising a first connecting insulating layer on the first semiconductor structure, a plurality of first connecting contacts in the first connecting insulating layer, and a plurality of first supporting contacts in the first connecting insulating layer.

Abstract: A manufacturing method of a semiconductor package is provided as follows. A semiconductor die is provided, wherein the semiconductor die comprises a semiconductor substrate, an interconnection layer and a through semiconductor via, the interconnection layer is disposed on an active surface of the semiconductor substrate, the through semiconductor via penetrates the semiconductor substrate from a back surface of the semiconductor substrate to the active surface of the semiconductor substrate. An encapsulant is provided to laterally encapsulate the semiconductor die. A through encapsulant via penetrating through the encapsulant is formed.

Abstract: The present disclosure provides a semiconductor structure having a first wafer including a first substrate, a first dielectric layer over the first substrate, and a first conductive pad surrounded by the first dielectric layer; a second wafer including a second dielectric layer, a second substrate over the second dielectric layer, and a second conductive pad surrounded by the second dielectric layer; a bonding dielectric disposed between the first dielectric layer and the second dielectric layer to bond the first dielectric layer with the second dielectric layer; and a conductive via extending from the first conductive pad and surrounded by the bonding dielectric, the second conductive pad and the second wafer.

Abstract: The present application discloses a semiconductor device with a recessed pad layer and a method for fabricating the semiconductor device. The semiconductor device includes a first die, a second die positioned on the first die, a pad layer positioned in the first die, a filler layer including an upper portion and a recessed portion, and a barrier layer positioned between the second die and the upper portion of the filler layer, between the first die and the upper portion of the filler layer, and between the pad layer and the recessed portion of the filler layer. The upper portion of the filler layer is positioned along the second die and the first die, and the recessed portion of the filler layer is extending from the upper portion and positioned in the pad layer.

Abstract: A semiconductor package includes a first sub-package and a second sub-package. The first sub-package is stacked atop the second sub-package. Each of the first sub-package and the second sub-package includes at least two first semiconductor dies, a second semiconductor die, a plurality of molding pieces, a bond-pad layer, a plurality of redistribution layers (RDLs) and a plurality of bumps. The bumps of the first sub-package are attached to the bond-pad layer of the second sub-package.