Patents by Inventor Shinichi Yamane

Shinichi Yamane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096357
    Abstract: According to one embodiment, a disk device includes a rotatable magnetic disk, an actuator which supports and moves a head, a ramp which holds the head at an unloaded position, a motor which rotates the magnetic disk, and a controller which performs a load operation and a seek operation. When a radial travel speed of the head during the load operation is referred to as Vr1, a circumferential travel speed of the head is referred to as Vt1, a radial travel speed of the head during the seek operation is referred to as Vrs, and a circumferential travel speed is referred to as Vts, the controller controls at least one of the radial travel speed of the head and number of revolutions of the magnetic disk to satisfy a relationship (Vr1/Vt1)<(Vrs/Vts).
    Type: Application
    Filed: February 15, 2023
    Publication date: March 21, 2024
    Inventors: Shinichi Kobatake, Toru Watanabe, Masami Yamane
  • Patent number: 10835072
    Abstract: A steam generator includes: a water storage chamber which stores water therein, a heater which heats inside the water storage chamber to generate steam, a water supply device which supplies the water storage chamber with water, a steam spout port which ejects steam generated in the water storage chamber therethrough, a temperature detector which detects a temperature in the water storage chamber, and a controller which controls the heater and the water supply device, wherein after the start of the heating by the heater, the controller determines if water storage is completed in the water storage chamber based on the temperature detected by the temperature detector.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: November 17, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaki Shibuya, Yuji Hayakawa, Kuniaki Abe, Shinichi Yamane
  • Publication number: 20190021142
    Abstract: Provided is an induction heating cooker which can be carried to a desired position on a cooking table to conduct grill cooking using induction heating and radiation heating and includes a grill tray (8) that is placed inside a heating chamber (7) and includes an engaging section that is used for removing the grill tray (8) from the heating chamber (7) and inserting the grill tray (8) into the heating chamber (7). The grill tray (8) is configured as being placeable on a cooking table. Grill cooking is conducted using an upper heating unit which is provided above the heating chamber (7) and heats a food item inside the heating chamber (7) by radiation and a lower heating unit which is provided below the heating chamber and heats the grill tray by induction.
    Type: Application
    Filed: February 10, 2017
    Publication date: January 17, 2019
    Inventors: ISAO MIZUTA, TAIHEI OGURI, TAKAYUKI AKASHI, SHINICHI YAMANE
  • Publication number: 20160066738
    Abstract: A steam generator includes: a water storage chamber which stores water therein, a heater which heats inside the water storage chamber to generate steam, a water supply device which supplies the water storage chamber with water, a steam spout port which ejects steam generated in the water storage chamber therethrough, a temperature detector which detects a temperature in the water storage chamber, and a controller which controls the heater and the water supply device, wherein after the start of the heating by the heater, the controller determines if water storage is completed in the water storage chamber based on the temperature detected by the temperature detector.
    Type: Application
    Filed: April 16, 2014
    Publication date: March 10, 2016
    Inventors: Masaki SHIBUYA, Yuji HAYAKAWA, Kuniaki ABE, Shinichi YAMANE
  • Patent number: 9056805
    Abstract: Highly pure butanol can be produced by a method for producing butanol, the method comprising: Step A, wherein a butanol-containing solution is filtered through a nanofiltration membrane and a butanol-containing solution is recovered from the permeate side; Step B, wherein the butanol-containing solution obtained in Step A is passed through a reverse osmosis membrane and thereby concentrated to cause two-phase separation into a butanol phase and an aqueous phase; and Step C, wherein butanol is recovered from the butanol phase obtained in Step B.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: June 16, 2015
    Assignee: TORAY INDUSTRIES, INC.
    Inventors: Masateru Ito, Izumi Morita, Shinichi Yamane, Katsushige Yamada
  • Patent number: 9018424
    Abstract: A method for producing a diol or triol, which has a step of removing impurities contained in a diol- or triol-containing solution, is provided. In the method, a diol- or triol-containing solution is filtered through a nanofiltration membrane having a polyamide-containing functional layer. The diol- or triol-containing solution is then collected from the permeate flow of the nanofiltration membrane.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: April 28, 2015
    Assignee: Toray Industries, Inc.
    Inventors: Izumi Morita, Masateru Ito, Hideki Sawai, Shinichi Minegishi, Katsushige Yamada, Kenji Kawamura, Shinichi Yamane
  • Publication number: 20140190961
    Abstract: A cooking apparatus 1 includes: a heating chamber which accommodates an object to be heated; an interior lamp illuminates the heating chamber; a control unit which supplies power to the interior lamp; and an operation unit which operates the control unit. The interior lamp is formed with an LED board on which a plurality of LED elements are mounted, and the control unit supplies power to only a part of the plurality of LED elements during cooking.
    Type: Application
    Filed: October 12, 2012
    Publication date: July 10, 2014
    Inventors: Kouji Kanzaki, Hisahiro Nishitani, Shinichi Yamane
  • Publication number: 20130041187
    Abstract: Highly pure butanol can be produced by a method for producing butanol, the method comprising: Step A, wherein a butanol-containing solution is filtered through a nanofiltration membrane and a butanol-containing solution is recovered from the permeate side; Step B, wherein the butanol-containing solution obtained in Step A is passed through a reverse osmosis membrane and thereby concentrated to cause two-phase separation into a butanol phase and an aqueous phase; and Step C, wherein butanol is recovered from the butanol phase obtained in Step B.
    Type: Application
    Filed: March 16, 2011
    Publication date: February 14, 2013
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Masateru Ito, Izumi Morita, Shinichi Yamane, Katsushige Yamada
  • Publication number: 20120253082
    Abstract: A method for producing a diol or triol, which has a step of removing impurities contained in a diol- or triol-containing solution, is provided. In the method, a diol- or triol-containing solution is filtered through a nanofiltration membrane having a polyamide-containing functional layer. The diol- or triol-containing solution is then collected from the permeate flow of the nanofiltration membrane.
    Type: Application
    Filed: March 30, 2011
    Publication date: October 4, 2012
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Izumi MORITA, Masateru Ito, Hideki Sawai, Shinichi Minegishi, Katsushige Yamada, Kenji Kawamura, Shinichi Yamane
  • Publication number: 20120125206
    Abstract: A heating device including a heat chamber to accommodate an object to be heated, a heater, an exhaust port, an exhaust fan to eject air from inside the heat chamber through an exhaust port, and a filter to eliminate oily smoke from an exhaust gas, the heating device further including a first temperature detector to detect a temperature inside the heat chamber, a second temperature detector to detect the temperature of the air ejected through the exhaust port, and a controller to judge whether the filter is clogged or not based on a rotation number of the exhaust fan, and a difference between a temperature To in the heat chamber and a temperature Tex of the air ejected through the exhaust port.
    Type: Application
    Filed: September 13, 2010
    Publication date: May 24, 2012
    Applicant: PANASONIC CORPORATION
    Inventor: Shinichi Yamane
  • Patent number: 7777767
    Abstract: An image forming apparatus includes an image forming unit that forms a color image in which a plurality of color component images are superimposed; and a formation controlling unit that allows the image forming unit to form images for adjustment of formation positions of the respective color component images. The formation controlling unit allows the image forming unit to form, for each color, a plurality of adjustment images having different tilts with respect to a main scanning direction. A shift of a detected position of each adjustment image from a reference position in which each adjustment image should be formed is calculated, a tilt and an intercept of a regression line that uses the reference positions and the calculated shifts as variables are calculated, and a shift in the main scanning direction and a shift in a sub-scanning direction are determined based on the calculated tilt and intercept.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: August 17, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norio Tomita, Yoshikazu Harada, Kengo Matsuyama, Shinichi Yamane
  • Patent number: 7746180
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: June 29, 2010
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Yamane, Seiji Wantanabe
  • Publication number: 20090140818
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Application
    Filed: January 30, 2009
    Publication date: June 4, 2009
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Yamane, Seiji Watanabe
  • Patent number: 7501902
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: March 10, 2009
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Yamane, Seiji Watanabe
  • Patent number: 7362186
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: April 22, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Yamane, Seiji Watanabe
  • Publication number: 20080019918
    Abstract: A pharmaceutical preparation has a ligand structure specifically recognizing a target site and an amphiphilic compound having a hydrophobic or amphiphilic group. The pharmaceutical preparation employs an amphiphilic compound of specific structure obtained by introducing a chained hydrophilic group with an appropriate flexibility, and thus becomes a fine particle suited for drug targeting. The pharmaceutical preparation is expected to give a prolonged pharmacological effect. A particulate preparation exhibiting a remarkable site targeting property can be formed. Further, according to the selection of matrix forming material, the drug releasing property can be controlled.
    Type: Application
    Filed: September 7, 2005
    Publication date: January 24, 2008
    Inventors: Takao Aoki, Shinichi Yamane, Shinichi Kawanami, Yuichi Koyamatsu, Yoshifumi Watanabe, Itaru Hamachi, Ryo Suzuki, Masakazu Koiwa, Nobuo Ida
  • Publication number: 20070279134
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Application
    Filed: May 23, 2007
    Publication date: December 6, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Yamane, Seiji Watanabe
  • Publication number: 20070109393
    Abstract: An image forming apparatus includes an image forming unit that forms a color image in which a plurality of color component images are superimposed; and a formation controlling unit that allows the image forming unit to form images for adjustment of formation positions of the respective color component images. The formation controlling unit allows the image forming unit to form, for each color, a plurality of adjustment images having different tilts with respect to a main scanning direction. A shift of a detected position of each adjustment image from a reference position in which each adjustment image should be formed is calculated, a tilt and an intercept of a regression line that uses the reference positions and the calculated shifts as variables are calculated, and a shift in the main scanning direction and a shift in a sub-scanning direction are determined based on the calculated tilt and intercept.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 17, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Norio Tomita, Yoshikazu Harada, Kengo Matsuyama, Shinichi Yamane
  • Publication number: 20060176089
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Application
    Filed: March 15, 2006
    Publication date: August 10, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Shinichi Yamane, Seiji Watanabe
  • Patent number: 7034622
    Abstract: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 25, 2006
    Assignee: Matsushita Electronic Industrial Co., Ltd.
    Inventors: Shinichi Yamane, Seiji Watanabe