Patents by Inventor Shinichiro Takatani

Shinichiro Takatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120200335
    Abstract: One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
    Type: Application
    Filed: April 16, 2012
    Publication date: August 9, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Shigeki Koya, Shinichiro Takatani, Takashi Ogawa, Akishige Nakajima, Yasushi Shigeno
  • Patent number: 8200167
    Abstract: One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: June 12, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shigeki Koya, Shinichiro Takatani, Takashi Ogawa, Akishige Nakajima, Yasushi Shigeno
  • Patent number: 8159282
    Abstract: The present invention is directed to reduce increase in the level of a harmonic signal of an RF (transmission) Tx output signal at the time of supplying an RF Tx signal to a bias generation circuit of an antenna switch. A semiconductor integrated circuit includes an antenna switch having a bias generation circuit, a Tx switch, and an antenna switch having a bias generation circuit, a transmitter switch, and a receiver (Rx) switch. The on/off state of a transistor of a Tx switch coupled between a Tx port and an I/O port is controlled by a Tx control bias. The on/off state of the transistors of the Rx switch coupled between the I/O port and a receiver (Rx) port is controlled by an RX control bias. A radio frequency (RF) signal input port of the bias generation circuit is coupled to the Tx port, and a negative DC output bias generated from a DC output port can be supplied to a gate control port of transistors of the Rx switch.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: April 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Kaoru Katoh, Shigeki Koya, Shinichiro Takatani, Yasushi Shigeno, Akishige Nakajima, Takashi Ogawa
  • Publication number: 20120001230
    Abstract: A multi-gate semiconductor device with inter-gate conductive regions being connected to balance resistors is provided. The multi-gate semiconductor device comprises a substrate, a multilayer structure formed upon the substrate, a first ohmic electrode, a second ohmic electrode, a plural of gate electrodes, at least one conductive region, and at least one resistive component. When put into practice, the multi-gate semiconductor device is advantageous in reducing the voltage drop along the conductive region with a minimal change in device layout, improving the OFF-state linearity while retaining a low insertion loss, and minimizing the area occupied by the resistor and hence the total chip size.
    Type: Application
    Filed: July 2, 2010
    Publication date: January 5, 2012
    Inventor: Shinichiro Takatani
  • Publication number: 20110156983
    Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
    Type: Application
    Filed: February 25, 2011
    Publication date: June 30, 2011
    Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
  • Patent number: 7899412
    Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: March 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
  • Publication number: 20100297960
    Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
    Type: Application
    Filed: July 29, 2010
    Publication date: November 25, 2010
    Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
  • Patent number: 7783265
    Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: August 24, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
  • Publication number: 20100117713
    Abstract: The present invention is directed to reduce increase in the level of a harmonic signal of an RF (transmission) Tx output signal at the time of supplying an RF Tx signal to a bias generation circuit of an antenna switch. A semiconductor integrated circuit includes an antenna switch having a bias generation circuit, a Tx switch, and an antenna switch having a bias generation circuit, a transmitter switch, and a receiver (Rx) switch. The on/off state of a transistor of a Tx switch coupled between a Tx port and an I/O port is controlled by a Tx control bias. The on/off state of the transistors of the Rx switch coupled between the I/O port and a receiver (Rx) port is controlled by an RX control bias. A radio frequency (RF) signal input port of the bias generation circuit is coupled to the Tx port, and a negative DC output bias generated from a DC output port can be supplied to a gate control port of transistors of the Rx switch.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Inventors: Kaoru Katoh, Shigeki Koya, Shinichiro Takatani, Yasushi Shigeno, Akishige Nakajima, Takashi Ogawa
  • Publication number: 20100069020
    Abstract: One high-frequency switch Qm supplied with transmit and receive signals to ON, and another high-frequency switch Qn supplied with a signal of another system to OFF are controlled. In the other high-frequency switch Qn, to set V-I characteristics of near-I/O gate resistances Rg1n-Rg3n of a near-I/O FET Qn1 near to a common input/output terminal I/O connected with an antenna are set to be higher in linearity than V-I characteristics of middle-portion gate resistances Rg3n and Rg4n of middle-portion FETs Qn3 and Qn4. Thus, even in case that an uneven RF leak signal is supplied to near-I/O gate resistances Rg1n-Rg3n, and middle-portion gate resistances Rg3n and Rg4n, the distortion of current flowing through the near-I/O gate resistances Rg1n-Rg3n near to the input/output terminal I/O can be reduced.
    Type: Application
    Filed: November 8, 2007
    Publication date: March 18, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Shigeki Koya, Shinichiro Takatani, Takashi Ogawa, Akishige Nakajima, Yasushi Shigeno
  • Publication number: 20090104881
    Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
    Type: Application
    Filed: December 15, 2008
    Publication date: April 23, 2009
    Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
  • Publication number: 20090026499
    Abstract: A semiconductor integrated circuit device having a plurality of semiconductor electronic members including a field effect transistor, intended for suppressing a sidegating effect on the field effect transistor, wherein accumulation of majority carriers of the field effect transistor is suppressed at the interface of heterojunction in the buffering compound semiconductor layer and the interface between the substrate and the buffering compound semiconductor layer in the device isolation region so that the discontinuity of energy forbidden bands of the semiconductors caused at the interfaces does not form a potential barrier upon conduction of the carriers into the substrate, whereby the sidegating effect from the resistor element, etc. placed adjacently to the field effect transistor can be decreased drastically.
    Type: Application
    Filed: January 24, 2008
    Publication date: January 29, 2009
    Inventors: Takeshi Kikawa, Shinichiro Takatani, Tomihisa Yukimoto, Yohei Otoki, Hiroyuki Kamogawa, Tomoyoshi Mishima
  • Patent number: 7425876
    Abstract: An object of the present invention is to provide an antenna switch circuit that effectively reduces signal leakages at a cross point even at higher operating frequencies and a high frequency module containing said antenna switch module. The antenna switch circuit comprises: a high frequency signal line to transmit a transmitting signal to be input to transmitting terminals to an antenna terminal and also to transmit a receiving signal to be input to the antenna terminal to receiving terminals; switches that are connected in the middle of the high frequency signal line between transmitting terminal and antenna terminal; switches that are connected in the middle of the high frequency signal line between receiving terminal and antenna terminal; and signal lines to transmit control signals for controlling turning on and off of the switches.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: September 16, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Ogawa, Shinichiro Takatani, Akishige Nakajima, Yasushi Shigeno, Eigo Tange
  • Publication number: 20070295994
    Abstract: A hetero-junction bipolar transistor is provided including emitter contact region, an emitter region made of a first semiconductor material, a base region made of a second semiconductor material having a smaller energy band gap than the first semiconductor material, a collector region made of the first semiconductor material, and a collector contact area, the regions being serially formed on a surface of a substrate in a direction parallel to the surface thereof. A buffer layer made of a third semiconductor material with an energy band gap larger than the first semiconductor material is provided between the emitter region, the base region, the collector region and the substrate surface. Emitter, base and collector electrodes are also provided, in contact with the emitter contact region, the base region, and the collector region, respectively.
    Type: Application
    Filed: March 14, 2007
    Publication date: December 27, 2007
    Inventors: Kazuhiro Mochizuki, Hidetoshi Matsumoto, Shinichiro Takatani
  • Patent number: 7256437
    Abstract: The upper electrode of a capacitor is constituted of laminated films which act to prevent hydrogen atoms from reaching the capacitor electrodes and degrading performance. In one example, a four layer upper electrode respectively acts as a Schottky barrier layer, a hydrogen diffusion preventing layer, a reaction preventing layer, and an adsorption inhibiting layer. Therefore, the occurrence of a capacitance drop, imperfect insulation, and electrode peeling in the semiconductor device due to a reducing atmosphere can be prevented. In addition, the long-term reliability of the device can be improved.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: August 14, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hiroshi Miki, Keiko Kushida, Yasuhiro Shimamoto, Shinichiro Takatani, Yoshihisa Fujisaki, Hiromi Nakai
  • Publication number: 20060118951
    Abstract: A switching element is provided that realizes an stabilize a potential between the gates of the multi-gates without an increase in the insertion loss, and an antenna switch circuit and a radio frequency module each using the switch element. The switching element includes two ohmic electrodes 39, 40 formed on a semiconductor substrate, at least two gate electrodes 41, 42 disposed between the two ohmic electrodes, and a conductive region 45 disposed between the adjacent gate electrodes among the at least two gate electrodes, a field effective transistor being structured by the two ohmic electrodes, the at least two gate electrodes, and the conductive region. The conductive region has a wider portion that is wider in width than the conductive region interposed between the adjacent gate electrodes on one end thereof. The distance between the adjacent gate electrodes is narrower than the width of the wider portion. Resistors 44, 46 are connected in series between the two ohmic electrodes through the wider portion.
    Type: Application
    Filed: December 2, 2005
    Publication date: June 8, 2006
    Inventors: Takashi Ogawa, Shinichiro Takatani, Shigeki Koya, Hiroyuki Takazawa, Shinya Osakabe, Akishige Nakajima, Yasushi Shigeno
  • Publication number: 20060061434
    Abstract: An object of the present invention is to provide an antenna switch circuit that effectively reduces signal leakages at a cross point even at higher operating frequencies and a high frequency module containing said antenna switch module. The antenna switch circuit comprises: a high frequency signal line to transmit a transmitting signal to be input to transmitting terminals to an antenna terminal and also to transmit a receiving signal to be input to the antenna terminal to receiving terminals; switches that are connected in the middle of the high frequency signal line between transmitting terminal and antenna terminal; switches that are connected in the middle of the high frequency signal line between receiving terminal and antenna terminal; and signal lines to transmit control signals for controlling turning on and off of the switches.
    Type: Application
    Filed: July 12, 2005
    Publication date: March 23, 2006
    Inventors: Takashi Ogawa, Shinichiro Takatani, Akishige Nakajima, Yasushi Shigeno, Eigo Tange
  • Publication number: 20050051821
    Abstract: The upper electrode of a capacitor is constituted of laminated films which act to prevent hydrogen atoms from reaching the capacitor electrodes and degrading performance. In one example, a four layer upper electrode respectively acts as a Schottky barrier layer, a hydrogen diffusion preventing layer, a reaction preventing layer, and an adsorption inhibiting layer. Therefore, the occurrence of a capacitance drop, imperfect insulation, and electrode peeling in the semiconductor device due to a reducing atmosphere can be prevented. In addition, the long-term reliability of the device can be improved.
    Type: Application
    Filed: August 18, 2004
    Publication date: March 10, 2005
    Inventors: Hiroshi Miki, Keiko Kushida, Yasuhiro Shimamoto, Shinichiro Takatani, Yoshihisa Fujisaki, Hiromi Nakai
  • Patent number: 6818523
    Abstract: A method for forming a semiconductor storage device includes steps of forming a memory cell transistor, forming a first plug connected to the memory cell transistor, forming a second plug of a hydrogen diffusion inhibiting layer, forming capacitor electrodes and a capacitor insulator between the capacitor electrodes and forming a hydrogen adsorption inhibiting layer.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: November 16, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Miki, Keiko Kushida, Yasuhiro Shimamoto, Shinichiro Takatani, Yoshihisa Fujisaki, Hiromi Nakai
  • Patent number: 6800889
    Abstract: A semiconductor device includes a capacitor having a lower electrode (102), a high-dielectric-constant or ferroelectric thin film (103), and an upper electrode (104) which are subsequently stacked. An impurity having an action of suppressing the catalytic activity of a metal or a conductive oxide constituting the electrode is added to the upper electrode (104). The addition of the impurity is effective to prevent inconveniences such as a reduction in capacitance, an insulation failure, and the peeling of the electrode due to hydrogen heat-treatment performed after formation of the upper electrode (104), and to improve the long-term reliability.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: October 5, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Shinichiro Takatani, Hiroshi Miki, Keiko Kushida, Yoshihisa Fujisaki, Kazuyoshi Torii