Patents by Inventor Shinya Nunoue
Shinya Nunoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9601662Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.Type: GrantFiled: October 15, 2015Date of Patent: March 21, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
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Patent number: 9590141Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.Type: GrantFiled: June 8, 2015Date of Patent: March 7, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
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Patent number: 9590009Abstract: A semiconductor light emitting element includes a base body, a first semiconductor layer, a second semiconductor layer, a first light emitting layer, a first conductive layer, a third semiconductor layer, a fourth semiconductor layer, a second light emitting layer, a second conductive layer, a first member, and a second member. The first member includes a first end portion and a second end portion. The first end portion is positioned between the base body and the first conductive layer and electrically connected to the first conductive layer, the second end portion not overlapping the second conductive layer. The second member includes a third end portion and a fourth end portion. The third end portion is positioned between the base body and the second conductive layer and electrically connected to the second conductive layer. The fourth end portion is electrically connected to the second end portion.Type: GrantFiled: August 11, 2015Date of Patent: March 7, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Jumpei Tajima, Hiroshi Ono, Toshihide Ito, Kenjiro Uesugi, Shinya Nunoue
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Publication number: 20170025578Abstract: According to one embodiment, a nitride semiconductor element includes a p-type semiconductor layer and a p-side electrode. The p-type semiconductor layer includes a nitride semiconductor, and has a first surface. The p-side electrode contacts the first surface. The first surface is a semi-polar plane. The first surface includes a plurality of protrusions. A height of the protrusions along a first direction is not less than 1 nanometer and not more than 5 nanometers. The first direction is from the p-type semiconductor layer toward the p-side electrode. A density of the protrusions in the first surface is more than 1.0×1010/cm2 and not more than 6.1×1010/cm2.Type: ApplicationFiled: February 25, 2016Publication date: January 26, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Toshiki HIKOSAKA, Hisashi Yoshida, Kenjiro Uesugi, Hiroshi Ono, Shinya Nunoue
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Patent number: 9530767Abstract: According to one embodiment, a semiconductor light emitting element includes a base body, first to sixth semiconductor layers, a first conductive layer, and a first pad layer. The first semiconductor layer is separated from the base body and includes first and second semiconductor regions arranged with each other. The second semiconductor layer is provided between the second semiconductor region and the base body. The third semiconductor layer is provided between the second semiconductor region and the second semiconductor layer. The fourth semiconductor layer is separated from the base body, arranged with the first semiconductor layer. The fifth semiconductor layer is provided between the base body and one portion of the fourth semiconductor layer. The sixth semiconductor layer is provided between the fifth semiconductor layer and the one portion. The first conductive layer includes first, second, and third conductive regions. The first pad layer includes a first pad region.Type: GrantFiled: March 14, 2016Date of Patent: December 27, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Jumpei Tajima, Hiroshi Ono, Shunsuke Asaba, Shinya Nunoue
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Patent number: 9515146Abstract: According to one embodiment, a nitride semiconductor layer spreading along a first surface is provided. The nitride semiconductor layer includes a first region and a second region. A length of the first region in a first direction parallel to the first surface is longer than a length of the first region in a second direction parallel to the first surface and perpendicular to the first direction. The second region is arranged with the first region in the second direction. A length of the second region in the first direction is longer than a length of the second region in the second direction. A c-axis being is tilted with respect to the second direction for the first region and the second region. The c-axis intersects a third direction perpendicular to the first surface.Type: GrantFiled: May 1, 2015Date of Patent: December 6, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Hikosaka, Hiroshi Ono, Shinya Nunoue
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Patent number: 9508804Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.Type: GrantFiled: February 16, 2016Date of Patent: November 29, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
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Patent number: 9478706Abstract: According to one embodiment, a semiconductor light emitting device includes: first and second semiconductor layers, a light emitting part, and an In-containing layer. The first semiconductor layer is formed on a silicon substrate via a foundation layer. The light emitting part is provided on the first semiconductor layer, and includes barrier layers and a well layer provided between the barrier layers including Ga1-z1Inz1N (0<z1?1). The second semiconductor layer is provided on the light emitting part. The In-containing layer is provided at at least one of first and second positions. The first position is between the first semiconductor layer and the light emitting part. The second position is between the second semiconductor layer and the light emitting part. The In-containing layer includes In with a composition ratio different from the In composition ratio z1 and has a thickness 10 nm to 1000 nm.Type: GrantFiled: July 8, 2014Date of Patent: October 25, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Jongil Hwang, Tomonari Shioda, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
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Publication number: 20160284685Abstract: According to one embodiment, a semiconductor light emitting element includes a base body, first to sixth semiconductor layers, a first conductive layer, and a first pad layer. The first semiconductor layer is separated from the base body and includes first and second semiconductor regions arranged with each other. The second semiconductor layer is provided between the second semiconductor region and the base body. The third semiconductor layer is provided between the second semiconductor region and the second semiconductor layer. The fourth semiconductor layer is separated from the base body, arranged with the first semiconductor layer. The fifth semiconductor layer is provided between the base body and one portion of the fourth semiconductor layer. The sixth semiconductor layer is provided between the fifth semiconductor layer and the one portion. The first conductive layer includes first, second, and third conductive regions. The first pad layer includes a first pad region.Type: ApplicationFiled: March 14, 2016Publication date: September 29, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Jumpei TAJIMA, Hiroshi ONO, Shunsuke ASABA, Shinya NUNOUE
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Patent number: 9419175Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type; a light emitting layer; a conductive metal layer; and a first stress application layer. The first semiconductor layer contains a nitride semiconductor crystal and receives tensile stress in a (0001) plane. The second semiconductor layer contains a nitride semiconductor crystal. The light emitting layer has an average lattice constant larger than a lattice constant of the first semiconductor layer. The conductive metal layer has a thermal expansion coefficient larger than a thermal expansion coefficient of a nitride semiconductor crystal. The first stress application layer is provided between the second semiconductor layer and the light emitting layer. The first stress application layer relaxes tensile stress applied from the metal layer to the second semiconductor layer.Type: GrantFiled: February 28, 2013Date of Patent: August 16, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Naoharu Sugiyama, Shinji Yamada, Shinya Nunoue
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Patent number: 9412910Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a light emitting portion, a first transparent conductive layer, and a second transparent conductive layer. The light emitting portion is provided between the first and second semiconductor layers. The second semiconductor layer is disposed between the first transparent conductive layer and the light emitting portion. The first transparent conductive layer includes oxygen. The second transparent conductive layer is provided between the second semiconductor layer and the first transparent conductive layer. The second transparent conductive layer has a refractive index higher than a refractive index of the first transparent conductive layer, and includes oxygen at a concentration higher than a concentration of oxygen included in the first transparent conductive layer.Type: GrantFiled: February 18, 2011Date of Patent: August 9, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Toshihide Ito, Taisuke Sato, Toshiyuki Oka, Shinya Nunoue
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Patent number: 9397167Abstract: A nitride semiconductor wafer includes a silicon substrate, a stacked multilayer unit, a silicon-containing unit, and an upper layer unit. The silicon substrate has a major surface. The stacked multilayer unit is provided on the major surface. The stacked multilayer unit includes N number of buffer layers. The buffer layers include an i-th buffer layer, and an (i+1)-th buffer layer provided on the i-th buffer layer. The i-th buffer layer has an i-th lattice length Wi in a first direction parallel to the major surface. The (i+1)-th buffer layer has an (i+1)-th lattice length W(i+1) in the first direction. A relation that (W(i+1)?Wi)/Wi?0.008 is satisfied for all the buffer layers. The silicon-containing unit is provided on the stacked multilayer unit. The upper layer unit is provided on the silicon-containing unit.Type: GrantFiled: December 28, 2012Date of Patent: July 19, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hisashi Yoshida, Toshiki Hikosaka, Yoshiyuki Harada, Naoharu Sugiyama, Shinya Nunoue
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Patent number: 9391145Abstract: According to one embodiment, a nitride semiconductor element includes a functional layer and a stacked body. The stacked body includes a GaN intermediate layer, a low Al composition layer, a high Al composition layer, and a first Si-containing layer. The low Al composition layer includes a nitride semiconductor having a first Al composition ratio. The low Al composition layer is provided between the GaN intermediate layer and the functional layer. The high Al composition layer includes a nitride semiconductor having a second Al composition ratio. The high Al composition layer is provided between the GaN intermediate layer and the low Al composition layer. The second Al composition ratio is higher than the first Al composition ratio. The first Si-containing layer is provided between the GaN intermediate layer and the high Al composition layer.Type: GrantFiled: January 9, 2015Date of Patent: July 12, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Hikosaka, Hisashi Yoshida, Hajime Nago, Shinya Nunoue
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Publication number: 20160190393Abstract: According to one embodiment, a semiconductor light emitting element includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type including first and second semiconductor regions, a third semiconductor layer provided between the first and second semiconductor layers, a first electrode layer electrically connected to the first semiconductor layer, and a second electrode layer electrically connected to the second semiconductor layer. The second and third semiconductor layers are disposed between the second electrode layer and the first semiconductor layer. The second electrode layer includes a first metal region contacting the first semiconductor region and including silver, a second metal region contacting the second semiconductor region and including silver, and a third metal region contacting the first metal region and including silver. The first metal region is disposed between the third metal region and the first semiconductor region.Type: ApplicationFiled: December 21, 2015Publication date: June 30, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Toshihide ITO, Shinya NUNOUE
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Patent number: 9368682Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure body, a first electrode, a second electrode, and a dielectric body part. The stacked structure body includes a first semiconductor layer, having a first portion and a second portion juxtaposed with the first portion, a light emitting layer provided on the second portion, a second semiconductor layer provided on the light emitting layer. The first electrode includes a contact part provided on the first portion and contacting the first layer. The second electrode includes a first part provided on the second semiconductor layer and contacting the second layer, and a second part electrically connected with the first part and including a portion overlapping with the contact part when viewed from the first layer toward the second layer. The dielectric body part is provided between the contact part and the second part.Type: GrantFiled: May 15, 2015Date of Patent: June 14, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Katsuno, Satoshi Mitsugi, Toshiyuki Oka, Shinya Nunoue
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Publication number: 20160163803Abstract: According to one embodiment, a nitride semiconductor element includes a foundation layer, a functional layer and a stacked body. The stacked body is provided between the foundation layer and the functional layer. The stacked body includes a first stacked intermediate layer including a first GaN intermediate layer, a first high Al composition layer of Alx1Ga1-x1N (0<x1?1) and a first low Al composition layer. A compressive strain is applied to the first low Al composition layer. Unstrained GaN has a first lattice spacing. The Alx1Ga1-x1N (0<x1?1) when unstrained has a second lattice spacing. The first high Al composition layer has a third lattice spacing. An Al composition ratio of the first low Al composition layer is not more than a ratio of a difference between the first and third lattice spacings to a difference between the first and second lattice spacings.Type: ApplicationFiled: February 16, 2016Publication date: June 9, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Hisashi YOSHIDA, Naoharu SUGIYAMA, Shinya NUNOUE
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Patent number: 9349590Abstract: According to one embodiment, a method for manufacturing a nitride semiconductor layer is disclosed. The method can include forming a first lower layer on a major surface of a substrate and forming a first upper layer on the first lower layer. The first lower layer has a first lattice spacing along a first axis parallel to the major surface. The first upper layer has a second lattice spacing along the first axis larger than the first lattice spacing. At least a part of the first upper layer has compressive strain. A ratio of a difference between the first and second lattice spacing to the first lattice spacing is not less than 0.005 and not more than 0.019. A growth rate of the first upper layer in a direction parallel to the major surface is larger than that in a direction perpendicular to the major surface.Type: GrantFiled: September 5, 2012Date of Patent: May 24, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
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Patent number: 9349925Abstract: A light emitting device according to embodiments includes a light emitting element emitting light with a peak wavelength of 420˜445 nm, a first phosphor emitting light with a peak wavelength of 485˜530 nm, a second phosphor emitting light with a peak wavelength of 530˜580 nm, and a third phosphor emitting light with a peak wavelength of 600˜650 nm. The device emits light having an emission spectrum that has a local minimum value of light intensity between a wavelength of 450˜470 nm or less, the local minimum value being 60% or less of a maximum value of light intensity at a longer wavelength side from the local minimum value, and the device emits light having a color temperature of 4600 K or higher and 5400 K or less.Type: GrantFiled: August 28, 2014Date of Patent: May 24, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Yasushi Hattori, Masahiro Kato, Kunio Ishida, Shinya Nunoue, Yumi Fukuda
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Patent number: 9337396Abstract: According to one embodiment, a semiconductor light emitting device includes a first metal layer, a second metal layer, a third metal layer, a semiconductor light emitting unit and an insulating unit. The semiconductor light emitting unit is separated from the first metal layer in a first direction. The second metal layer is provided between the first metal layer and the semiconductor light emitting unit to be electrically connected to the first metal layer, and is light-reflective. The second metal layer includes a contact metal portion, and a peripheral metal portion. The third metal layer is light-reflective. The third metal layer includes an inner portion, a middle portion, and an outer portion. The insulating unit includes an first insulating portion, a second insulating portion, and a third insulating portion.Type: GrantFiled: February 6, 2014Date of Patent: May 10, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Katsuno, Satoshi Mitsugi, Toshihide Ito, Shinya Nunoue
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Patent number: 9337385Abstract: A semiconductor light emitting element includes a substrate and a stacked body. The stacked body is aligned with the substrate. The stacked body includes first and second semiconductor layers, a light emitting layer, and first and second electrodes. The first semiconductor layer has a first face including first and second portions. The first portion is provided with a plurality of convex portions. The second portion is aligned with the first portion. The second semiconductor layer is provided facing the second portion. The light emitting layer is provided between the second portion and the second semiconductor layer. The second semiconductor layer is disposed between the second electrode and the light emitting layer. An interval of each of the convex portions is no less than 0.5 times and no more than 4 times a wavelength of a light emitted from the light emitting layer.Type: GrantFiled: July 3, 2014Date of Patent: May 10, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Satoshi Mitsugi, Shinji Yamada, Shinya Nunoue