Abstract: A semiconductor device includes a semiconductor substrate, and the semiconductor substrate is divided into an IGBT region, a diode region, and a MOSFET region. A drift layer of n?-type is provided in the semiconductor substrate. The drift layer is shared among the IGBT region, the diode region, and the MOSFET region. In the semiconductor substrate, the diode region is always disposed between the IGBT region and the MOSFET region to cause the IGBT region and the MOSFET region to be separated from each other without being adjacent to each other.

Abstract: An object is to provide a technique capable of improving both recovery loss and recovery capability. The semiconductor device includes a base layer of a second conductive type disposed on a front surface side of the semiconductor substrate in the IGBT region and an anode layer of a second conductive type disposed on a front surface side of the semiconductor substrate in the diode region. The anode layer includes a first portion having a lower end located at a same position as a lower end of the base layer or having a lower end located above the lower end of the base layer and a second portion adjacent to the first portion in plan view, and whose lower end is located above the lower end of the first portion.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: Provided is a technique for improving the durability of a semiconductor device. A semiconductor device includes a semiconductor substrate, an electrode on the semiconductor substrate, a solder-joining metal Him on the electrode, an oxidation-inhibiting metal film on the solder-joining metal film, and a solder layer on the oxidation-inhibiting metal film. The solder-joining metal film includes a first portion that does not overlap the oxidation-inhibiting metal film in plan view when the solder-joining metal film and the oxidation-inhibiting metal film are viewed from the oxidation-inhibiting metal film.

Abstract: According to an aspect of the present disclosure, a semiconductor device includes a semiconductor substrate, a lower electrode provided on the semiconductor substrate, an insulating film that is provided on the semiconductor substrate and surrounds the lower electrode and a metal film that is provided on the lower electrode and includes a convex portion on an upper surface thereof, wherein the convex portion includes a first portion extending in a first direction parallel to an upper surface of the semiconductor substrate, and a second portion extending in a second direction that is parallel to the upper surface of the semiconductor substrate and intersects the first direction, and the metal film is thinner than the insulating film.

Abstract: A switching element control device for controlling a switching element incorporating a reverse conducting diode is provided. The switching element control device includes: a voltage detection circuit detecting a voltage across first and second main electrodes of the switching element; a comparator circuit comparing the voltage detected by the voltage detection circuit with a threshold voltage; and a drive circuit controlling driving of the switching element. The comparator circuit controls the drive circuit so that an on signal is not provided to the switching element when the detected voltage exceeds the threshold voltage.

Abstract: A semiconductor device includes a semiconductor substrate, and the semiconductor substrate is divided into an IGBT region, a diode region, and a MOSFET region. A drift layer of n?-type is provided in the semiconductor substrate. The drift layer is shared among the IGBT region, the diode region, and the MOSFET region. In the semiconductor substrate, the diode region is always disposed between the IGBT region and the MOSFET region to cause the IGBT region and the MOSFET region to be separated from each other without being adjacent to each other.

Abstract: A semiconductor device includes a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an IGBT arranged therein, and a withstand-voltage retention region surrounding the first region and the second regions in plan view are defined. The semiconductor substrate has a first main surface and a second main surface. The semiconductor substrate includes an anode layer having a first conductivity type, which is arranged in the first main surface of the first region, and a diffusion layer having the first conductivity type, which is arranged in the first main surface of the withstand-voltage retention region adjacently to the anode layer. A first trench is arranged in the first main surface on a side of the anode layer with respect to a boundary between the anode layer and the diffusion layer.

Abstract: A switching element control device for controlling a switching element incorporating a reverse conducting diode is provided. The switching element control device includes: a voltage detection circuit detecting a voltage across first and second main electrodes of the switching element; a comparator circuit comparing the voltage detected by the voltage detection circuit with a threshold voltage; and a drive circuit controlling driving of the switching element. The comparator circuit controls the drive circuit so that an on signal is not provided to the switching element when the detected voltage exceeds the threshold voltage.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: Provided is a technique for improving the durability of a semiconductor device. A semiconductor device includes a semiconductor substrate, an electrode on the semiconductor substrate, a solder-joining metal Him on the electrode, an oxidation-inhibiting metal film on the solder-joining metal film, and a solder layer on the oxidation-inhibiting metal film. The solder-joining metal film includes a first portion that does not overlap the oxidation-inhibiting metal film in plan view when the solder-joining metal film and the oxidation-inhibiting metal film are viewed from the oxidation-inhibiting metal film.

Abstract: A film resist is a member for being bonded to a main surface of a substrate, which main surface is provided with a mark. The film resist includes a cutout for the mark to be checked.

Abstract: Provided is a method for manufacturing a semiconductor device that improves the reliability of the semiconductor device under thermal stress and the assembly performance of the semiconductor device in manufacturing steps. The method includes the following: forming a first electrode by depositing a first conductive film onto one main surface of a semiconductor substrate and patterning the first conductive film; forming a first metal film corresponding to a pattern of the first electrode onto the first electrode; forming a second electrode by depositing a second conductive film onto the other main surface of the semiconductor substrate; forming a second metal film thinner than the first metal film onto the second electrode; and collectively forming a third metal film onto each of the first metal film and the second metal film by electroless plating.

Abstract: An RC-IGBT according to the invention includes a high electric field cell formed in a region surrounded by an IGBT cell or in a region surrounded by a diode cell, and an n+ diffusion layer formed at a position opposed to the high electric field cell, the position being on a second main surface of an n? type drift layer. The high electric field cell has a higher maximum electric field intensity generated when a voltage is applied between main terminals than maximum electric field intensities of the IGBT cell, the diode cell, and a withstand voltage holding structure. Additionally, a p+ type collector layer and the high electric field cell fail to overlap with each other in a direction vertical to a first main surface of the n? type drift layer in a plane view.

Abstract: A semiconductor device includes a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an IGBT arranged therein, and a withstand-voltage retention region surrounding the first region and the second regions in plan view are defined. The semiconductor substrate has a first main surface and a second main surface. The semiconductor substrate includes an anode layer having a first conductivity type, which is arranged in the first main surface of the first region, and a diffusion layer having the first conductivity type, which is arranged in the first main surface of the withstand-voltage retention region adjacently to the anode layer. A first trench is arranged in the first main surface on a side of the anode layer with respect to a boundary between the anode layer and the diffusion layer.

Abstract: An RC-IGBT includes a first electrode disposed on a first main surface of a semiconductor substrate over a transistor region and a diode region. The semiconductor substrate includes a MOS gate structure on a first main surface side in the transistor region. The RC-IGBT includes: an interlayer dielectric covering a gate electrode of the MOS gate structure, and having a contact hole exposing a semiconductor layer; and a barrier metal disposed in the contact hole. The first electrode enters the contact hole, is in contact with the semiconductor layer of the MOS gate structure through the barrier metal, and is in direct contact with a semiconductor layer in the diode region of the semiconductor substrate.

Abstract: An RC-IGBT according to the invention includes a high electric field cell formed in a region surrounded by an IGBT cell or in a region surrounded by a diode cell, and an n+ diffusion layer formed at a position opposed to the high electric field cell, the position being on a second main surface of an n? type drift layer. The high electric field cell has a higher maximum electric field intensity generated when a voltage is applied between main terminals than maximum electric field intensities of the IGBT cell, the diode cell, and a withstand voltage holding structure. Additionally, a p+ type collector layer and the high electric field cell fail to overlap with each other in a direction vertical to a first main surface of the n? type drift layer in a plane view.

Abstract: An RC-IGBT according to the invention includes a high electric field cell formed in a region surrounded by an IGBT cell or in a region surrounded by a diode cell, and an n+ diffusion layer formed at a position opposed to the high electric field cell, the position being on a second main surface of an n? type drift layer. The high electric field cell has a higher maximum electric field intensity generated when a voltage is applied between main terminals than maximum electric field intensities of the IGBT cell, the diode cell, and a withstand voltage holding structure. Additionally, a p+ type collector layer and the high electric field cell fail to overlap with each other in a direction vertical to a first main surface of the n? type drift layer in a plane view.

Abstract: An RC-IGBT according to the invention includes a high electric field cell formed in a region surrounded by an IGBT cell or in a region surrounded by a diode cell, and an n+ diffusion layer formed at a position opposed to the high electric field cell, the position being on a second main surface of an n? type drift layer. The high electric field cell has a higher maximum electric field intensity generated when a voltage is applied between main terminals than maximum electric field intensities of the IGBT cell, the diode cell, and a withstand voltage holding structure. Additionally, a p+ type collector layer and the high electric field cell fail to overlap with each other in a direction vertical to a first main surface of the n? type drift layer in a plane view.