Patents by Inventor Shiro Tsunai

Shiro Tsunai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020024069
    Abstract: A charge transfer device is provided which is capable of reducing a reset field-through noise in a stable manner without being affected by characteristics of transistors and without occurrence of a mustache-shaped pulse-like noise.
    Type: Application
    Filed: August 29, 2001
    Publication date: February 28, 2002
    Applicant: NEC Corporation
    Inventor: Shiro Tsunai
  • Publication number: 20010004116
    Abstract: P-type ion implantation is done in N well 15, so as to form a charge drain control layer 17 and form a photodiode N well 16 and OFD drain 5, the result being that, even if there is variation in the potential of the photodiode N well 16 making up the photodiode, because the variation in the potential of the charge drain control layer 17 is in the same direction as the potential of the photodiode N well 16, so that variation does not occur in the maximum amount of electrical charge that can be accumulated, the result being that there is no variation in the signal in the saturation condition.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 21, 2001
    Applicant: NEC Corporation
    Inventor: Shiro Tsunai
  • Patent number: 5966172
    Abstract: A signal processing circuit for a solid state image sensor, includes a charge detection circuit for outputting a signal output from the image sensor, a first inverting amplifier receiving the signal output, and a second inverting amplifier having a source-grounded MOS transistor having a gate connected to receive an output of the first inverting amplifier. A threshold of the MOS transistor is set to be the same as a black reference voltage in the input signal applied to the MOS transistor. Thus, a reset noise included in the signal output from the image sensor is suppressed or removed.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: October 12, 1999
    Assignee: NEC Corporation
    Inventor: Shiro Tsunai
  • Patent number: 5585797
    Abstract: A signal processing device comprises a charge transfer device and a driving circuit, which includes a reference signal generating circuit for generating a reference signal, a transfer clock generating circuit receiving the reference signal for generating a transfer clock to a charge transfer section of the charge transfer device, a digital counter of N bits receiving and counting the reference signal, a D/A converter receiving the output of said counter for converting it into an analog voltage signal, which is applied to a final transfer gate of the charge transfer device, and a latch for latching an output of the counter when an output of a electric charge detection circuit of the charge transfer device reaches a predetermined level, whereby the latch outputs a digital signal of N bits corresponding to a signal electric charge outputted from the charge transfer section.
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: December 17, 1996
    Assignee: NEC Corporation
    Inventor: Shiro Tsunai
  • Patent number: 5539457
    Abstract: A signal processing circuit for a solid state image sensor, includes a charge detection circuit for outputting a signal output from the image sensor, a first inverting amplifier receiving the signal output, and a second inverting amplifier having a source-grounded MOS transistor having a gate connected to receive an output of the first inverting amplifier. A threshold of the MOS transistor is set to be the same as a black reference voltage in the input signal applied to the MOS transistor. Thus, a reset noise included in the signal output from the image sensor is suppressed or removed.
    Type: Grant
    Filed: December 8, 1994
    Date of Patent: July 23, 1996
    Assignee: NEC Corporation
    Inventor: Shiro Tsunai
  • Patent number: 5444281
    Abstract: In a charge transfer device incorporating a charge-coupled device, a junction type field-effect transistor, and a reset transistor, the junction type field-effect transistor includes a source region in contact with a junction gate region and a drain region in contact with the junction gate region. The charge-coupled device has an output gate electrode on a first insulation film formed on a surface of a transfer channel region which is formed in contact with the junction gate region. The reset transistor has a reset gate electrode adjacent to the junction gate region with a second insulation film interposed between the junction gate region and the reset gate electrode. A first distance between the source region and each of the output gate electrode and the reset gate electrode is longer than a second distance between the source region and the drain region.
    Type: Grant
    Filed: May 20, 1993
    Date of Patent: August 22, 1995
    Assignee: NEC Corporation
    Inventor: Shiro Tsunai