Abstract: In a semiconductor device, formed are a lower capacitor electrode on an element isolation film on a silicon substrate, a capacitor insulating film and an upper capacitor electrode. A silicon oxide film is formed on the entire surface of the silicon substrate. On the silicon oxide substrate, formed is a resist pattern that covers a region extending from the inside of a periphery of the upper capacitor electrode to the outside of the periphery thereof. Sidewalls that cover side faces of a gate electrode and the lower capacitor electrode, and a sidewall that covers a side face and an upper periphery of the upper capacitor electrode, are formed by performing anisotropic etching.

Abstract: A semiconductor memory includes a first inverter, a second inverter and a read circuit. The first inverter has its input terminal connected to a first memory node and its output terminal connected to a second memory node. The second inverter is connected in anti-parallel with the first inverter, that is, has its input terminal connected to the second memory node and its output terminal connected to the first memory node. The read circuit includes a first transistor having its gate connected to the first memory node, a second transistor having its gate connected to the second memory node, and a third transistor for connecting the drain of the first transistor and that of the second transistor to a read bit line. The semiconductor memory can improve its soft error resistance without increasing the number of steps of the manufacturing process.

Abstract: A semiconductor memory includes a first inverter, a second inverter and a read circuit. The first inverter has its input terminal connected to a first memory node and its output terminal connected to a second memory node. The second inverter is connected in anti-parallel with the first inverter, that is, has its input terminal connected to the second memory node and its output terminal connected to the first memory node. The read circuit includes a first transistor having its gate connected to the first memory node, a second transistor having its gate connected to the second memory node, and a third transistor for connecting the drain of the first transistor and that of the second transistor to a read bit line. The semiconductor memory can improve its soft error resistance without increasing the number of steps of the manufacturing process.

Abstract: In the semiconductor storage device, a dummy P+ diffusion region which does not contribute to a storage operation is formed in the vicinity of two P+ diffusion regions constituting a storage node. Moreover, a dummy N+ diffusion region which does not contribute to the storage operation is formed in the vicinity of N+ diffusion regions FL210 and FL220 constituting a storage node. Consequently, a part of electrons generated in a P well region PW by irradiation of &agr; rays or neutron rays can be collected into the dummy N+ diffusion region FL250, and a part of holes generated in an N well region NW by the irradiation of the &agr; rays or the neutron rays can be collected into the dummy P+ diffusion region FL150.

Abstract: In a semiconductor device, formed are a lower capacitor electrode on an element isolation film on a silicon substrate, a capacitor insulating film and an upper capacitor electrode. A silicon oxide film is formed on the entire surface of the silicon substrate. On the silicon oxide substrate, formed is a resist pattern that covers a region extending from the inside of a periphery of the upper capacitor electrode to the outside of the periphery thereof. Sidewalls that cover side faces of a gate electrode and the lower capacitor electrode, and a sidewall that covers a side face and an upper periphery of the upper capacitor electrode, are formed by performing anisotropic etching.

Abstract: The present invention relates to a reflection type liquid crystal display for displaying images by reflecting the external light and a fabricating method thereof and its object is to provide a liquid crystal display and a fabricating method thereof which can prevent a color tone of the reflection light and the like from a deterioration by surely absorbing an incident light from a gap between display electrodes. After forming a interlayer insulating film 24 on a source electrode 22 of FET formed on a silicon substrate 1 and planarizing the surface thereof by a CMP and the like, an insulating reflection preventing film 26 is formed. The source electrode 22 and a metal layer 29 are connected by embedding a connecting conductor 30 at a through-hole passing through the reflection preventing film 26 and the interlayer insulating film 24. Similarly, After forming an interlayer insulating film 24′ on the metal layer 29 and planarizing thereon, an insulating reflection preventing film 26′ is formed.

Abstract: A cleaning of a plasma chamber is done by a NF.sub.3 plasma treatment (typically under 1 to 1.5 Torr). The etching rate of an oxide layer can be improved by inserting, between the NF.sub.3 plasma treatments, a low pressure (lower than 10.sup.-1 Torr) plasma treatment preferably in a plasma of oxygen, water vapor, silane, fluorine, a hydrate compound, nitrogen trifluoride, or a mixture of nitrogen trifluoride with at least one of hydrogen fluoride, fluorine, water vapor and hydride compounds.

Abstract: A method for detection of occult blood in a fecal sample which comprises acting a glycosidase type bacteriolytic enzyme on the fecal sample and subjecting the resulting fecal sample to simultaneous detection of hemoglobin, preferably in combination with transferrin, by an immunological measurement procedure.