Patents by Inventor Shoji Wada
Shoji Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11978790Abstract: A semiconductor device includes a gallium nitride based low threshold depletion mode transistor (GaN FET) with a threshold potential between ?10 volts and ?0.5 volts. The GaN FET has a channel layer of III-N semiconductor material including gallium and nitrogen that supports a two-dimensional electron gas (2DEG). The GaN FET has a barrier layer of III-N semiconductor material including aluminum and nitrogen over the channel layer. The GaN FET further has a p-type gate of III-N semiconductor material including gallium and nitrogen. A bottom surface of the gate, adjacent to the barrier layer, does not extend past a top surface of the barrier layer, located opposite from the channel layer. The GaN FET is free of a dielectric layer between the gate and the barrier layer.Type: GrantFiled: December 1, 2020Date of Patent: May 7, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Chang Soo Suh, Jungwoo Joh, Dong Seup Lee, Shoji Wada, Karen Hildegard Ralston Kirmse
-
Patent number: 11562916Abstract: The present invention is provided with: a stage having a placing surface for a semiconductor chip, and a first heater heating the placing surface; a bonding head having a contact surface to be in contact with an subject, a second temperature sensor measuring the temperature of the subject via the contact surface, and a second heater heating the contact surface, said bonding head being driven in at least the orthogonal direction with respect to the placing surface; and a control unit measuring the temperature of the subject based on a temperature detection value of the second temperature sensor, said temperature detection value having being obtained by heating the placing surface and the contact surface to predetermined target temperatures, respectively, by means of the first and second heaters, then bringing the contact surface into contact with the subject in a state wherein heating by the second heater is stopped.Type: GrantFiled: August 22, 2018Date of Patent: January 24, 2023Assignee: SHINKAWA LTD.Inventors: Shoji Wada, Hiroshi Kikuchi
-
Patent number: 11521890Abstract: An apparatus for manufacturing a semiconductor device includes a base portion, a bonding stage arranged on the base portion and having a placement surface for placing a substrate; and one or more connecting members which connect the base portion and the bonding stage, wherein at least one of the one or more connecting members is a connecting plate that deflects following the expansion and contraction of the bonding stage in the plane direction caused by a temperature change.Type: GrantFiled: March 7, 2018Date of Patent: December 6, 2022Assignee: SHINKAWA LTD.Inventor: Shoji Wada
-
Patent number: 11508688Abstract: The present invention has: a heater; and a bonding tool having a lower surface on which a memory chip is adsorbed; and an upper surface attached to the heater, and is provided with a bonding tool which presses the peripheral edge of the memory chip to a solder ball in a first peripheral area of the lower surface and which presses the center of the memory chip (60) to a DAF having a heat resistance temperature lower than that of the solder ball in a first center area. The amount of heat transmitted from the first center area to the center of the memory chip is smaller than that transmitted from the first peripheral area (A) to the peripheral edge of the memory chip. Thus, the bonding apparatus in which the center of a bonding member can be heated to a temperature lower than that at the peripheral edge can be provided.Type: GrantFiled: March 24, 2017Date of Patent: November 22, 2022Assignee: SHINKAWA LTD.Inventors: Kohei Seyama, Yuji Eguchi, Shoji Wada
-
Publication number: 20220173234Abstract: A semiconductor device includes a gallium nitride based low threshold depletion mode transistor (GaN FET) with a threshold potential between ?10 volts and ?0.5 volts. The GaN FET has a channel layer of III-N semiconductor material including gallium and nitrogen that supports a two-dimensional electron gas (2 DEG). The GaN FET has a barrier layer of III-N semiconductor material including aluminum and nitrogen over the channel layer. The GaN FET further has a p-type gate of III-N semiconductor material including gallium and nitrogen. A bottom surface of the gate, adjacent to the barrier layer, does not extend past a top surface of the barrier layer, located opposite from the channel layer. The GaN FET is free of a dielectric layer between the gate and the barrier layer.Type: ApplicationFiled: December 1, 2020Publication date: June 2, 2022Applicant: Texas Instruments IncorporatedInventors: Chang Soo Suh, Jungwoo Joh, Dong Seup Lee, Shoji Wada, Karen Hildegard Ralston Kirmse
-
Publication number: 20210225799Abstract: The present invention has: a heater; and a bonding tool having a lower surface on which a memory chip is adsorbed; and an upper surface attached to the heater, and is provided with a bonding tool which presses the peripheral edge of the memory chip to a solder ball in a first peripheral area of the lower surface and which presses the center of the memory chip (60) to a DAF having a heat resistance temperature lower than that of the solder ball in a first center area. The amount of heat transmitted from the first center area to the center of the memory chip is smaller than that transmitted from the first peripheral area (A) to the peripheral edge of the memory chip. Thus, the bonding apparatus in which the center of a bonding member can be heated to a temperature lower than that at the peripheral edge can be provided.Type: ApplicationFiled: March 24, 2017Publication date: July 22, 2021Applicant: SHINKAWA LTD.Inventors: Kohei SEYAMA, Yuji EGUCHI, Shoji WADA
-
Publication number: 20200365432Abstract: The present invention is provided with: a stage having a placing surface for a semiconductor chip, and a first heater heating the placing surface; a bonding head having a contact surface to be in contact with an subject, a second temperature sensor measuring the temperature of the subject via the contact surface, and a second heater heating the contact surface, said bonding head being driven in at least the orthogonal direction with respect to the placing surface; and a control unit measuring the temperature of the subject based on a temperature detection value of the second temperature sensor, said temperature detection value having being obtained by heating the placing surface and the contact surface to predetermined target temperatures, respectively, by means of the first and second heaters, then bringing the contact surface into contact with the subject in a state wherein heating by the second heater is stopped.Type: ApplicationFiled: August 22, 2018Publication date: November 19, 2020Applicant: SHINKAWA LTD.Inventors: Shoji WADA, Hiroshi KIKUCHI
-
Publication number: 20200273742Abstract: An apparatus for manufacturing a semiconductor device includes a base portion, a bonding stage arranged on the base portion and having a placement surface for placing a substrate; and one or more connecting members which connect the base portion and the bonding stage, wherein at least one of the one or more connecting members is a connecting plate that deflects following the expansion and contraction of the bonding stage in the plane direction caused by a temperature change.Type: ApplicationFiled: March 7, 2018Publication date: August 27, 2020Applicant: SHINKAWA LTD.Inventor: Shoji WADA
-
Patent number: 10707323Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: GrantFiled: May 23, 2019Date of Patent: July 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Publication number: 20190288090Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: ApplicationFiled: May 23, 2019Publication date: September 19, 2019Inventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Patent number: 10374057Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: GrantFiled: October 12, 2017Date of Patent: August 6, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Patent number: 10137519Abstract: A flux reservoir apparatus (100, 200) includes a stage (12) having a recessed portion (13) for reserving flux (51, 52, 53) therein and a flux pot (20) composed of an annular member having a through hole (30) through which the flux (51, 52, 53) flows, the flux pot arranged to move back and forth on the surface (14) of the stage (12) to feed the flux (51, 52, 53) into the recessed portion (13) and to smooth the surface of the flux (51, 52, 53), in which the through hole (30) is an elongated hexagonal hole with a length greater than the width of the recessed portion (13) in the direction perpendicular to the back-and-forth direction, and in which the bottom surface of a flux pot main body (21) is a chevron surface. This reduces leakage of the flux (51, 52, 53) in the flux reservoir apparatus (100, 200).Type: GrantFiled: May 10, 2017Date of Patent: November 27, 2018Assignee: SHINKAWA LTD.Inventors: Kohei Seyama, Shoji Wada
-
Publication number: 20180033865Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: ApplicationFiled: October 12, 2017Publication date: February 1, 2018Inventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Patent number: 9818839Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: GrantFiled: August 15, 2016Date of Patent: November 14, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Publication number: 20170297131Abstract: A flux reservoir apparatus (100, 200) includes a stage (12) having a recessed portion (13) for reserving flux (51, 52, 53) therein and a flux pot (20) composed of an annular member having a through hole (30) through which the flux (51, 52, 53) flows, the flux pot arranged to move back and forth on the surface (14) of the stage (12) to feed the flux (51, 52, 53) into the recessed portion (13) and to smooth the surface of the flux (51, 52, 53), in which the through hole (30) is an elongated hexagonal hole with a length greater than the width of the recessed portion (13) in the direction perpendicular to the back-and-forth direction, and in which the bottom surface of a flux pot main body (21) is a chevron surface. This reduces leakage of the flux (51, 52, 53) in the flux reservoir apparatus (100, 200).Type: ApplicationFiled: May 10, 2017Publication date: October 19, 2017Applicant: Shinkawa Ltd.Inventors: Kohei SEYAMA, Shoji WADA
-
Patent number: 9679866Abstract: Provided is a bonding stage including: a rigid block (10) having a plurality of projections (11) on a surface (16) of the base body, upper surfaces of the projections being flat; a flat plate (20) fixed to supporting surfaces (18) on the projections (11); a ceramic plate (30) suctioned and fixed to the flat plate (20); a plate-shaped heater (40) disposed on a side of the rigid block (10) of the flat plate (20); and coil springs (50) disposed between the heater (40) and the rigid block (10), the coil springs (50) bringing the heater (40) into close contact with a surface of the flat plate (20) on the side of the rigid block (10).Type: GrantFiled: January 7, 2016Date of Patent: June 13, 2017Assignee: SHINKAWA LTD.Inventor: Shoji Wada
-
Patent number: 9640462Abstract: Disclosed herein is a device that includes a first wiring provided as a first-level wiring layer and elongated in a first direction; and a first wiring pad provided as the first-level wiring layer, the first wiring pad being rectangular and including a first side edge that is elongated in the first direction and a second side edge that is elongated in a second direction crossing to the first direction, the first side edge being greater in length than the second side edge, the first wiring pad being greater in length in the second direction than the first wiring.Type: GrantFiled: November 21, 2012Date of Patent: May 2, 2017Assignee: Longitude Semiconductor S.A.R.L.Inventor: Shoji Wada
-
Publication number: 20160351685Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: ApplicationFiled: August 15, 2016Publication date: December 1, 2016Inventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Patent number: 9443737Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: GrantFiled: April 3, 2013Date of Patent: September 13, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
-
Publication number: 20160118363Abstract: Provided is a bonding stage including: a rigid block (10) having a plurality of projections (11) on a surface (16) of the base body, upper surfaces of the projections being flat; a flat plate (20) fixed to supporting surfaces (18) on the projections (11); a ceramic plate (30) suctioned and fixed to the flat plate (20); a plate-shaped heater (40) disposed on a side of the rigid block (10) of the flat plate (20); and coil springs (50) disposed between the heater (40) and the rigid block (10), the coil springs (50) bringing the heater (40) into close contact with a surface of the flat plate (20) on the side of the rigid block (10).Type: ApplicationFiled: January 7, 2016Publication date: April 28, 2016Applicant: Shinkawa Ltd.Inventor: Shoji Wada