Patents by Inventor Shoriki Narita

Shoriki Narita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070227941
    Abstract: In a receiver for component feed plates for housing, in multi-stage stacks, a plurality of component feed plates with a plurality of components placed thereon, identification mark portions are formed so as to be placed at end portions or their proximities of support guide portions in a plate feed direction so that each of paired sets of support guide portions out of individual support guide portions can be distinguished from the other paired sets of support guide portions and moreover visually discerned in the plate feed direction.
    Type: Application
    Filed: April 20, 2005
    Publication date: October 4, 2007
    Inventors: Shoriki Narita, Kenichi Ishida, Shuichi Hirata, Satoshi Shida
  • Publication number: 20060270539
    Abstract: Step portions with an L-shaped section each having a vertical restriction surface and a horizontal engagement surface are provided on both sides of a main body portion of a tool. On one side of a holding portion placing and holding a mounted tool to be exchanged, a first engagement member has a first engagement projection piece that opposes the engagement surface of one of the step portions, and has an end surface in abutment against the restriction surface. On the other side of the holding portion, a second engagement member has a second engagement projection piece having its intermediate part opposed to the engagement surface of the other of the step portions, and end surfaces on both sides are in abutment against the outer periphery of the main both portion on both sides thereof. The first and second engagement members are movable between an engagement position and a withdrawal position with respect to the step portions.
    Type: Application
    Filed: December 4, 2003
    Publication date: November 30, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kanji Hata, Shoriki Narita
  • Publication number: 20060185157
    Abstract: In component mounting process for a plurality of components to be mounted onto a board, a plurality of bump electrode portions formed on mounting-side surfaces of the components to be mounted onto the board are brought into contact with a bonding-assistant agent so that the bonding-assistant agent is supplied thereto to allow the bonding-assistant agent-supplied components to be mounted onto the board, the component mounting process includes, supplying the bonding-assistant agent to a first component among the plurality of components, and starting the supply of the bonding-assistant agent to a second component among the plurality of components before completion of the mounting of the bonding-assistant agent-supplied first component onto the board.
    Type: Application
    Filed: March 18, 2004
    Publication date: August 24, 2006
    Inventors: Satoshi Shida, Shinji Kanayama, Shunji Onobori, Shuichi Hirata, Mamoru Nakao, Kunio Oe, Akira Kugihara, Shoriki Narita, Yoshitaka Etoh, Hiroshi Haji
  • Patent number: 7052984
    Abstract: A bump formation method and a bump forming apparatus for a semiconductor wafer are provided in which productivity when bumps are formed onto the semiconductor wafer is improved as compared with the conventional art. There are provided a bump forming head, a recognition device, and a control device. ICs formed on the semiconductor wafer are divided into basic blocks. Bump formation is performed continuously for the ICs included in one basic block. Positional recognition for the other basic blocks is performed only when the bump formation operation is shifted from one basic block to another basic block. Thus, in comparison with the conventional art whereby a positional recognition operation is performed every time bumps are formed on each IC, the number of times of performing positional recognition is greatly reduced, so that productivity can be improved.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: May 30, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Masahiko Ikeya, Yasutaka Tsuboi, Takaharu Mae, Shinji Kanayama
  • Publication number: 20060102701
    Abstract: A bump formation method and a bump forming apparatus for a semiconductor wafer are provided in which productivity when bumps are formed onto the semiconductor wafer is improved as compared with the conventional art. There are provided a bump forming head, a recognition device, and a control device. ICs formed on the semiconductor wafer are divided into basic blocks. Bump formation is performed continuously for the ICs included in one basic block. Positional recognition for the other basic blocks is performed only when the bump formation operation is shifted from one basic block to another basic block. Thus, in comparison with the conventional art whereby a positional recognition operation is performed every time bumps are formed on each IC, the number of times of performing positional recognition is greatly reduced, so that productivity can be improved.
    Type: Application
    Filed: December 27, 2005
    Publication date: May 18, 2006
    Inventors: Shoriki Narita, Masahiko Ikeya, Yasutaka Tsuboi, Takaharu Mae, Shinji Kanayama
  • Publication number: 20060104754
    Abstract: In component feeding head appratus, a head unit having a holding for releasably holding a component and a rotating unit for rotating the holding unit around its center of axis is as an object of an up-and-down operation and an inverting operation, and a head lifting device for moving the head unit up and down and a head inverting device for inverting the head unit are provided as constructions independent from the head unit that is the object.
    Type: Application
    Filed: December 1, 2003
    Publication date: May 18, 2006
    Inventors: Shoriki Narita, Shuichi Hirata, Kanji Hata, Hirokuni Miyazaki, Youhei Matsumoto
  • Patent number: 7031509
    Abstract: There are provided a recognition device, a wafer turning member, a turning device, and a control device. A first detection point for recognition and a second detection point for recognition are recognized, on the basis of the result of which a semiconductor wafer is turned to correct the inclination of ICs on the semiconductor wafer. As a result, the recognition operation for detecting the inclination of the ICs when a position of the ICs is to be recognized for bump formation is eliminated. The number of times the recognition is performed is reduced in comparison with the conventional art, so that the productivity can be improved.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: April 18, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Masahiko Ikeya, Yasutaka Tsuboi, Takaharu Mae, Shinji Kanayama
  • Patent number: 7014092
    Abstract: The present invention provides a bump forming apparatus which can prevent charge appearance semiconductor substrates from pyroelectric breakdown and physical failures, a method carried out by the bump forming apparatus for removing charge of charge appearance semiconductor substrates, a charge removing unit for charge appearance semiconductor substrates, and a charge appearance semiconductor substrate. At least when the wafer is cooled after the bump bonding is connected on the wafer, electric charge accumulated on the wafer because of the cooling is removed through direct contact with a post-forming bumps heating device, or the charge is removed by a decrease in temperature control so that charge can be removed in a noncontact state. Therefore, an amount of charge of the wafer can be reduced in comparison with the conventional art, so that the wafer is prevented from pyroelectric breakdown and damage such as a break or the like to the wafer itself.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: March 21, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Yasutaka Tsuboi, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama
  • Publication number: 20060054656
    Abstract: According to the type of the plate placed in a plate placing device of a component feeder, appropriate holding operation and expanding operation are performed selectively and automatically according to the type of the plate by regulating the lowered position of a plate pressurizing member for the tray feeding plate to securely hold the plate and performing wafer expanding while securely holding the wafer feeding plate by releasing the regulation of the lowered position for the wafer feeding plate.
    Type: Application
    Filed: November 28, 2003
    Publication date: March 16, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Kanji Hata, Shuichi Hirata, Satoshi Shida, Mamoru Nakao
  • Patent number: 7005368
    Abstract: The present invention provides a bump forming apparatus (101, 501) which can prevent charge appearance semiconductor substrates (201, 202) from pyroelectric breakdown and physical failures, a method carried out by the bump forming apparatus for removing charge of charge appearance semiconductor substrates, a charge removing unit for charge appearance semiconductor substrates, and a charge appearance semiconductor substrate. At least when the wafer is cooled after the bump bonding is connected on the wafer, electric charge accumulated on the wafer (202) because of the cooling is removed through direct contact with a post-forming bumps heating device (170), or the charge is removed by a decrease in temperature control so that charge can be removed in a noncontact state. Therefore, an amount of charge of the wafer can be reduced in comparison with the conventional art, so that the wafer is prevented from pyroelectric breakdown and damage such as a break or the like to the wafer itself.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: February 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Yasutaka Tsuboi, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama
  • Publication number: 20050191838
    Abstract: A preheat device (160) is provided to execute, before forming bumps (16) to electrode parts (15), a pre-formation temperature control for bonding promotion to promote bonding between the electrode parts and the bumps during bump formation. Metal particles of the electrode parts can be changed to an appropriate state before the bump formation. Phenomenally, a bonding state between the electrode parts and the bumps can be improved as compared with the conventional art. In a further arrangement of the present invention, semiconductor components with bumps can be heated under a bonding strength improvement condition by a bonding stage (316) through controlling the heating by a controller (317).
    Type: Application
    Filed: April 26, 2005
    Publication date: September 1, 2005
    Inventors: Shoriki Narita, Koichi Yoshida, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama, Makoto Imanishi, Kazushi Higashi, Kenji Fukumoto, Hiroshi Wada
  • Patent number: 6910613
    Abstract: A preheat device (160) is provided to execute, before forming bumps (16) to electrode parts (15), a pre-formation temperature control for bonding promotion to promote bonding between the electrode parts and the bumps during bump formation. Metal particles of the electrode parts can be changed to an appropriate state before the bump formation. Phenomenally, a bonding state between the electrode parts and the bumps can be improved as compared with the conventional art. In a further arrangement of the present invention, semiconductor components with bumps can be heated under a bonding strength improvement condition by a bonding stage (316) through controlling the heating by a controller (317).
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: June 28, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Koichi Yoshida, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama, Makoto Imanishi, Kazushi Higashi, Kenji Fukumoto, Hiroshi Wada
  • Patent number: 6818975
    Abstract: The present invention provides a bump forming apparatus (101, 501) which can prevent charge appearance semiconductor substrates (201, 202) from pyroelectric breakdown and physical failures, a method carried out by the bump forming apparatus for removing charge of charge appearance semiconductor substrates, a charge removing unit for charge appearance semiconductor substrates, and a charge appearance semiconductor substrate. At least when the wafer is cooled after the bump bonding is connected on the wafer, electric charge accumulated on the wafer (202) because of the cooling is removed through direct contact with a post-forming bumps heating device (170), or the charge is removed by a decrease in temperature control so that charge can be removed in a noncontact state. Therefore, an amount of charge of the wafer can be reduced in comparison with the conventional art, so that the wafer is prevented from pyroelectric breakdown and damage such as a break or the like to the wafer itself.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: November 16, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Yasutaka Tsuboi, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama
  • Patent number: 6787391
    Abstract: A bump forming apparatus which carries out a temperature control of a type different from the conventional art in forming bumps to a semiconductor wafer, and a bump formation method executed by the bump forming apparatus are provided. A bonding stage, a load and transfer device and a control device are provided. A wafer, after having bumps formed thereon, is held by the load and transfer device and arranged above the bonding stage through control by the control device, so that a temperature drop of the wafer is controlled. Accordingly, generation of troubles such as a crack because of thermal stress and the like can be prevented to even compound semiconductor wafers sensitive to a temperature change.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Makoto Imanishi, Shoriki Narita, Masahiko Ikeya, Shinji Kanayama, Takaharu Mae
  • Publication number: 20040149803
    Abstract: A bump forming apparatus which carries out a temperature control of a type different from the conventional art in forming bumps to a semiconductor wafer, and a bump formation method executed by the bump forming apparatus are provided. A bonding stage, a load and transfer device and a control device are provided. A wafer, after having bumps formed thereon, is held by the load and transfer device and arranged above the bonding stage through control by the control device, so that a temperature drop of the wafer is controlled. Accordingly, generation of troubles such as a crack because of thermal stress and the like can be prevented to even compound semiconductor wafers sensitive to a temperature change.
    Type: Application
    Filed: January 22, 2004
    Publication date: August 5, 2004
    Inventors: Makoto Imanishi, Shoriki Narita, Masahiko Ikeya, Shinji Kanayama, Takaharu Mae
  • Publication number: 20040102030
    Abstract: A preheat device is installed, thereby executing before forming bumps to electrode parts a pre formation temperature control for bonding promotion to promote bonding between the electrode parts and the bumps during a bump formation. Metal particles of the electrode parts can be changed to an appropriate state before the bump formation. Phenomenally, a bonding state between the electrode parts and the bumps can be improved as compared with the conventional art. In a further arrangement of the present invention, semiconductor components with bumps formed can be heated under a bonding strength improvement condition by a bonding stage through controlling the heating by a controller.
    Type: Application
    Filed: January 2, 2003
    Publication date: May 27, 2004
    Inventors: Shoriki Narita, Koichi Yoshida, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama, Makoto Imanishi, Kazushi Higashi, Kenji Fukumoto, Hiroshi Wada
  • Publication number: 20040035849
    Abstract: The present invention provides a bump forming apparatus (101, 501) which can prevent charge appearance semiconductor substrates (201, 202) from pyroelectric breakdown and physical failures, a method carried out by the bump forming apparatus for removing charge of charge appearance semiconductor substrates, a charge removing unit for charge appearance semiconductor substrates, and a charge appearance semiconductor substrate. At least when the wafer is cooled after the bump bonding to the wafer, electric charge accumulated to the wafer (202) because of the cooling is removed through direct contact with a post-forming bumps heating device (170), or the charge is removed by a decrease in temperature control that charge can be removed in a noncontact state. Therefore an amount of charge of the wafer can be reduced in comparison with the conventional art, so that the wafer is prevented from pyroelectric breakdown and damage such as a break or the like to the wafer itself.
    Type: Application
    Filed: August 29, 2003
    Publication date: February 26, 2004
    Inventors: Shoriki Narita, Yasutaka Tsuboi, Masahiko Ikeya, Takaharu Mae, Shinji Kanayama
  • Publication number: 20040020973
    Abstract: A bump formation method and a bump forming apparatus for forming bumps on a semiconductor wafer. The apparatus includes a bump forming head, a recognition device, and a control device. ICs formed on the semiconductor wafer are divided into basic blocks. Bump formation is carried out continuously to the ICs included in one basic block. Position recognition to the other basic block is carried out only when the bump formation operation is shifted from one basic block to the other basic block. Thus, in comparison with the conventional art, in which the position recognition operation is carried out every time bumps are formed to each IC, the number of times of the recognition is greatly reduced, so that the productivity can be improved.
    Type: Application
    Filed: April 30, 2003
    Publication date: February 5, 2004
    Inventors: Shoriki Narita, Masahiko Ikeya, Yasutaka Tsuboi, Takaharu Mae, Shinji Kanagawa
  • Patent number: 6568580
    Abstract: Wafers are previously positioned so that the wafer orientation flat is oriented in a particular direction. A transporting means then moves and places the previously positioned wafer on a bonding stage where bumps are formed on the wafer by means of a bonding head. The transporting means has a sensor for detecting the position of the orientation flat of a wafer on the bonding stage from a position above the bonding stage, thereby avoiding the adverse effects of heat from the bonding stage during orientation flat detection.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: May 27, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Makoto Imanishi, Takaharu Mae, Shinji Kanayama, Nobuhisa Watanabe
  • Patent number: 6494358
    Abstract: Wafers are previously positioned so that the wafer orientation flat is oriented in a particular direction. A transporting means then moves and places the previously positioned wafer on a bonding stage where bumps are formed on the wafer by means of a bonding head. The transporting means has a sensor for detecting the position of the orientation flat of a wafer on the bonding stage from a position above the bonding stage, thereby avoiding the adverse effects of heat from the bonding stage during orientation flat detection.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: December 17, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoriki Narita, Makoto Imanishi, Takaharu Mae, Shinji Kanayama, Nobuhisa Watanabe