Abstract: According to one embodiment, a measuring device for a sample liquid includes a container which stores the sample liquid, the container including a transparent or translucent optical component with an inclined surface to be brought into contact with the sample liquid, an optical sensor provided on a bottom of the container, which detects light from the sample liquid, and a measurement module which measures a concentration of a specific substance contained in the sample liquid, or a liquid height or liquid volume of the sample liquid based on a detected signal of the optical sensor.

Abstract: An arithmetic apparatus used for a neural network includes a plurality of digital-time conversion circuits connected in series and a time-digital conversion circuit connected to a last digital-time conversion circuit in the series. Each of the digital-time conversion circuits is configured to delay a first input time signal by a variable amount, delay a second input time signal by a fixed amount, and output the delayed first and second input time signals respectively as either first and second output time signals or second and first output time signals, in accordance with the input data. The time-digital conversion circuit is configured to generate a digital output signal by comparing first and second output time signals from the last digital-time conversion circuit.

Abstract: According to one embodiment, a biosensor includes a substrate and a sensor matrix that is present in a two-dimensional region on the substrate. The sensor matrix includes a plurality of basic blocks. Each of the basic blocks includes at least three types of sensor elements.

Abstract: According to one embodiment, an optical sensor includes a plurality of sensing parts two-dimensionally arranged in a matrix to form a sensor surface, and a phototransmissive sample-supporting plate arranged to be opposed to the sensing parts.

Abstract: According to one embodiment, the illumination device includes a lighting unit and a control unit. The lighting unit emits light at the intensity to be emitted toward the region to be irradiated in a two-dimensional region of a measurement device. The measurement device acquires optical information and biochemical information and/or electrical information for an object corresponding with positional information. The control unit determines the region to be irradiated and the intensity to be emitted, based on the biochemical or electrical information by the measurement device, the positional information of them, and the threshold conditions predetermined, and controls the irradiation of the lighting unit depending on them.

Abstract: The delay apparatus according to an embodiment includes a logic circuit that is connected between a first potential line and a first node and is driven by a driving current supplied from the first potential line. The delay apparatus includes a driving current adjusting circuit that is connected in a current path through which the driving current flows between the first node and a second potential line and adjusts the driving current of the logic circuit. The delay apparatus includes a supplying circuit that supplies a voltage or current to the first node. The delay apparatus includes a measuring circuit that measures the voltage or current at the first node. The delay apparatus includes a controlling circuit that controls the voltage or current output from the supplying circuit based on the measured voltage or measured current at the first node measured by the measuring circuit.

Abstract: The delay apparatus according to an embodiment includes a logic circuit that is connected between a first potential line and a first node and is driven by a driving current supplied from the first potential line. The delay apparatus includes a driving current adjusting circuit that is connected in a current path through which the driving current flows between the first node and a second potential line and adjusts the driving current of the logic circuit. The delay apparatus includes a supplying circuit that supplies a voltage or current to the first node. The delay apparatus includes a measuring circuit that measures the voltage or current at the first node. The delay apparatus includes a controlling circuit that controls the voltage or current output from the supplying circuit based on the measured voltage or measured current at the first node measured by the measuring circuit.

Abstract: The CDR circuit 100 includes first to second data delaying cells ID1, ID2. The CDR circuit 100 includes first to fourth oscillation delaying cells IC1, IC2, IC3, IC4. The CDR circuit 100 outputs a second data signal d2 at a data output terminal TDout as a recovery data signal Dout. The CDR circuit 100 outputs an oscillation clock signal a0 at a clock output terminal TRCK as a recovery clock signal RCK.

Abstract: According to one embodiment, an amplification device includes an input terminal into which an input signal is inputted, a first amplifier, an output terminal, a variable impedance module connected at an output end of the first amplifier, a second amplifier, a reference impedance element connected at an output end of the second amplifier, a magnitude comparator, a phase comparator, and a controller. The controller is configured to control impedance of the variable impedance module so that impedance at a point between the first amplifier and the variable impedance approaches a first value.

Abstract: A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.

Abstract: The CDR circuit 100 includes first to second data delaying cells ID1, ID2. The CDR circuit 100 includes first to fourth oscillation delaying cells IC1, IC2, IC3, IC4. The CDR circuit 100 outputs a second data signal d2 at a data output terminal TDout as a recovery data signal Dout. The CDR circuit 100 outputs an oscillation clock signal a0 at a clock output terminal TRCK as a recovery clock signal RCK.

Abstract: According to one embodiment, a first oscillator has an oscillation frequency that is changed depending on a temperature. A second oscillator has different temperature characteristics from the first oscillator. An on-chip heater heats the first oscillator and the second oscillator. A counter counts a first oscillation signal of the first oscillator. An ADPLL generates a third oscillation signal on the basis of a second oscillation signal of the second oscillator and corrects the frequency of the third oscillation signal on the basis of a count value of the counter.

Abstract: In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n?1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.

Abstract: According to one embodiment, an amplification device includes an input terminal into which an input signal is inputted, a first amplifier, an output terminal, a variable impedance module connected at an output end of the first amplifier, a second amplifier, a reference impedance element connected at an output end of the second amplifier, a magnitude comparator, a phase comparator, and a controller. The controller is configured to control impedance of the variable impedance module so that impedance at a point between the first amplifier and the variable impedance approaches a first value.

Abstract: According to one embodiment, a reference signal generating circuit includes a first nonlinear element that generates a first reference voltage, a second nonlinear element that generates a second reference voltage, a current controlling circuit that controls a current flowing to the first nonlinear element and a current flowing to the second nonlinear element based on an output voltage of the current controlling circuit itself, and N temperature characteristic adjusting elements (N is an integer of 2 or larger) that individually adjust the temperature characteristics of the output voltage of the current controlling circuit.

Abstract: A power amplifier device includes an input terminal for a RF input signal. The power amplifier device includes an output terminal a RF output signal. The power amplifier device includes a first power amplifier connected to the input terminal, amplifies the RF input signal with a first gain, and outputs a first amplified signal. The power amplifier device includes a second power amplifier that amplifies a signal on the basis of the first amplified signal and outputs a second amplified signal with a second gain. The power amplifier device includes a low-pass filter or a band-pass filter that filters the second amplified signal. The power amplifier device includes an amplitude comparator to compare the first amplitude of the first comparison signal generated from the RF input signal with the second amplitude of the second comparison signal generated from the filtered signal and to output an amplitude comparison signal.

Abstract: According to an embodiment, a mixer circuit includes first transistors each having a charge storage layer, a second transistor, a group of first nodes, and an output node. The first transistors as a pair receive a differential signal having a first frequency. The second transistor receives a signal having a second frequency. The group of first nodes makes the charge storage layer of at least any one of the first transistors store charge during non-operation period during which the differential signal having the first frequency and the signal having the second frequency are not mixed and reduces loss of the charge during operation period during which those signals are mixed, to adjust a threshold voltage of at least any one of the first transistors from outside. The output node outputs a signal resulting from mixing the differential signal having the first frequency and the signal having the second frequency.

Abstract: According to one embodiment, a first oscillator has an oscillation frequency that is changed depending on a temperature. A second oscillator has different temperature characteristics from the first oscillator. An on-chip heater heats the first oscillator and the second oscillator. A counter counts a first oscillation signal of the first oscillator. An ADPLL generates a third oscillation signal on the basis of a second oscillation signal of the second oscillator and corrects the frequency of the third oscillation signal on the basis of a count value of the counter.

Abstract: A frequency/timing measurement apparatus includes a reference source having a reference source output terminal. At least one target source has a target source output terminal. The at least one target source is communicatively coupled to the reference source. A frequency timing measurement block has a first input terminal electrically coupled to the reference source output terminal. A second input terminal is electrically coupled to the target source output terminal and at least one output terminal. The frequency timing measurement block is configured to perform a noise shaping technique to reduce measurement error attributable to a phase noise that is correlated between the reference source and the target source, and to provide a reduced correlated noise measurement at the at least one output terminal. A method to reduce correlated noise is also described.

Abstract: In general, according to one embodiment, a power amplifier includes an envelope detector, a limiter, and a combiner. The envelope detector is configured to sense an envelope component of an input signal. The limiter includes a PMOS (Positive channel Metal Oxide Semiconductor) transistor and an NMOS (Negative channel Metal Oxide Semiconductor) transistor. The PMOS transistor is configured to sense a phase component of the input signal. The phase component has a second-order distortion controlled within a predetermined range with respect to the input signal. The NMOS transistor is configured to sense a phase component of the input signal. The phase component has the same second-order distortion as the phase component sensed by the PMOS transistor. The combiner is configured to combine the envelope component sensed by the envelope detector and the phase component sensed by the limiter to generate an output signal.