Patents by Inventor Shouhei Kousai

Shouhei Kousai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8565705
    Abstract: According to one embodiment, an oscillator circuit includes a first comparator circuit, a second comparator circuit, a first voltage control circuit, a second voltage control circuit, a clock generation circuit. The first comparator circuit is configured to compare a first voltage with a first threshold voltage to generate a first comparison result. The second comparator circuit is configured to compare a second voltage with a second threshold voltage to generate a second comparison result. The first voltage control circuit is configured to decrease the first voltage by a first voltage value in synchronization with timing when the first comparison result changes. The second voltage control circuit is configured to decrease the second voltage by a second voltage value in synchronization with timing when the second comparison result changes.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: October 22, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shouhei Kousai
  • Publication number: 20130256660
    Abstract: A semiconductor device according to an embodiment has: a semiconductor substrate; an acoustic resonator formed on the semiconductor substrate, having a semiconductor layer including impurity electrically isolated from the substrate by depletion layer and configured to resonate at a predetermined resonance frequency based on acoustic standing wave excited in the semiconductor layer; a temperature detector formed on the semiconductor substrate and configured to detect temperature of the semiconductor substrate; a calculating unit formed on the semiconductor substrate and configured to perform calculation of temperature compensation based on the temperature detected by the temperature detector, kind of the impurity and concentration of the impurity; and a controller formed on the semiconductor substrate and configured to control the resonance frequency based on a result of the calculation by the calculating unit.
    Type: Application
    Filed: November 27, 2012
    Publication date: October 3, 2013
    Inventors: Kazuhide ABE, Atsuko IIDA, Kazuhiko ITAYA, Junji WADATSUMI, Shouhei KOUSAI
  • Publication number: 20130252559
    Abstract: In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n>1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n?1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.
    Type: Application
    Filed: August 30, 2012
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Jun DEGUCHI, Shouhei Kousai, Yousuke Hagiwara, Masamichi Suzuki, Atsuhiro Kinoshita, Takao Marukame
  • Patent number: 8525496
    Abstract: A DC-DC converter including a first inductor connected between a second end of a first MOS transistor and an output terminal, a second inductor connected between a second end of a third MOS transistor and the output terminal, a first capacitor connected between the second MOS transistor and the third MOS transistor, a second capacitor connected between the fourth MOS transistor and the first MOS transistor and a third capacitor connected between the first MOS transistor and the third MOS transistor. Also included in the converter is a first resistor connected to a gate of the second MOS transistor, a second resistor connected to a gate of the fourth MOS transistor, and a first bias adjustment circuit which compares the output voltage with a preset first reference voltage and applies a first bias voltage to the resistors to make the output voltage equal to the first reference voltage.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shouhei Kousai
  • Publication number: 20130214867
    Abstract: A power amplifier device includes an input terminal for a RF input signal. The power amplifier device includes an output terminal a RF output signal. The power amplifier device includes a first power amplifier connected to the input terminal, amplifies the RF input signal with a first gain, and outputs a first amplified signal. The power amplifier device includes a second power amplifier that amplifies a signal on the basis of the first amplified signal and outputs a second amplified signal with a second gain. The power amplifier device includes a low-pass filter or a band-pass filter that filters the second amplified signal. The power amplifier device includes an amplitude comparator to compare the first amplitude of the first comparison signal generated from the RF input signal with the second amplitude of the second comparison signal generated from the filtered signal and to output an amplitude comparison signal.
    Type: Application
    Filed: September 5, 2012
    Publication date: August 22, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shouhei KOUSAI
  • Publication number: 20130057246
    Abstract: According to one embodiment, a reference signal generating circuit includes a first nonlinear element that generates a first reference voltage, a second nonlinear element that generates a second reference voltage, a current controlling circuit that controls a current flowing to the first nonlinear element and a current flowing to the second nonlinear element based on an output voltage of the current controlling circuit itself, and N temperature characteristic adjusting elements (N is an integer of 2 or larger) that individually adjust the temperature characteristics of the output voltage of the current controlling circuit.
    Type: Application
    Filed: March 19, 2012
    Publication date: March 7, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuji Satoh, Shouhei Kousai, Hiroyuki Kobayashi
  • Patent number: 8378732
    Abstract: Power mixer arrays for providing watt-level power in mobile systems. In one embodiment, a fully-integrated octave-range CMOS power mixer that occupies only 2.6 mm2 using a 130 nm semiconductor process has been demonstrated. The power mixer provides an output power of +31.5 dBm into an external 50 ? load with a power added efficiency (PAE) of 44% at 1.8 GHz and a full power gain compression of only 0.4 dB.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: February 19, 2013
    Assignee: California Institute of Technology
    Inventors: Shouhei Kousai, Seyed Ali Hajimiri
  • Patent number: 8340620
    Abstract: A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: December 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shouhei Kousai, Daisuke Miyashita, Jun Deguchi
  • Patent number: 8233874
    Abstract: A wireless communication apparatus includes a local oscillator that generates a plurality of LO (Local Oschillation) signals corresponding to frequencies of a plurality of input RF (Radio Frequency) signals, an accumulator that accumulates the plurality of LO signals generated by the local oscillator to generate an accumulated signal, a mixer that mixes the plurality of RF signals and the accumulated signal generated by the accumulator and to generate a plurality of base band signals, and a first signal processing unit that executes a signal process with respect to the plurality of base band signals generated by the mixer.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: July 31, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Deguchi, Shouhei Kousai, Daisuke Miyashita
  • Publication number: 20120142287
    Abstract: According to one embodiment, an oscillator circuit includes a first comparator circuit, a second comparator circuit, a first voltage control circuit, a second voltage control circuit, a clock generation circuit. The first comparator circuit is configured to compare a first voltage with a first threshold voltage to generate a first comparison result. The second comparator circuit is configured to compare a second voltage with a second threshold voltage to generate a second comparison result. The first voltage control circuit is configured to decrease the first voltage by a first voltage value in synchronization with timing when the first comparison result changes. The second voltage control circuit is configured to decrease the second voltage by a second voltage value in synchronization with timing when the second comparison result changes.
    Type: Application
    Filed: September 13, 2011
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shouhei Kousai
  • Publication number: 20120142292
    Abstract: A wireless communication apparatus includes a local oscillator that generates a plurality of LO (Local Oschillation) signals corresponding to frequencies of a plurality of input RF (Radio Frequency) signals, an accumulator that accumulates the plurality of LO signals generated by the local oscillator to generate an accumulated signal, a mixer that mixes the plurality of RF signals and the accumulated signal generated by the accumulator and to generate a plurality of base band signals, and a first signal processing unit that executes a signal process with respect to the plurality of base band signals generated by the mixer.
    Type: Application
    Filed: February 9, 2012
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jun DEGUCHI, Shouhei Kousai, Daisuke Miyashita
  • Publication number: 20120135700
    Abstract: A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element.
    Type: Application
    Filed: February 9, 2012
    Publication date: May 31, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shouhei KOUSAI, Daisuke MIYASHITA, Jun DEGUCHI
  • Patent number: 8135374
    Abstract: A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: March 13, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shouhei Kousai, Daisuke Miyashita, Jun Deguchi
  • Patent number: 8135373
    Abstract: A wireless communication apparatus includes a local oscillator that generates a plurality of LO (Local Oschillation) signals corresponding to frequencies of a plurality of input RF (Radio Frequency) signals, an accumulator that accumulates the plurality of LO signals generated by the local oscillator to generate an accumulated signal, a mixer that mixes the plurality of RF signals and the accumulated signal generated by the accumulator and to generate a plurality of base band signals, and a first signal processing unit that executes a signal process with respect to the plurality of base band signals generated by the mixer.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: March 13, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jun Deguchi, Shouhei Kousai, Daisuke Miyashita
  • Publication number: 20120056606
    Abstract: A DC-DC converter includes: a first inductor connected between the second end of the first MOS transistor and the output terminal; a second inductor connected between the second end of the third MOS transistor and the output terminal; a first capacitor connected between a gate of the second MOS transistor and the second end of the third MOS transistor; a second capacitor connected between a gate of the fourth MOS transistor and the second end of the first MOS transistor; and a third capacitor connected at a first end thereof to the second end of the first MOS transistor and connected at a second end to the second end of the third MOS transistor.
    Type: Application
    Filed: February 23, 2011
    Publication date: March 8, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shouhei KOUSAI
  • Patent number: 8112112
    Abstract: A radio apparatus includes a receiver which receives a wirelessly transmitted signal as a reception signal, a transmitter which is provided in the vicinity of the receiver and generates a transmission signal having a frequency different from that of the reception signal, and a reception signal extracting unit which extracts a reception signal from an input signal containing the reception signal and the transmission signal, at a timing of a zero crossing of the transmission signal in the input signal, by using phase information including the phase of the transmission signal from the transmitter.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: February 7, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shouhei Kousai
  • Publication number: 20110235689
    Abstract: In general, according to one embodiment, a power amplifier includes an envelope detector, a limiter, and a combiner. The envelope detector is configured to sense an envelope component of an input signal. The limiter includes a PMOS (Positive channel Metal Oxide Semiconductor) transistor and an NMOS (Negative channel Metal Oxide Semiconductor) transistor. The PMOS transistor is configured to sense a phase component of the input signal. The phase component has a second-order distortion controlled within a predetermined range with respect to the input signal. The NMOS transistor is configured to sense a phase component of the input signal. The phase component has the same second-order distortion as the phase component sensed by the PMOS transistor. The combiner is configured to combine the envelope component sensed by the envelope detector and the phase component sensed by the limiter to generate an output signal.
    Type: Application
    Filed: September 21, 2010
    Publication date: September 29, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shouhei Kousai
  • Publication number: 20100245100
    Abstract: A frequency/timing measurement apparatus includes a reference source having a reference source output terminal. At least one target source has a target source output terminal. The at least one target source is communicatively coupled to the reference source. A frequency timing measurement block has a first input terminal electrically coupled to the reference source output terminal. A second input terminal is electrically coupled to the target source output terminal and at least one output terminal. The frequency timing measurement block is configured to perform a noise shaping technique to reduce measurement error attributable to a phase noise that is correlated between the reference source and the target source, and to provide a reduced correlated noise measurement at the at least one output terminal. A method to reduce correlated noise is also described.
    Type: Application
    Filed: February 22, 2010
    Publication date: September 30, 2010
    Applicant: California Institute of Technology
    Inventors: Hua Wang, Seyed Ali Hajimiri, Shouhei Kousai
  • Patent number: 7705663
    Abstract: A semiconductor integrated circuit, has a current source having one end connected to a power supply and outputting a reference current; a first MOS transistor having one end connected to an other end of the current source and being diode-connected; a second MOS transistor having a gate connected to a gate of the first MOS transistor and passing an output current obtained by current-mirroring the reference current; a first variable resistor connected between an other end of the first MOS transistor and a ground; a resistive component connected between an other end of the second MOS transistor and the ground; and a first operational amplifier fed with a first potential of the other end of the first MOS transistor and a second potential of the other end of the second MOS transistor and outputting a signal for controlling a resistance value of the first variable resistor to equalize the first potential and the second potential, wherein the resistance value of the first variable resistor is controlled based on the
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: April 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Wadatsumi, Shouhei Kousai
  • Patent number: 7705667
    Abstract: A filter adjusting circuit, has: a filter circuit which has a circuit configuration operating as an n-th order filter including n (n?1) integrators and can switch a connection of the circuit configuration to operate as a circuit equivalent to the n integrators; a signal generating circuit that outputs a first signal having a predetermined reference frequency to the filter circuit, and outputs a second signal having the reference frequency; a phase comparator that compares a phase of a third signal and a phase of the second signal and determines a phase shift between the signals, the third signal being obtained by processing the first signal in the filter circuit and outputted from the filter circuit; and a control circuit controls the filter circuit.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: April 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shouhei Kousai