Patents by Inventor Shozo Nakamura

Shozo Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5821606
    Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: October 13, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Gen Murakami, Kunihiro Tsubosaki, Masahiro Ichitani, Kunihiko Nishi, Ichiro Anjo, Asao Nishimura, Makoto Kitano, Akihiro Yaguchi, Sueo Kawai, Masatsugu Ogata, Syuuji Eguchi, Hiroyoshi Kokaku, Masanori Segawa, Hiroshi Hozoji, Takashi Yokoyama, Noriyuki Kinjo, Aizo Kaneda, Junichi Saeki, Shozo Nakamura, Akio Hasebe, Hiroshi Kikuchi, Isamu Yoshida, Takashi Yamazaki, Kazuyoshi Oshima, Tetsurou Matsumoto
  • Patent number: 5793099
    Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
    Type: Grant
    Filed: May 7, 1996
    Date of Patent: August 11, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Gen Murakami, Kunihiro Tsubosaki, Masahiro Ichitani, Kunihiko Nishi, Ichiro Anjoh, Asao Nishimura, Makoto Kitano, Akihiro Yaguchi, Sueo Kawai, Masatsugu Ogata, Syuuji Eguchi, Hiroyoshi Kokaku, Masanori Segawa, Hiroshi Hozoji, Takashi Yokoyama, Noriyuki Kinjo, Aizo Kaneda, Junichi Saeki, Shozo Nakamura, Akio Hasebe, Hiroshi Kikuchi, Isamu Yoshida, Takashi Yamazaki, Kazuyoshi Oshima, Tetsurou Matsumoto
  • Patent number: 5742101
    Abstract: A semiconductor device is provided in connection with a semiconductor chip which has a plurality of bonding pads at a part corresponding to a centrally located area of the front or first main surface thereof, an organic insulator film which overlies the semiconductor chip and which has an opening in correspondence with the bonding pads, a plurality of leads which overly the organic insulator film, and a molding resin with which these constituents are sealed or packaged.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: April 21, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Sakuta, Kazuyuki Miyazawa, Satoshi Oguchi, Aizo Kaneda, Masao Mitani, Shozo Nakamura, Kunihiko Nishi, Gen Murakami
  • Patent number: 5676713
    Abstract: In fuel gasification, particles of, for example, coal and an oxidant are supplied to a reactor, where the coal particles are gasified. The gas thus produced may contain molten slag entrained therein and such slag could subsequently solidify and affect other components of the coal gasification apparatus. Therefore a molten slag cooling heat exchanger is positioned directly above the reactor and this cools the gas so as to cause any molten slag therein to solidify. Hence, such molten slag does not reach an evaporator above the molten slag cooling heat exchanger, so that the efficiency of the evaporator will be maintained. However, solidified molten slag may build up on heat exchange tubes of the molten slag cooling heat exchanger. Therefore, the rate of coolant supplied to the molten slag cooling heat exchanger is varied, to cause expansion and contraction which causes solidified slag to be dislodged. Hence the efficiency of the molten slag cooling heat exchanger does not deteriorate.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: October 14, 1997
    Assignees: Hitachi, Ltd., Babcock-Hitachi Kabushiki Kaisha
    Inventors: Shozo Nakamura, Yasuaki Akatsu, Zensuke Tamura, Toru Kobashi, Toshihiko Sasaki
  • Patent number: 5640435
    Abstract: The lower end of each of a plurality of fuel rods is supported by a fuel supporting portion of a lower tie plate. The fuel supporting portion includes a plurality of second coolant paths for supplying a coolant from below the fuel supporting portion to a first coolant path defined above the fuel supporting portion and between the fuel rods. The total cross-sectional area of all the second coolant paths is smaller than the cross-sectional area of the first coolant path.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: June 17, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Kurosaki, Junjiro Nakajima, Hajime Umehara, Shozo Nakamura, Satoshi Kanno, Koji Nishida, Yasunori Bessho, Masahisa Inagaki, Osamu Yokomizo, Yuichiro Yoshimoto
  • Patent number: 5617456
    Abstract: The lower end of each of a plurality of fuel rods is supported by a fuel supporting portion of a lower tie plate. The fuel supporting portion includes a plurality of second coolant paths for supplying a coolant from below the fuel supporting portion to a first coolant path defined above the fuel supporting portion and between the fuel rods. The total cross-sectional area of all the second coolant paths is smaller than the cross-sectional area of the first coolant path.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: April 1, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideki Kurosaki, Junjiro Nakajima, Hajime Umehara, Shozo Nakamura, Satoshi Kanno, Koji Nishida, Yasunori Bessho, Masahisa Inagaki, Osamu Yokomizo, Yuichiro Yoshimoto
  • Patent number: 5612569
    Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: March 18, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Gen Murakami, Kunihiro Tsubosaki, Masahiro Ichitani, Kunihiko Nishi, Ichiro Anjoh, Asao Nishimura, Makoto Kitano, Akihiro Yaguchi, Sueo Kawai, Masatsugu Ogata, Syuuji Eguchi, Hiroyoshi Kokaku, Masanori Segawa, Hiroshi Hozoji, Takashi Yokoyama, Noriyuki Kinjo, Aizo Kaneda, Junichi Saeki, Shozo Nakamura, Akio Hasebe, Hiroshi Kikuchi, Isamu Yoshida, Takashi Yamazaki, Kazuyoshi Oshima, Tetsurou Matsumoto
  • Patent number: 5530286
    Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
    Type: Grant
    Filed: August 22, 1994
    Date of Patent: June 25, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Gen Murakami, Kunihiro Tsubosaki, Masahiro Ichitani, Kunihiko Nishi, Ichiro Anjoh, Asao Nishimura, Makoto Kitano, Akihiro Yaguchi, Sueo Kawai, Masatsugu Ogata, Syuuji Eguchi, Hiroyoshi Kokaku, Masanori Segawa, Hiroshi Hozoji, Takashi Yokoyama, Noriyuki Kinjo, Aizo Kaneda, Junichi Saeki, Shozo Nakamura, Akio Hasebe, Hiroshi Kikuchi, Isamu Yoshida, Takashi Yamazaki, Kazuyoshi Oshima, Tetsurou Matsumoto
  • Patent number: 5515680
    Abstract: An apparatus for mixing gaseous fuel and air for combustion, particularly premixing-type combustion in a gas turbine, has a conduit providing a passage for flow of the air with a reverse bend defined by opposed first and second wall portions that bound respectively the outside and the inside of said reverse bend as seen in a longitudinal section. The reverse bend establishes a flow region of air having a velocity gradient extending transversely across the conduit from a high velocity zone adjacent the first side wall portion at the outside of the reverse bend to a low velocity zone. Injection means for the gaseous fuel injects the fuel from the first side wall portion into the high velocity zone with a velocity component transverse to the air flow and in a direction towards the low velocity zone. Rapid and uniform mixing is obtained.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: May 14, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hidekazu Fujimura, Kazuhito Koyama, Shozo Nakamura, Yoshikazu Moritomo
  • Patent number: 5514905
    Abstract: A semiconductor device is provided in connection with a semiconductor chip which has a plurality of bonding pads at a part corresponding to a centrally located area of the front or first main surface thereof, an organic insulator film which overlies the semiconductor chip and which has an opening in correspondence with the bonding pads, a plurality of leads which overly the organic insulator film, and a molding resin with which these constituents are sealed or packaged.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: May 7, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Sakuta, Kazuyuki Miyazawa, Satoshi Oguchi, Aizo Kaneda, Masao Mitani, Shozo Nakamura, Kunihiko Nishi, Gen Murakami
  • Patent number: 5471832
    Abstract: A combined cycle power plant has a plurality of gas turbine units each having a gas turbine and a heat recovery boiler for generating steam from heat from exhaust gas from the gas turbine. The gas turbine of a first one of the gas turbine units is a steam-cooled gas turbine. Steam turbines are driven by steam from the heat recovery boilers. For start-up of the first gas turbine unit, cooling steam generated in a heat recovery boiler different from not being the heat recovery boiler of the first gas turbine unit is fed to the steam-cooled gas turbine to effect cooling thereof during at least part of the start-up operation of the first gas turbine unit.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: December 5, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Shigehisa Sugita, Shozo Nakamura, Nobuhiro Seiki, Shinichi Hoizumi, Toshihiko Sasaki, Yoshiki Noguchi
  • Patent number: 5365113
    Abstract: A semiconductor device is provided in connection with a semiconductor chip which has a plurality of bonding pads at a part corresponding to a centrally located area of the front or first main surface thereof, an organic insulator film which overlies the semiconductor chip and which has an opening in correspondence with the bonding pads, a plurality of leads which overly the organic insulator film, and a molding resin with which these constituents are sealed or packaged.
    Type: Grant
    Filed: January 4, 1993
    Date of Patent: November 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Sakuta, Kazuyuki Miyazawa, Satoshi Oguchi, Aizo Kaneda, Masao Mitani, Shozo Nakamura, Kunihiko Nishi, Gen Murakami
  • Patent number: 5358904
    Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: October 25, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Gen Murakami, Kunihiro Tsubosaki, Masahiro Ichitani, Kunihiko Nishi, Ichiro Anjoh, Asao Nishimura, Makoto Kitano, Akihiro Yaguchi, Sueo Kawai, Masatsugu Ogata, Syuuji Eguchi, Hiroyoshi Kokaku, Masanori Segawa, Hiroshi Hozoji, Takashi Yokoyama, Noriyuki Kinjo, Aizo Kaneda, Junichi Saeki, Shozo Nakamura, Akio Hasebe, Hiroshi Kikuchi, Isamu Yoshida, Takashi Yamazaki, Kazuyoshi Oshima, Tetsurou Matsumoto
  • Patent number: 5323614
    Abstract: A premixed combustor for a gas turbine, comprises, a combustion chamber for burning a fuel with an air therein, at least two premixed fuel/air mixture outlets which are juxtaposed with each other, and through each of which a premixed fuel/air mixture flows out into the combustion chamber, and a flow deflection member arranged between the premixed fuel/air mixture outlets, urging the permixed fuel/air mixture from one of the premixed fuel/air mixture outlets to go away from another one of the premixed fuel/air mixture outlets, and terminating in the combustion chamber so that the premixed fuel/air mixture from the one of the premixed fuel/air mixture outlets is permitted to move toward the premixed fuel/air mixture flowing out from the another one of the premixed fuel/air mixture outlets after going away from the another one of the premixed fuel/air mixture outlets.
    Type: Grant
    Filed: January 13, 1993
    Date of Patent: June 28, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Satoshi Tsukahara, Hiroshi Inoue, Noriyuki Hayashi, Kazumi Iwai, Tamio Innami, Yoji Ishibashi, Michio Kuroda, Yasuhiko Otawara, Hiraku Ikeda, Kazuyuki Itoh, Shozo Nakamura, Hidekazu Fujimura, Kazuhito Koyama
  • Patent number: 5297177
    Abstract: A fuel assembly, where crystallographic orientations of a channel box are brought into a random distribution; and cladding tubes, spacers and a channel box are made from highly corrosion-resistant, Fe--Ni, zirconium-based alloy, hardened in the (.alpha.+.beta.) phase or .beta.-phase temperature region, has an average discharge burnup level of 50 to 550 GWd/t.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: March 22, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Masahisa Inagaki, Masayoshi Kanno, Hiromasa Hirakawa, Hideaki Ishizaki, Nobukazu Yamamoto, Hideo Maki, Junjiro Nakajima, Shozo Nakamura, Satoshi Kanno
  • Patent number: 5184208
    Abstract: A semiconductor device is provided in connection with a semiconductor chip which has a plurality of bonding pads at a part corresponding to a centrally located area of the front or first main surface thereof, an organic insulator film which overlies the semiconductor chip and which has an opening in correspondence with the bonding pads, a plurality of leads which overly the organic insulator film, and a molding resin with which these constituents are sealed or packaged.
    Type: Grant
    Filed: January 14, 1991
    Date of Patent: February 2, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Sakuta, Kazuyuki Miyazawa, Satoshi Oguchi, Aizo Kaneda, Masao Mitani, Shozo Nakamura, Kunihiko Nishi, Gen Murakami
  • Patent number: 5128098
    Abstract: A fuel assembly comprises a plurality of fuel rods, a lower tie plate for supporting lower ends of the fuel rods, and a channel box surrounding a bundle of the fuel rods and the circumference of the lower tie plate to thereby define a cooling water leak passage between the lower tie plate and the channel box. The fuel assembly includes a venturi provided in the lower tie plate for generating a force tending to attract the channel box toward the lower tie plate under the action of a leak stream of the cooling water passing through the cooling water leak passage. The fuel assembly also includes an arrangement provided in the lower tie plate for suppressing vibrations of the channel box caused upon an influence of the venturi.
    Type: Grant
    Filed: January 9, 1991
    Date of Patent: July 7, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Shozo Nakamura, Tadashi Mizuno, Junjiro Nakajima, Yoshihiko Yanagi, Hajime Umehara, Tetsuo Yasuda, Akira Maru, Junichi Yamashita, Yuichiro Yoshimoto, Tatsuo Hayashi
  • Patent number: 5110515
    Abstract: A method for manufacturing plastic package for semiconductor according to the present invention comprises the steps of: forming a mold product of plastic package for semiconductor, which contains therein a semiconductor chip, by molding resin by means of a transfer press; heating the mold product to postcure it during transportation from the transfer press to a heating chamber while the mold product is kept by heaters at a temperature higher than a glass transition temperature of the resin for a predetermined period of time; and further heating the mold product in the heating chamber while the mold product is kept at a temperature substantially equal to the glass transition temperature of the resin for another predetermined period of time.
    Type: Grant
    Filed: May 16, 1989
    Date of Patent: May 5, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Shozo Nakamura, Aizo Kaneda, Shigeharu Tsunoda, Akio Hasebe, Masao Mitani
  • Patent number: 5106575
    Abstract: A nuclear fuel assembly has a plurality of fuel rods and a lower tie plate supporting their lower ends. Coolant apertures extending through the lower tie plate. A channel box surrounds the fuel rods and receives the lower tie plate, to confine the coolant. To restrict leakage of coolant between the tie plate and the channel box, the coolant apertures include, adjacent the periphery of the lower tie plate, a plurality of peripheral apertures which are located at least partly outside the outermost fuel rods. The peripheral apertures each provide a coolant velocity peak located further from the axial center line of the tie plate than the axial center lines of the closest neighboring fuel rods. The invention also provides venturis in the leakage path between the channel box and the tie plate, to restrict deformation of the tie plate.
    Type: Grant
    Filed: January 12, 1990
    Date of Patent: April 21, 1992
    Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.
    Inventors: Shozo Nakamura, Tadashi Mizuno, Tetsuo Yasuda, Akira Maru, Yoshishige Kawada, Yoshihiko Yanagi, Hiromasa Hirakawa, Junjiro Nakajima, Yasuhiro Aizawa, Yorihide Segawa
  • Patent number: 5068712
    Abstract: As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the "Lead-On-Chip" or "Chip-On-Lead" structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.
    Type: Grant
    Filed: September 19, 1989
    Date of Patent: November 26, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Gen Murakami, Kunihiro Tsubosaki, Masahiro Ichitani, Kunihiko Nishi, Ichiro Anjo, Asao Nishimura, Makoto Kitano, Akihiro Yaguchi, Sueo Kawai, Masatsugu Ogata, Syuuji Eguchi, Hiroyoshi Kokaku, Masanori Segawa, Hiroshi Hozoji, Takashi Yokoyama, Noriyuki Kinjo, Aizo Kaneda, Junichi Saeki, Shozo Nakamura, Akio Hasebe, Hiroshi Kikuchi, Isamu Yoshida, Takashi Yamazaki, Kazuyoshi Oshima, Tetsuro Matsumoto