Abstract: Provided are a memory element and a memory device. A memory layer is provided with an ion source layer. The ion source layer includes Zr (zirconium), Cu (copper), and Al (aluminum) as a metal element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogen element). The amount of Al in the ion source layer is 30 to 50 atomic percent. The amount of Zr is preferably 7.5 to 25 atomic percent, and more preferably, the composition ratio of Zr to the chalcogen element in total included in the ion source layer (=Zr (atomic percent)/chalcogen element in total (atomic percent)) falls within a range from 0.2 to 0.74.

Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.

Abstract: A storage device capable of decreasing the number of voltages necessitating control and decreasing peripheral circuit size is provided. A first pulse voltage (VBLR) is supplied from a first power source through a bit line BLR to an electrode of a variable resistive element. A second pulse voltage (VWL) for selecting a cell is supplied from a second power source through a word line WL to a control terminal of a transistor. A third pulse voltage (VBLT) is supplied from a third power source though a bit line BLT to a second input/output terminal of the transistor. At the time of rewriting information, the voltage value (VBLT) of the third power source is adjusted by an adjustment circuit. Thereby, a cell voltage and a cell current are changed (decreased or increased).

Abstract: A memory device that includes a resistive-change memory element, the memory device includes: a first memory element that includes a first resistive-change layer and a first electrode connected to the first resistive-change layer; and a second memory element that includes a second resistive-change layer and a second electrode connected to the second resistive-change layer, wherein at least one of the thickness and the material of the second resistive-change layer and the area of the second electrode in contact with the second resistive-change layer is different from the corresponding one of the thickness and the material of the first resistive-change layer and the area of the first electrode in contact with the first resistive-change layer.

Abstract: An objective of the present invention is to provide a switching device that shows two markedly different stable resistance characteristics reversibly and repetitively, and which is applicable to highly integrated nonvolatile memories.

Abstract: A memory cell is provided, in which a resistance value is appropriately controlled, thereby a variable resistance element may be applied with a voltage necessary for changing the element into a high or low resistance state. A storage element 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The storage element 10 has a nonlinear current-voltage characteristic opposite to a nonlinear current-voltage characteristic of the MOS transistor 30, and changes into a high or low resistance state in accordance with a polarity of applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic similar to the nonlinear current-voltage characteristic of the storage element 10.

Abstract: A storage device that improves ability of adjusting a resistance value level in recording and enables stable verification control is provided. VWL supplied from a second power source to a control terminal of a transistor is increased (increase portion: ?VWL) for every rerecording by verification control by a WL adjustment circuit. In the case where a variable resistive element is able to record multiple values, ?VWL is a value variable for every resistance value level of multiple value information. That is, ?VWL is a value variable according to magnitude relation of a variation range of recording resistance of the variable resistive element due to a current. In the region where the variation range of the recording resistance is large (source-gate voltage VGS of the transistor is small), ?VWL is small, while in the region where the variation range of the recording resistance is small (VGS is large), ?VWL is large.

Abstract: A storage device capable of reducing a number of cycles necessary for a verify at a time of multi-value recording is provided. An initial value of a potential difference VCG between a gate and a source of a switching transistor at the time of the verify is set to a value varied in accordance with a resistance value level of multi-value information. In the case where a writing side performs a 3-value recording, when “01” is the information, an initial value VGS01 is set to be smaller than VGS=1.7 V corresponding to the target resistance value level “01”, and when “00” is the information, a value is set to be lower than VGS=2.2 V corresponding to the target resistance value level “00” and higher than the above-described VGS01. This can reduce the number of cycles necessary for the verify process.

Abstract: The capability of retaining a resistance value of a stored state and an erased state is improved in a resistance variation-type memory device. A memory layer 5 including a high-resistance layer 2 and an ion source layer 3 is provided between a lower electrode 1 and an upper electrode 4. The ion source layer 3 contains Al (aluminum) as an additive element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogenide element) and a metal element to be ionized such as Zr (zirconium). Since Al is included in the ion source layer 3, the high-resistance layer which includes Al (Al oxide) is formed on an anode in erasing operation. Thus, a retaining property in a high-resistance state improves, and at the same time, an operating speed is improved.

Abstract: An objective of the present invention is to provide a switching device that shows two markedly different stable resistance characteristics reversibly and repetitively, and which is applicable to highly integrated nonvolatile memories.

Abstract: A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is written or erased in accordance with a variation in electrical characteristics of the memory layer; and pulse applying means applying a voltage pulse or a current pulse selectively to the plurality of memory elements. The memory layer includes an ion source layer including an ionic-conduction material and at least one kind of metallic element, and the ion source layer further contains oxygen.

Abstract: A chip-like printed antenna in which an open end is formed by at least two antenna conductors separated from each other is mounted on a printed-circuit board. A ground required by one or plural other modules is disposed and mounted on the printed-circuit board so as to surround a remaining area of a surrounding area of the printed antenna except a partial area as indicated by oblique line parts. By this, in the printed-circuit board , a radiation electric field does not come to have a dipole mode, but is formed into a balloon shape and is radiated in one direction as indicated by a broken line.

Abstract: A PDA includes a printed-circuit board on which at least one printed antenna pair having two chip-like printed antennas, which receive linearly polarized signals and are disposed along axes orthogonal to each other, is mounted. In each of the printed antennas, an open end is formed of at least two antenna conductors separated from each other. Besides, in the printed-circuit board, a ground required by one or plural other modules is disposed so as to surround a surrounding area of at least three sides of four sides forming a rectangular section in each of the printed antennas, and each of the printed antennas is disposed and mounted so that a remaining one side faces an edge portion of the printed-circuit board. While the PDA can receive circularly polarized signals very effectively, the degree of freedom in layout is greatly expanded and miniaturization can be realized.

Abstract: A PDA includes a printed-circuit board on which at least one printed antenna pair having two chip-like printed antennas, which receive linearly polarized signals and are disposed along axes orthogonal to each other, is mounted. In each of the printed antennas, an open end is formed of at least two antenna conductors separated from each other. Besides, in the printed-circuit board, a ground required by one or plural other modules is disposed so as to surround a surrounding area of at least three sides of four sides forming a rectangular section in each of the printed antennas, and each of the printed antennas is disposed and mounted so that a remaining one side faces an edge portion of the printed-circuit board. While the PDA can receive circularly polarized signals very effectively, the degree of freedom in layout is greatly expanded and miniaturization can be realized.

Abstract: A chip-like printed antenna in which an open end is formed by at least two antenna conductors separated from each other is mounted on a printed-circuit board. A ground required by one or plural other modules is disposed and mounted on the printed-circuit board so as to surround a remaining area of a surrounding area of the printed antenna except a partial area as indicated by oblique line parts. By this, in the printed-circuit board, a radiation electric field does not come to have a dipole mode, but is formed into a balloon shape and is radiated in one direction as indicated by a broken line.