Patents by Inventor Shunichi Saito
Shunichi Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10416041Abstract: A combustion state parameter calculation method for an internal combustion engine, which is capable of continuously calculating a combustion state parameter while properly maintaining the accuracy of the calculated parameter even when part of in-cylinder pressure sensors is in failure. In the combustion state parameter calculation method, as a combustion state parameter, a first combustion state parameter dependent on the magnitude of in-cylinder pressure is calculated based on a detection value from an in-cylinder pressure sensor, on a cylinder-by-cylinder basis. When it is determined that a characteristic abnormality failure in which the magnitude of the detection value deviates from the actual in-cylinder pressure has occurred in part of the in-cylinder pressure sensors and has not occurred in the other in-cylinder pressure sensors, the first combustion state parameter of a failure-determined cylinder is calculated based on the detection value from the other in-cylinder pressure sensors.Type: GrantFiled: November 24, 2015Date of Patent: September 17, 2019Assignees: HONDA MOTOR CO., LTD., KEIHIN CORPORATIONInventors: Shusuke Akazaki, Taisuke Inoue, Shunichi Saito
-
Patent number: 10372330Abstract: Apparatuses and methods for configurable memory array bank architectures are described. An example apparatus includes a mode register configured to store information related to bank architecture and a memory array including a plurality of memory banks. The plurality of memory banks are configured to be arranged in a bank architecture based at least in part on the information related to bank architecture stored in the mode register.Type: GrantFiled: June 28, 2018Date of Patent: August 6, 2019Assignee: Micron Technology, Inc.Inventors: Dean D. Gans, Shunichi Saito
-
Patent number: 10289095Abstract: A wire electric discharge machining system according to the present invention includes: a wire electric discharge machine that relatively moves a wire electrode and a workpiece to be machined according to a program, and subjects the workpiece to be machined to electric discharge machining by the wire electrode; at least one hand; a robot which mounts the hand on a head of an arm, and operates an object to be operated; and a visual sensor that detects a position of a machined workpiece in a machining tank, which has been cut from the workpiece to be machined by the electric discharge machining, wherein the robot performs an operation of removing the machined workpiece from the machining tank, based on the position of the machined workpiece, which has been detected by the visual sensor.Type: GrantFiled: December 22, 2016Date of Patent: May 14, 2019Assignee: FANUC CORPORATIONInventor: Shunichi Saito
-
Publication number: 20190129637Abstract: Methods, systems, and apparatuses related to memory operation with multiple sets of latencies are disclosed. A memory device or system that includes a memory device may be operable with one or several sets of latencies (e.g., read, write, or write recovery latencies), and the memory device or system may apply a set of latencies depending on which features of the memory device are enabled. For example, control circuitry may be configured to enable one or more features during operations on a memory array, and the control circuitry may apply a set of latency values based on a number or type of features that are enabled. The sets of latency values may depend, for example, on whether various control features (e.g., dynamic voltage frequency scaling) are enabled, and a device may operate within certain frequency ranges irrespective of other characteristics (e.g., mode register values) or latencies applied.Type: ApplicationFiled: July 27, 2018Publication date: May 2, 2019Inventors: Dean D. Gans, Yoshiro Riho, Shunichi Saito, Osamu Nagashima
-
Publication number: 20190129635Abstract: Methods, systems, and apparatuses related to memory operation with multiple sets of latencies are disclosed. A memory device or system that includes a memory device may be operable with one or several sets of latencies (e.g., read, write, or write recovery latencies), and the memory device or system may apply a set of latencies depending on which features of the memory device are enabled. For example, control circuitry may be configured to enable one or more features during operations on a memory array, and the control circuitry may apply a set of latency values based on a number or type of features that are enabled. The sets of latency values may depend, for example, on whether various control features (e.g., dynamic voltage frequency scaling) are enabled, and a device may operate within certain frequency ranges irrespective of other characteristics (e.g., mode register values) or latencies applied.Type: ApplicationFiled: October 30, 2017Publication date: May 2, 2019Inventors: Dean D. Gans, Yoshiro Riho, Shunichi Saito, Osamu Nagashima
-
Patent number: 10049722Abstract: Apparatuses are presented for a semiconductor device utilizing dual I/O line pairs. The apparatus includes a first I/O line pair coupled to a first local I/O line pair. A second I/O line pair may be provided coupled to a second local I/O line pair. The apparatus may further include a first bit line including at least a first memory cell and a second memory cell, and a second bit line including at least a third memory cell and a fourth memory cell may be provided. The first local I/O line pair may be coupled to at least one of the first and second bit lines, and the second local I/O line pair is coupled to at least one of the first and second bit lines.Type: GrantFiled: September 28, 2017Date of Patent: August 14, 2018Assignee: Micron Technology, Inc.Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka
-
Publication number: 20180197595Abstract: Apparatuses are presented for a semiconductor device utilizing dual I/O line pairs. The apparatus includes a first I/O line pair coupled to a first local I/O line pair. A second I/O line pair may be provided coupled to a second local I/O line pair. The apparatus may further include a first bit line including at least a first memory cell and a second memory cell, and a second bit line including at least a third memory cell and a fourth memory cell may be provided. The first local I/O line pair may be coupled to at least one of the first and second bit lines, and the second local I/O line pair is coupled to at least one of the first and second bit lines.Type: ApplicationFiled: September 28, 2017Publication date: July 12, 2018Applicant: MICRON TECHNOLOGY, INC.Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka
-
Patent number: 9837137Abstract: A semiconductor device includes a plurality of memory cells, an access circuit configured to perform a data read operation, a data write operation and a data refresh operation on the memory cells, the access circuit to operate in a selected one of a first mode that is ready to perform and a second mode that is not ready to perform, and a judgment circuit configured to respond to first command information, to cause, when the access circuit is in the first mode, the access circuit to perform the data refresh operation, and to cause, when the access circuit is in the second mode, the access circuit to exit from the second mode and then to perform the refresh operation.Type: GrantFiled: May 19, 2016Date of Patent: December 5, 2017Assignee: Micron Technology, Inc.Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi
-
Patent number: 9805786Abstract: Apparatuses are presented for a semiconductor device utilizing dual I/O line pairs. The apparatus includes a first I/O line pair coupled to a first local I/O line pair. A second I/O line pair may be provided coupled to a second local I/O line pair. The apparatus may further include a first bit line including at least a first memory cell and a second memory cell, and a second bit line including at least a third memory cell and a fourth memory cell may be provided. The first local I/O line pair may be coupled to at least one of the first and second bit lines, and the second local I/O line pair is coupled to at least one of the first and second bit lines.Type: GrantFiled: January 6, 2017Date of Patent: October 31, 2017Assignee: Micron Technology, Inc.Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi, Atsuo Koshizuka
-
Patent number: 9702787Abstract: An in-cylinder pressure detecting apparatus for an internal combustion engine, for detecting an in-cylinder pressure which is a pressure in a combustion chamber of the engine. The in-cylinder pressure is detected by an in-cylinder pressure detecting block, and a motoring pressure corresponding to an in-cylinder pressure when no combustion is performed in the combustion chamber, is estimated. A peak value of the detected in-cylinder pressure is obtained as a detected pressure peak value in a predetermined operating condition of the engine. An estimated motoring pressure peak value which is a peak value of the estimated motoring pressure and corresponds to the detected pressure peak value, is calculated. The detected pressure peak value is compared with the estimated motoring pressure peak value, and sensitivity correction of the in-cylinder pressure detecting block is performed based on a result of the comparison.Type: GrantFiled: March 30, 2015Date of Patent: July 11, 2017Assignees: HONDA MOTOR CO., LTD., KEIHIN CORPORATIONInventors: Shusuke Akazaki, Shunichi Saito
-
Publication number: 20170185065Abstract: A wire electric discharge machining system according to the present invention includes: a wire electric discharge machine that relatively moves a wire electrode and a workpiece to be machined according to a program, and subjects the workpiece to be machined to electric discharge machining by the wire electrode; at least one hand; a robot which mounts the hand on a head of an arm, and operates an object to be operated; and a visual sensor that detects a position of a machined workpiece in a machining tank, which has been cut from the workpiece to be machined by the electric discharge machining, wherein the robot performs an operation of removing the machined workpiece from the machining tank, based on the position of the machined workpiece, which has been detected by the visual sensor.Type: ApplicationFiled: December 22, 2016Publication date: June 29, 2017Inventor: Shunichi SAITO
-
Patent number: 9540186Abstract: The conveyor system of the present invention comprises a conveyor robot having a hand and arm, and a pair of gripping jigs attached to a conveyed object. The hand of the conveyor robot comprises a body part attached to an arm, a pair of projecting parts projecting out from different positions of the body part in the same direction, hook parts provided on the pair of projecting parts, and pushing parts attached to the body part adjoining the pair of projecting parts and configured to move along the projection direction of the pair of projecting parts to generate a pushing force. Each gripping jig attached to a conveyed object comprises of a pushed part pushed by a pushing part of the hand, and a rod-shaped part caught on a hook part of the hand.Type: GrantFiled: January 20, 2016Date of Patent: January 10, 2017Assignee: Fanuc CorporationInventors: Shunichi Saito, Yoshitake Furuya
-
Publication number: 20160267962Abstract: A semiconductor device includes a plurality of memory cells, an access circuit configured to perform a data read operation, a data write operation and a data refresh operation on the memory cells, the access circuit to operate in a selected one of a first mode that is ready to perform and a second mode that is not ready to perform, and a judgment circuit configured to respond to first command information, to cause, when the access circuit is in the first mode, the access circuit to perform the data refresh operation, and to cause, when the access circuit is in the second mode, the access circuit to exit from the second mode and then to perform the refresh operation.Type: ApplicationFiled: May 19, 2016Publication date: September 15, 2016Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi
-
Patent number: 9429091Abstract: A fuel injection apparatus for an internal combustion engine having a plurality of cylinders is provided. The fuel injection apparatus includes a fuel injection valve and an in-cylinder pressure sensor disposed for each of the plurality of cylinders. The fuel injection valve injects fuel into a combustion chamber of each cylinder and the in-cylinder pressure sensor detects a pressure in the combustion chamber. The fuel injection apparatus includes a cylinder pair actuating circuit and a noise suppressing circuit. The cylinder pair actuating circuit is provided corresponding to a cylinder pair which is a combination of two cylinders included in the plurality of cylinders, for supplying actuating current to two actuating solenoids of the two fuel injection valves mounted on the cylinder pair. The noise suppressing circuit is provided between the cylinder pair actuating circuit and the actuating solenoids.Type: GrantFiled: March 30, 2015Date of Patent: August 30, 2016Assignee: HONDA MOTOR CO., LTD.Inventors: Shusuke Akazaki, Shunichi Saito, Kaoru Akiyama
-
Publication number: 20160214262Abstract: The conveyor system of the present invention comprises a conveyor robot having a hand and arm, and a pair of gripping jigs attached to a conveyed object. The hand of the conveyor robot comprises a body part attached to an arm, a pair of projecting parts projecting out from different positions of the body part in the same direction, hook parts provided on the pair of projecting parts, and pushing parts attached to the body part adjoining the pair of projecting parts and configured to move along the projection direction of the pair of projecting parts to generate a pushing force. Each gripping jig attached to a conveyed object comprises of a pushed part pushed by a pushing part of the hand, and a rod-shaped part caught on a hook part of the hand.Type: ApplicationFiled: January 20, 2016Publication date: July 28, 2016Applicant: FANUC CORPORATIONInventors: Shunichi Saito, Yoshitake Furuya
-
Patent number: 9368185Abstract: A semiconductor device includes a plurality of memory cells, an access circuit configured to perform a data read operation, a data write operation and a data refresh operation on the memory cells, the access circuit to operate in a selected one of a first mode that is ready to perform and a second mode that is not ready to perform, and a judgment circuit configured to respond to first command information, to cause, when the access circuit is in the first mode, the access circuit to perform the data refresh operation, and to cause, when the access circuit is in the second mode, the access circuit to exit from the second mode and then to perform the refresh operation.Type: GrantFiled: October 7, 2014Date of Patent: June 14, 2016Assignee: Micron Technology, Inc.Inventors: Shunichi Saito, Toshio Sugano, Atsushi Hiraishi
-
Publication number: 20160146703Abstract: A combustion state parameter calculation method for an internal combustion engine, which is capable of continuously calculating a combustion state parameter while properly maintaining the accuracy of the calculated parameter even when part of in-cylinder pressure sensors is in failure. In the combustion state parameter calculation method, as a combustion state parameter, a first combustion state parameter dependent on the magnitude of in-cylinder pressure is calculated based on a detection value from an in-cylinder pressure sensor, on a cylinder-by-cylinder basis. When it is determined that a characteristic abnormality failure in which the magnitude of the detection value deviates from the actual in-cylinder pressure has occurred in part of the in-cylinder pressure sensors and has not occurred in the other in-cylinder pressure sensors, the first combustion state parameter of a failure-determined cylinder is calculated based on the detection value from the other in-cylinder pressure sensors.Type: ApplicationFiled: November 24, 2015Publication date: May 26, 2016Inventors: Shusuke AKAZAKI, Taisuke INOUE, Shunichi SAITO
-
Publication number: 20160139636Abstract: According to one embodiment, an electronic apparatus comprises, a first housing having a bottom surface placed on a mounting surface, a first operation portion, and a palmrest, and a second housing having a front surface provided with a second operation portion and a back surface. The electronic apparatus is convertible into a tablet style in which the second housing is overlapped on the first housing so that the bottom surface faces the back surface, and the first operation portion and the palmrest are directed to the mounting surface. The first housing has a nonslip portion protruded from a surface of the palmrest, the nonslip portion hitting the mounting surface in the tablet style.Type: ApplicationFiled: September 9, 2015Publication date: May 19, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shunichi SAITO, Keiichi Uehara
-
Publication number: 20160082615Abstract: A device capable of separating a remnant from a product part irrespective of a shape of the remnant. The device includes a first attraction part which attracts a first part and is moved downward; a second attraction part provided movable relative to the first attraction part to attract a second part; a jig which comes into contact with a back surface of the second part to prevent the second part from moving downward; and further a position maintaining part which maintains a position of the second attraction part relative to the first attraction part when the first attraction part is moved downward to separate the first part from the second part.Type: ApplicationFiled: September 18, 2015Publication date: March 24, 2016Applicant: FANUC CORPORATIONInventor: Shunichi Saito
-
Publication number: 20150292458Abstract: A fuel injection apparatus for an internal combustion engine having a plurality of cylinders is provided. The fuel injection apparatus includes a fuel injection valve and an in-cylinder pressure sensor disposed for each of the plurality of cylinders. The fuel injection valve injects fuel into a combustion chamber of each cylinder and the in-cylinder pressure sensor detects a pressure in the combustion chamber. The fuel injection apparatus includes a cylinder pair actuating circuit and a noise suppressing circuit. The cylinder pair actuating circuit is provided corresponding to a cylinder pair which is a combination of two cylinders included in the plurality of cylinders, for supplying actuating current to two actuating solenoids of the two fuel injection valves mounted on the cylinder pair. The noise suppressing circuit is provided between the cylinder pair actuating circuit and the actuating solenoids.Type: ApplicationFiled: March 30, 2015Publication date: October 15, 2015Inventors: Shusuke AKAZAKI, Shunichi SAITO, Kaoru AKIYAMA