Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145599
    Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Akiharu MIYANAGA, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Publication number: 20240143109
    Abstract: A convenient electronic device or the like is provided. The power consumption of an electronic device or the like is reduced. An electronic device or the like having high visibility regardless of the brightness of external light is provided. An electronic device or the like that can display both a smooth moving image and an eye-friendly still image is provided. Such an electronic device is an electronic device including a first display portion, a second display portion, and a control portion. The control portion is configured to make the first display portion and the second display portion individually display two or more of a first image, a second image, and a third image at a time. The first image is displayed with reflected light, the second image is displayed with emitted light, and the third image is displayed with light including both reflected light and emitted light.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: Shunpei YAMAZAKI, Kensuke YOSHIZUMI
  • Publication number: 20240143100
    Abstract: A display device with excellent visibility can be provided. The display device includes a display region displayed by a light-emitting element. In the display region, a point touched by a user is a first point, a point which has been touched by the user prior to the first point is a second point, a vector that starts at the first point and ends at the second point is a first vector, a vector obtained by multiplying the first vector by k (k is a real number) is a second vector, and a point that is the second vector away from the first point is a third point, the display region includes a first region and a second region obtained by excluding the first region from the display region, The first region includes a first circle and a second circle, the center of the first circle is the first point, and the center of the second circle is the third point. The luminance in the first region is higher than the luminance in the second region.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 2, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yuki Okamoto, Kei Takahashi, Shunpei Yamazaki
  • Publication number: 20240140341
    Abstract: An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.
    Type: Application
    Filed: October 18, 2023
    Publication date: May 2, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Yoshiyuki KUROKAWA
  • Publication number: 20240136358
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 25, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240138223
    Abstract: A high-definition or high-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, and a second insulating layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. Each of an end portion of the first pixel electrode and an end portion of the second pixel electrode is covered with the first insulating layer. The second insulating layer is positioned over the first insulating layer. The second insulating layer covers each of a side surface of the first light-emitting layer and a side surface of the second light-emitting layer.
    Type: Application
    Filed: February 9, 2022
    Publication date: April 25, 2024
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Daiki NAKAMURA, Rai SATO
  • Patent number: 11967505
    Abstract: A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Masashi Oota, Yoichi Kurosawa, Noritaka Ishihara
  • Patent number: 11967649
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Takeuchi, Naoto Yamade, Yutaka Okazaki, Sachiaki Tezuka, Shunpei Yamazaki
  • Patent number: 11967648
    Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Hideyuki Kishida
  • Publication number: 20240130163
    Abstract: A high-resolution or high-definition display apparatus is provided. The display apparatus includes a plurality of light-emitting elements, a light-receiving element, a coloring layer, and a first sidewall. The light-emitting elements include a first pixel electrode, a first light-emitting layer over the first pixel electrode, an intermediate layer over the first light-emitting layer, and a common electrode over a second light-emitting layer over a first intermediate layer. The first pixel electrode, the first light-emitting layer, the intermediate layer, and the second light-emitting layer are divided for each light-emitting element. The coloring layer is provided to include a region overlapping with the light-emitting element. The light-receiving element includes a second pixel electrode, a light-receiving layer over the second pixel electrode, and a common electrode over the light-receiving layer.
    Type: Application
    Filed: February 7, 2022
    Publication date: April 18, 2024
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Yasumasa YAMANE, Ryota HODO
  • Publication number: 20240128302
    Abstract: A novel functional panel that is highly convenient or highly reliable is provided. The functional panel includes a first pixel. The first pixel includes a first element, a color conversion layer, and a first functional layer. The first functional layer is positioned between the first element and the color conversion layer. The first element has a function of emitting light and contains gallium nitride. The color conversion layer has a function of converting the color of light emitted from the first element into a different color. The first functional layer includes a first insulating film and a pixel circuit. The first insulating film includes a region positioned between the pixel circuit and the first element, and has an opening. The pixel circuit includes a first transistor. The first transistor includes a first oxide semiconductor film and is electrically connected to the first element through the opening.
    Type: Application
    Filed: August 21, 2023
    Publication date: April 18, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA
  • Publication number: 20240130159
    Abstract: A highly reliable display device with high display quality is provided. The display device includes a first light-emitting element, a second light-emitting element provided to be adjacent to the first light-emitting element, a first protective layer, a second protective layer, and an insulating layer. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode, and the second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. The first EL layer is provided over the first pixel electrode, and the second EL layer is provided over the second pixel electrode. The first protective layer includes a region in contact with the side surface of the first EL layer, and the second protective layer includes a region in contact with the side surface of the second EL layer. The insulating layer is provided between the first protective layer and the second protective layer.
    Type: Application
    Filed: March 15, 2022
    Publication date: April 18, 2024
    Inventors: Shunpei YAMAZAKI, Ryota HODO, Yasuhiro JINBO
  • Publication number: 20240130101
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor, a capacitor, and a first insulating layer. The first insulating layer is provided over a first conductive layer and a second conductive layer and includes a first opening reaching the first conductive layer and a second opening reaching the second conductive layer. The transistor is a vertical transistor in which a channel formation region is provided along the side wall of the first opening. The capacitor is a vertical capacitor in which a pair of electrodes and a dielectric are provided along the side surface of the second opening.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Inventors: Takanori MATSUZAKI, Toshihiko SAITO, Shunpei YAMAZAKI
  • Publication number: 20240130204
    Abstract: A display device with both high display quality and high resolution is provided. The display device includes a light-emitting element and a connection portion. The connection portion is provided along an outer periphery of a display region where the light-emitting element is provided. The light-emitting element includes a pixel electrode, a first EL layer over the pixel electrode, a second EL layer over the first EL layer, and a common electrode over the second EL layer. The connection portion includes a connection electrode, a second EL layer over the connection electrode, and the common electrode over the second EL layer. The second EL layer includes a first region in contact with the connection electrode and a second region in contact with the common electrode. The area of a region where the first region and the second region overlap with each other in a top view is greater than or equal to 40000 square micrometers.
    Type: Application
    Filed: January 14, 2022
    Publication date: April 18, 2024
    Inventors: Daiki NAKAMURA, Sho KATO, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Patent number: 11963360
    Abstract: A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series. The prism-like insulator is provided over the substrate. The memory cell string is provided on the side surface of the prism-like insulator. The plurality of transistors each include a gate insulator and a gate electrode. The gate insulator includes a first insulator, a second insulator, and a charge accumulation layer. The charge accumulation layer is positioned between the first insulator and the second insulator.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tomoaki Atsumi, Yuta Endo
  • Patent number: 11961917
    Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: April 16, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuya Hanaoka, Daisuke Matsubayashi, Yoshiyuki Kobayashi, Shunpei Yamazaki, Shinpei Matsuda
  • Patent number: 11961918
    Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Patent number: 11963374
    Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 11961979
    Abstract: A semiconductor device capable of charging that is less likely to cause deterioration of a power storage device is provided. The amount of a charging current is adjusted in accordance with the ambient temperature. Charging under low-temperature environments is performed with a reduced charging current. When the ambient temperature is too low or too high, the charging is stopped. Measurement of the ambient temperature is performed with a memory element using an oxide semiconductor. The use of a memory element using an oxide semiconductor enables measurement of the ambient temperature and retention of the temperature information to be performed at the same time.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Munehiro Kozuma, Takanori Matsuzaki, Ryota Tajima, Shunpei Yamazaki
  • Patent number: 11961843
    Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki, Shunpei Yamazaki