Patents by Inventor Shunpei Yamazaki

Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927862
    Abstract: An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: March 12, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshikazu Kondo, Jun Koyama, Shunpei Yamazaki
  • Publication number: 20240079502
    Abstract: A semiconductor device with favorable electrical characteristics is to be provided. A highly reliable semiconductor device is to be provided. A semiconductor device with lower power consumption is to be provided. The semiconductor device includes a gate electrode, a first insulating layer over the gate electrode, a metal oxide layer over the first insulating layer, a pair of electrodes over the metal oxide layer, and a second insulating layer over the pair of electrodes. The first insulating layer includes a first region and a second region. The first region has a region being in contact with the metal oxide layer and containing more oxygen than the second region. The second region has a region containing more nitrogen than the first region. The metal oxide layer has at least a concentration gradient of oxygen in a thickness direction, and the concentration gradient becomes high on a first region side and on a second region side.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Inventors: Junichi KOEZUKA, Kenichi OKAZAKI, Yukinori SHIMA, Yasutaka NAKAZAWA, Yasuharu HOSAKA, Shunpei YAMAZAKI
  • Publication number: 20240079499
    Abstract: To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+?Ga1??O3(ZnO)m (0<?<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by InxGayO3(ZnO)m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).
    Type: Application
    Filed: October 19, 2023
    Publication date: March 7, 2024
    Inventors: Masahiro TAKAHASHI, Kengo AKIMOTO, Shunpei YAMAZAKI
  • Patent number: 11923707
    Abstract: A battery protection circuit with a novel configuration and a power storage device including the battery protection circuit are provided. The battery protection circuit includes a switch circuit for controlling charge and discharge of a battery cell; the switch circuit includes a mechanical relay, a first transistor, and a second transistor; the switch circuit has a function of controlling electrical connection between a first terminal and a second terminal; the mechanical relay has a function of breaking electrical connection between the first terminal and the second terminal; the first transistor has a function of supplying first current between the first terminal and the second terminal; the second transistor has a function of supplying second current between the first terminal and the second terminal; and the first current is higher than the second current.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda, Munehiro Kozuma, Takanori Matsuzaki, Akio Suzuki, Seiya Saito
  • Patent number: 11923204
    Abstract: A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroki Ohara
  • Patent number: 11923249
    Abstract: A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11922999
    Abstract: A novel memory device is provided. The memory device includes a plurality of memory cells, and one memory cell includes a first transistor and a second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor through a node SN. Data written through the first transistor is retained at the node SN. When an OS transistor is used as the first transistor, formation of a storage capacitor is not needed. A region with a low dielectric constant is provided outside the memory cell, whereby noise from the outside is reduced and stable operation is achieved.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiko Ishizu, Toshihiko Saito, Hideki Uochi, Shunpei Yamazaki
  • Patent number: 11923372
    Abstract: A semiconductor device is described, which includes a first transistor, a second transistor, and a capacitor. The second transistor and the capacitor are provided over the first transistor so as to overlap with a gate of the first transistor. A semiconductor layer of the second transistor and a dielectric layer of the capacitor are directly connected to the gate of the first transistor. The second transistor is a vertical transistor, where its channel direction is perpendicular to an upper surface of a semiconductor layer of the first transistor.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kensuke Yoshizumi
  • Patent number: 11923423
    Abstract: A novel metal oxide is provided. One embodiment of the present invention is a crystalline metal oxide. The metal oxide includes a first layer and a second layer; the first layer has a wider bandgap than the second layer; the first layer and the second layer form a crystal lattice; and in the case where a carrier is excited in the metal oxide, the carrier is transferred through the second layer. Furthermore, the first layer contains an element M (M is one or more selected from Al, Ga, Y, and Sn) and Zn, and the second layer contains In.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11923499
    Abstract: The adhesion between metal foil serving as a current collector and a negative electrode active material is increased to enable long-term reliability. An electrode active material layer (including a negative electrode active material or a positive electrode active material) is formed over a base, a metal film is formed over the electrode active material layer by sputtering, and then the base and the electrode active material layer are separated at the interface therebetween; thus, an electrode is formed. The electrode active material particles in contact with the metal film are bonded by being covered with the metal film formed by the sputtering. The electrode active material is used for at least one of a pair of electrodes (a negative electrode or a positive electrode) in a lithium-ion secondary battery.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Minoru Takahashi
  • Patent number: 11923206
    Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba, Masayuki Sakakura, Yoshiaki Oikawa
  • Publication number: 20240074240
    Abstract: A high-resolution or high-definition display device is provided.
    Type: Application
    Filed: January 18, 2022
    Publication date: February 29, 2024
    Inventors: Ryota HODO, Shinya SASAGAWA, Yoshikazu HIURA, Takahiro FUJIE, Shunpei YAMAZAKI
  • Publication number: 20240072176
    Abstract: A semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Jun KOYAMA
  • Publication number: 20240072065
    Abstract: A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. The scan line and the signal line are each electrically connected to the transistor. The scan line and the signal line each include a metal layer. The transistor is electrically connected to the pixel electrode. A semiconductor layer of the transistor includes a stack of a first metal oxide layer and a second metal oxide layer. The first metal oxide layer includes a region with lower crystallinity than the second metal oxide layer. The transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region are each configured to transmit visible light. Visible light passes through the first region and the liquid crystal element and exits from the display device.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Daisuke KUROSAKI, Yasutaka NAKAZAWA, Kazunori WATANABE, Koji KUSUNOKI
  • Publication number: 20240074254
    Abstract: The invention relates to: a light-emitting device which includes a first flexible substrate having a first electrode, a light-emitting layer over the first electrode, and a second electrode with a projecting portion over the light-emitting layer and a second flexible substrate having a semiconductor circuit and a third electrode electrically connected to the semiconductor circuit, in which the projecting portion of the second electrode and the third electrode are electrically connected to each other; a method for manufacturing the light-emitting device; and a cellular phone which includes a housing incorporating the light-emitting device and having a longitudinal direction and a lateral direction, in which the light-emitting device is disposed on a front side and in an upper portion in the longitudinal direction of the housing.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Kaoru HATANO, Satoshi SEO, Shunpei YAMAZAKI
  • Publication number: 20240072172
    Abstract: When a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are stacked and a source and drain electrode layers are provided in contact with the oxide semiconductor film is manufactured, after the formation of the gate electrode layer or the source and drain electrode layers by an etching step, a step of removing a residue remaining by the etching step and existing on a surface of the gate electrode layer or a surface of the oxide semiconductor film and in the vicinity of the surface is performed. The surface density of the residue on the surface of the oxide semiconductor film or the gate electrode layer can be 1×1013 atoms/cm2 or lower.
    Type: Application
    Filed: November 2, 2023
    Publication date: February 29, 2024
    Inventors: Shunpei YAMAZAKI, Masahiko HAYAKAWA, Tatsuya HONDA
  • Publication number: 20240074227
    Abstract: A novel display panel that is highly convenient or reliable is provided. The display panel includes a first region and a second region. The second region is provided with a first component, and the second region can be bent with the first component facing outward. The first component includes a first elastic body and a second elastic body. The second elastic body includes an end portion part or the whole of which is covered with the first elastic body. The second elastic body has a higher elastic modulus than the first elastic body.
    Type: Application
    Filed: September 11, 2023
    Publication date: February 29, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hiroki ADACHI, Shingo EGUCHI
  • Patent number: 11917838
    Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: February 27, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Publication number: 20240063028
    Abstract: A semiconductor device in which variation in characteristics is small is provided. A first insulator is formed; a first insulator is formed; a conductor is formed over the first insulator; a second insulator is formed over the conductor; a third insulator is formed over the second insulator; an oxide is formed over the third insulator; first heat treatment is performed; and second heat treatment following the first heat treatment is performed. The temperature of the first heat treatment is lower than the temperature of the second heat treatment.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 22, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shunichi ITO, Yoshihiro KAMATSU, Shinobu KAWAGUCHI, Shinya SASAGAWA
  • Publication number: 20240065035
    Abstract: A display device capable of displaying a high-quality image is provided. The display device includes a first light-emitting element, a second light-emitting element, and a gap. The first light-emitting element includes a first lower electrode, a first light-emitting layer over the first lower electrode, and a first upper electrode over the first light-emitting layer. The second light-emitting element includes a second lower electrode, a second light-emitting layer over the second lower electrode, and a second upper electrode over the second light-emitting layer. The first light-emitting element is adjacent to the second light-emitting element. The gap is between the first upper electrode and first light-emitting layer and the second upper electrode and second light-emitting layer. The first upper electrode includes a region projecting from a side surface of the first light-emitting layer. The second upper electrode includes a region projecting from a side surface of the second light-emitting layer.
    Type: Application
    Filed: December 28, 2021
    Publication date: February 22, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiro JINBO, Yuichi YANAGISAWA