Abstract: A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.

Abstract: Semiconductor devices comprising two-dimensional (2D) materials and methods of manufacture thereof are described. In an embodiment, a method for manufacturing a semiconductor device comprising 2D materials may include: epitaxially forming a first 2D material layer on a substrate; and epitaxially forming a second 2D material layer over the first 2D material layer, the first 2D material layer and the second 2D material layer differing in composition.

Abstract: In a method of fabricating a field effect transistor, a Mo layer is formed on the substrate. The Mo layer is sulfurized to convert it into a MoS2 layer. Source and drain electrodes are formed on the MoS2 layer. The MoS2 layer is treated with low-power oxygen plasma. A gate dielectric layer is formed on the MoS2 layer. A gate electrode is formed on the gate dielectric layer. An input electric power in the low-power oxygen plasma treatment is in a range from 15 W to 50 W.

Abstract: Semiconductor devices comprising two-dimensional (2D) materials and methods of manufacture thereof are described. In an embodiment, a method for manufacturing a semiconductor device comprising 2D materials may include: epitaxially forming a first 2D material layer on a substrate; and epitaxially forming a second 2D material layer over the first 2D material layer, the first 2D material layer and the second 2D material layer differing in composition.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.

Abstract: A process for fabricating an integrated circuit is provided. The process includes providing a substrate and forming a hard mask on the substrate. The hard mask may be formed by atomic-layer deposition (ALD) or molecular-layer deposition (MLD). The process also includes disposing an exposure mask over the hard mask and exposing the exposure mask to a patterning particle to pattern a gap in the hard mask. The patterning particle may be, for example, a photon or a charged particle.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.

Abstract: Resistive random-access memory (RRAM) devices and methods of manufacturing thereof are disclosed. A device comprises a first transparent conducting oxide (TCO) layer and a second TCO layer over the first TCO layer. The device further comprises a first dielectric layer between the first TCO layer and the second TCO layer, a second dielectric layer between the second TCO layer and the first dielectric layer, and a metal layer between the first dielectric layer and the second dielectric layer.

Abstract: A quantum dot infrared photodetector (QDIP) that can enhance the photocurrent to a greater level than the dark current and/or can be operated at high temperatures is disclosed. The quantum dot infrared photodetector comprises at least one quantum well stack and a plurality of quantum dot layers. The quantum well stack is disposed between the pluralities of quantum dot layers. The quantum well stack comprises two spacer layers and a carrier supplying layer. The carrier supplying layer is disposed between the spacer layers. When the quantum dot infrared photodetector is applied with two bias voltages respectively, the carrier supplying layer supplies carriers to the quantum dot layers.

Abstract: Resistive random-access memory (RRAM) devices and methods of manufacturing thereof are disclosed. A device comprises a first transparent conducting oxide (TCO) layer and a second TCO layer over the first TCO layer. The device further comprises a first dielectric layer between the first TCO layer and the second TCO layer, a second dielectric layer between the second TCO layer and the first dielectric layer, and a metal layer between the first dielectric layer and the second dielectric layer.

Abstract: Semiconductor devices comprising two-dimensional (2D) materials and methods of manufacture thereof are described. In an embodiment, a method for manufacturing a semiconductor device comprising 2D materials may include: epitaxially forming a first 2D material layer on a substrate; and epitaxially forming a second 2D material layer over the first 2D material layer, the first 2D material layer and the second 2D material layer differing in composition.

Abstract: Disclosed herein are a flexible substrate with surface structure and a method for manufacturing the flexible substrate. The disclosure relates to a low-cost process to manufacturing the flexible substrate that is adapted to the large-area mass production. According to one of the embodiments in the disclosure, the method introduces a mold with surface structure. An isolation material is formed on the mold surface in an earlier stage. Upon the isolation layer, a flexible substrate material is coated. After that, a baking step is employed to cure the flexible substrate material. The flexible substrate with surface structure is therefore formed after de-molding the cured substrate. Another aspect to the disclosure adopts the above-formed substrate to be a base substrate. A second flexible substrate with the surface structure identical to the mold is then formed by performing the above steps.

Abstract: An infrared emitter is provided, including a battery; a carrier having a groove formed in a center thereof and a plurality of holes formed through the carrier via the groove; a resistive fuse penetrating the holes and wound around the carrier, and having two ends electrically connected to negative and positive electrodes of the battery, respectively; and an infrared chip disposed in the groove of the carrier and being in direct contact with the resistive fuse, wherein heat is generated when a current of the battery flows through the resistive fuse so that the carrier and the infrared chip can be heated to enable the infrared chip to emit infrared rays. Accordingly, the infrared emitter has the advantages of small-size, light-weight and simple structure and great portability to significantly increase the convenience in use, especially in the application of narrow bandwidth infrared radiation relevant researches on biological cells.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.

Abstract: A process for fabricating an integrated circuit is provided. The process includes providing a substrate and forming a hard mask on the substrate. The hard mask may be formed by atomic-layer deposition (ALD) or molecular-layer deposition (MLD). The process also includes disposing an exposure mask over the hard mask and exposing the exposure mask to a patterning particle to pattern a gap in the hard mask. The patterning particle may be, for example, a photon or a charged particle.

Abstract: The invention provides a deep ocean current power plant. In one embodiment, the deep ocean current power plant comprises at least one relay platform, a plurality of platform anchorage cables, a plurality of turbine generators, and power conversion equipment. The at least one relay platform floats and is submerged in a deep ocean current. The platform anchorage cables anchor the relay platform to a seabed. The turbine generators are anchored to the relay platform, and convert kinetic energy of the deep ocean current into electrical energy. The power conversion equipment is installed on the relay platform, gathers the electrical energy generated by the turbine generators to generate an electrical power, and modulates the electrical power to be transmitted to a land power station.

Abstract: A gas detection system comprising a case having a hollow chamber, a gas input port, a gas output port, a radiation emitting device, and a photo detector. The gas input port may be disposed on the case for a test gas flowing into the chamber. The gas output port may be disposed on the case for the test gas flowing out of the chamber. The radiation emitting device may be disposed on the case and operated in a surface plasmonic mode or a waveguide mode for emitting a narrow bandwidth thermal radiation light source with multi-peak wavelengths into the chamber, wherein the multi-peak wavelengths may comprise a first absorption wavelength and a second absorption wavelength of the test gas. The photo detector may be disposed on the case for detecting light intensity of the light source passing through the chamber to determine the concentration of the test gas.

Abstract: A photo detector is disclosed. The photo detector comprises a substrate, a flat metal layer, a dielectric layer, a patterned metal layer, and a semiconductor film. The flat metal layer is formed on the substrate. The dielectric layer is formed on the flat metal layer. The patterned metal layer is formed on the dielectric layer. The patterned metal layer comprises a first interdigitated electrode and a second interdigitated electrode. The first interdigitated electrode is adjacent to the second interdigitated electrode. The semiconductor film is formed on the dielectric layer and covering the first interdigitated electrode and the second interdigitated electrode. When the semiconductor film receives an incident light, the flat metal layer and the patterned metal layer are operated in a localized surface plasmon mode or a waveguide mode for absorbing a certain narrow bandwidth radiation light of the incident light.