Abstract: A method for producing a magnetic transducer with a inductive write head having a multilayer coil with a high aspect ratio and a short yoke is provided. A damascene process is used for two coil layers and a conventional process for the third coil layer. The process of the invention allows a seed layer for the coil to be deposited on the side walls of the trenches for the first and second coil layers. In one embodiment the seed layer for the coil is preceded by an adhesion layer.

Abstract: A method is provided of smoothing the perturbations on a surface, in particular the surface of a magnetic head slider, the method comprising several steps. At least one air-bearing surface to be smoothed is exposed to an ion species generated from a defined source to form a beam of incident radiation. The beam has a linear axis emanating from the source and thus forms an angle of incident radiation with respect to the surface to be smoothed. The at least one surface is smoothed by exposing the surface(s) to be smoothed to the beam of incident radiation, where the angle of incident radiation is less than 90° relative to a vertical axis drawn perpendicular to the surface to be smoothed. To make a corrosion resistant magnetic head slider, the method further comprises coating the smoothed surface with a layer of amorphous carbon.

Abstract: Applicants disclose a method for producing a magnetic transducer with a inductive write head having a multilayer coil with a high aspect ratio and a short yoke. A damascene process is used for two coil layers and a conventional process for the third coil layer. The process of the invention allows a seed layer for the coil to be deposited on the side walls of the trenches for the first and second coil layers. In one embodiment the seed layer for the coil is preceded by an adhesion layer.

Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.

Abstract: A method for depositing a low dielectric constant film is provided. The low dielectric constant film includes alternating sublayers, which include at least one carbon-doped silicon oxide sublayer. The sublayers are deposited by a plasma process than includes pulses of RF power. The alternating sublayers are deposited from two or more compounds that include at least one organosilicon compound. The two or more compounds and processing conditions are selected such that adjacent sublayers have different and improved mechanical properties.

Abstract: Methods are provided for processing a substrate for depositing an adhesion layer having a low dielectric constant between two low k dielectric layers. In one aspect, the invention provides a method for processing a substrate including depositing a barrier layer on the substrate, wherein the barrier layer comprises silicon and carbon and has a dielectric constant less than 4, depositing a dielectric initiation layer adjacent the barrier layer, and depositing a first dielectric layer adjacent the dielectric initiation layer, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less.

Abstract: A method for forming a conductive feature in a low k dielectric layer comprising a layer of nanotubes and a low k material between the nanotubes is provided. The low k dielectric layer may be deposited on a seed layer as a blanket layer that is patterned such that a conductive feature may be formed in the low k dielectric layer. Alternatively, the low k dielectric layer may be selectively deposited on a patterned seed layer between a sacrificial layer of a substrate. The sacrificial layer may be removed and replaced with conductive material to form a conductive feature in the low k dielectric layer.

Abstract: The method for controlling the depth of polishing during a CMP process involves the deposition of a polishing stop layer at an appropriate point in the device fabrication process. The stop layer is comprised of a substance that is substantially more resistant to polishing with a particular polishing slurry that is utilized in the CMP process than a polishable material layer. Preferred stop layer materials of the present invention are tantalum and diamond-like carbon (DLC), and the polishable layer may consist of alumina. In one embodiment of the present invention the stop layer is deposited directly onto the top surface of components to be protected during the CMP process. A polishable layer is thereafter deposited upon the stop layer, and the CMP polishing step removes the polishable material layer down to the portions of the stop layer that are deposited upon the top surfaces of the components. The stop layer is thereafter removed from the top surface of the components.

Abstract: Methods and apparatus for protecting the dielectric layer sidewalls of openings, such as vias and trenches, in semiconductor substrates are provided. A pre-liner and a liner are deposited over the sidewalls of the openings as part of integrated processing sequences that either do not remove the photoresist until subsequent processing or remove the photoresist with a plasma etch that does not contaminate the sidewalls of the openings.

Abstract: Applicants disclose a method for producing a magnetic transducer with a inductive write head having a multilayer coil with a high aspect ratio and a short yoke. A damascene process is used for two coil layers and a conventional process for the third coil layer. The process of the invention allows a seed layer for the coil to be deposited on the side walls of the trenches for the first and second coil layers. In one embodiment the seed layer for the coil is preceded by an adhesion layer.

Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.

Abstract: During manufacture, a magnetoresistive sensor having a ferromagnetic free layer is commonly provided with a tantalum cap layer. The tantalum cap layer provides protection to the sensor during manufacture and then is typically removed after performing annealing. The removal of the tantalum cap with a fluorine reactive ion etch leaves low volatility tantalum/fluorine byproducts. The present invention provides a method of using an argon/hydrogen reactive ion etch to remove the tantalum/fluorine byproducts. The resulting sensor has far less damage resulting from the presence of the fluorine byproducts.

Abstract: A current-perpendicular-to the-plane (CPP) magnetoresistive device has two ferromagnetic layers separated by a nonmagnetic spacer layer with the free ferromagnetic layer having a central region of ferromagnetic material and nonmagnetic side regions formed of one or more oxides of the ferromagnetic material. One type of CPP device is a magnetic tunnel junction (MTJ) magnetoresistive read head in which the lower pinned layer has a width and height greater than the width and height, respectively, of the overlying central region of the upper free layer, with the side regions of the free layer being oxidized and therefore nonmagnetic. The MTJ read head is formed by patterning resist in the shape of the free layer central region over the stack of layers in the MTJ, ion milling or etching the stack down into the free layer, and then exposing the stack to oxygen to oxidize the ferromagnetic material in the side regions not covered by the resist.

Abstract: An etch barrier to be used in a photolithograph process is disclosed. A silicon rich etch barrier is deposited on a substrate using a low energy deposition technique. A diamond like carbon layer is deposited on the silicon rich etch barrier. Photoresist is then placed on this etch barrier DLC combination. To form photolithographic features, successive steps of oxygen and flourine reactive ion etching is used.

Abstract: The present invention presents a method for fabricating coil elements for magnetic write heads. A coil pattern is formed on a substrate using photolithographic techniques. The substrate is etched using reactive ion etching, creating a coil-shaped trench in the substrate. Thin film seed layers are deposited using ion beam deposition. The substrate is electroplated with metal filling the trenches with metal. The substrate is chemical mechanical polished to remove excess metal and planarize the air bearing surface of the write head.

Abstract: A method for depositing a low dielectric constant film having a dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided by reacting a gas mixture including one or more organosilicon compounds and one or more oxidizing gases. In one aspect, the organosilicon compound comprises a hydrocarbon component having one or more unsaturated carbon-carbon bonds, and in another aspect, the gas mixture further comprises one or more aliphatic hydrocarbon compounds having one or more unsaturated carbon-carbon bonds. The low dielectric constant film is post-treated after it is deposited. In one aspect, the post treatment is an electron beam treatment, and in another aspect, the post-treatment is an annealing process.

Abstract: A Damascene process is provided for manufacturing a coil structure for a magnetic head. During the manufacturing process, an insulating layer is initially deposited after which a photoresist layer is deposited. A silicon dielectric layer is then deposited on the photoresist layer. After masking the silicon dielectric layer, at least one channel is etched in the photoresist layer and the silicon dielectric layer. Then, a conductive seed layer is deposited in the at least one channel. The at least one channel is then ready to be filled with a conductive material and chemically/mechanically polished to define a coil structure.

Abstract: A method and apparatus for providing an aligned coil for an inductive head structure using a patterned seed layer is disclosed. The present invention uses an aligned process where the base plate imprint is fabricated on an electrically insulating layer and the reversed image is fabricated and etched into the coil insulation material, e.g., hard bake photoresist to alleviate the problems associated with complete ion removal of the seed layer between high aspect ratio coils. The present invention would also not be prone to plating non-uniformities (voids), and would not be subject to seed layer undercutting in a wet etch step process.

Abstract: Significant amounts of pattern distortion were found to be the result of reflowing borophosphosilicate glass (BPSG) and silicon dioxide shrinkage during high temperature junction anneals. In order to remedy this problem, a method for suppressing the pattern distortion by subjecting the wafer coated with BPSG and with silicon dioxide layers to a high temperature anneal before patterning is disclosed. The high temperature anneal densifies the undoped silicon dioxide before patterning, so that shrinkage of the undoped silicon dioxide does not affect the patterning steps.

Abstract: A layer of doped oxide glass is deposited on a semiconductor device in a chemical vapor deposition chamber by reacting gaseous sources of silicon, ozone and at least one boron or phosphorus dopant in a carrier gas, the ozone being present in a ratio of about 9-15 weight percent of the carrier gas. The deposited layer of doped oxide glass contains no greater than about 4 weight percent each of boron and phosphorus concentration and is annealed at a temperature no greater than about 700° C. for a time sufficient to soften and outgas any residual moisture in the oxide glass layer and level the upper surface to a desired degree.