Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.

Abstract: A microelectronic device comprises semiconductive pillar structure comprising a central portion, a first end portion, and a second end portion on a side of the central portion opposite the first end portion, the first end portion oriented at an angle with respect to the central portion and extending substantially parallel to the second end portion, a digit line contact on the central portion of the semiconductive pillar structure, a first storage node contact on the first end portion, and a second storage node contact on the second end portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A microelectronic device comprises semiconductive pillar structures each individually comprising a digit line contact region disposed laterally between two storage node contact regions. At least one semiconductive pillar structure of the semiconductive pillar structures comprises a first end portion comprising a first storage node contact region, a second end portion comprising a second storage node contact region, and a middle portion between the first end portion and the second end portion and comprising a digit line contact region, a longitudinal axis of the first end portion oriented at an angle with respect to a longitudinal axis of the middle portion. Related microelectronic devices, electronic systems, and methods are also described.

Abstract: A method of forming a microelectronic device structure comprises exposing a silicon structure to an etching chemistry at a first bias voltage of greater than about 500 V to form at least one initial trench between sidewalls of features formed in the silicon structure. The method also comprises exposing at least the sidewalls of the features to the etching chemistry at a second bias voltage of less than about 100 V to remove material from the sidewalls to expand the at least one initial trench and form at least one broader trench without substantially reducing a height of the features. Related apparatuses and electronic systems are also disclosed.

Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.

Abstract: A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.

Abstract: A chip bonding apparatus and method are disclosed. The chip bonding apparatus includes: at least one separation module for separating chips; at least one bonding module for bonding the chips a substrate; a transportation device for transporting the chips between the separation module and the bonding module, the transportation device including one or more guide tracks and one or more transportation carriers for retaining the chips, each of the guide tracks is provided thereon with at least one of the transportation carriers; and a control device for individually controlling the separation module, the bonding module and the transportation device. The chip bonding apparatus and method allows pickup, transportation and chip-to-substrate bonding of chips in batches with increased chip bonding yield and improved chip bonding accuracy.

Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.

Abstract: A circuit includes an inductor that receives a switched input voltage to provide an output for driving a load. A driver circuit drives the switched input voltage to the inductor in response to input pulses. A ramp circuit coupled to the inductor generates a ramp signal emulating current of the inductor. A control circuit generates the input pulses to control the driver circuit based on the ramp signal and the output for driving the load. A transient monitoring circuit monitors the output with respect to a predetermined threshold and adjusts the ramp circuit based on the output relative to the predetermined threshold to control the emulated current of the inductor to facilitate jitter and load transient performance.

Abstract: A flip-chip bonding device and method are disclosed. The bonding device includes: a supply unit (10) for separating a flip-chip (200) from a carrier (100) and providing the flip-chip (200), the supply unit (10) including flipping device (11); a transfer unit (20) for receiving the flip-chip (200) from the flipping device (11); a position adjustment unit (30) for adjusting the positions of flip-chips (200) on the transfer unit (20); a bonding unit (40) for bonding the flip-chips (200) on the transfer unit (20) onto a substrate (400); a transportation unit (50) for transporting the transfer unit (20); and a control unit (60) for controlling the movement of the preceding units. The transfer unit (20) is capable of receiving multiple flip-chips (200) and allows the flip-chips (200) to be bonded simultaneously. This can result in savings in bonding time and an improvement in throughput.

Abstract: A universal chip batch-bonding apparatus and method. The apparatus comprises a material pick-and-place area and a transfer work area. The material pick-and-place area comprises a blue tape pick-and-place area (110) for providing a chip (113) and a substrate pick-and-place area (120) for placing a substrate (123), the blue tape pick-and-place area (110) and the substrate pick-and-place area (120) being separately arranged at two ends of the transfer work area. The transfer work area sequentially comprises a chip pickup and separation area (210), a chip alignment and fine-tuning area (220), and a chip batch-bonding area (230) in a direction running from the blue tape pick-and-place area (110) to the substrate pick-and-place area (120).

Abstract: A batch bonding apparatus and bonding method. The bonding apparatus comprises: a chip supply unit (10) for providing a chip (60) to be bonded; a substrate supply unit (20) for providing a substrate; a transfer unit (40) for transferring the chip (60) between the chip supply unit (10) and the substrate supply unit (20); and a pickup unit (30) disposed above the chip supply unit (10), for picking up the chip (60) from the chip supply unit (10) and uploading the chip (60) to the transfer unit (40) after flipping a marked surface of the chip (60) in a required direction. In the present invention pickup of each chip is completed individually, but transfer processes and bonding processes can be carried out for multiple chips at the same time, greatly increasing yield.

Abstract: A semiconductor manufacturing apparatus, including a chip supply module used for providing a plurality of chips; a load plate supply module including a load plate and a load-plate motion platform used for holding the load plate; a chip transfer-loading module including a chip transfer-loading platform used for suctioning chips. The chip transfer-loading platform is used at a first position for transferring chips from the chip supply module. The chip transfer-loading platform carries the chips to a second position to bond the chips onto a load plate to form a bonding sheet. A packaging module is used for packaging the bonding plate on the load-plate motion platform to form a packaged chip.

Abstract: A chip bonding device is disclosed, including a first motion stage (110), a second motion stage (200), a chip pickup element (160), a transfer carrier (170), a chip adjustment system (1000), a bonding stage (420) and a control system (500). A chip bonding method is also disclosed, in which a set of chips are temporarily retained on the transfer carrier (170) and their positions on the transfer carrier (170) are accurately adjusted by using the chip adjustment system (1000), followed by bonding the chips on the transfer carrier (170) simultaneously onto the substrate (430). With this batch bonding approach, flip-chips can be bonded with greatly enhanced efficiency. Moreover, picking up and bonding chips in batches can balance times for chip picking up, fine chip position tuning and chip bonding, thereby ensuring high bonding accuracy while increasing the throughput.

Abstract: Methods, apparatuses, and systems related to forming a trench using a polymerizing radical material. An example method includes depositing a polymerizing radical material in a number of trenches formed over a substrate. The method further includes etching a portion of the deposited polymerizing radical material from the number of trenches. The example method further includes selectively etching into one of the number of trenches below the deposited polymerizing radical material. The one of the number of trenches is narrower than another of the number of trenches.

Abstract: A woven fabric for seats is made of warps and wefts woven into a pattern with a ratio of 1:1, wherein the warps density is 8 strips per unit length and the wefts density is 9.2 strips per unit length. The warps and wefts are both made of polyester and linen, wherein the polyester comprises 94% by weight and the linen comprises 6% by weight.

Abstract: An image processing method and an information processing device are provided. The information processing device may include a processor, which may be configured to: construct a three-dimensional face model based on a face object in a two-dimensional image; determine a correspondence between the constructed three-dimensional face model and the face object in the two-dimensional image; determine, based on the correspondence, an area of interest of a key point in the two-dimensional image using an area of interest near a corresponding key point in the three-dimensional face model; and extract an image feature from the determined area of interest in the two-dimensional image as an image feature of the key point.

Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.

Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.