Patents by Inventor Stephan Weber

Stephan Weber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5909143
    Abstract: In a circuit for determining and storing an average signal value, an overlaid dc voltage part is identified and subtracted from the actual signal. To this end, an all-pass filter with which both a transfer response is optimized and the error is minimized is utilized in a signal processing means in addition to a low-pass filter.
    Type: Grant
    Filed: August 19, 1997
    Date of Patent: June 1, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Weber
  • Patent number: 5883543
    Abstract: A circuit configuration for generating a reference potential includes a first transistor with an emitter connected to a ground potential and a base and a collector connected to one another. A second transistor has a base connected to the base of the first transistor. A first resistor is connected between the collector of the first transistor and an output terminal for picking up the reference potential. A second resistor is connected between the collector of the second transistor and the output terminal. A third resistor is connected between the emitter of the second transistor and the ground potential. A third transistor has a base connected to the collector of the second transistor and an emitter connected to the ground potential. A controlled current source is connected between a supply potential and the output terminal and is coupled on the input side to the collector of the third transistor. A capacitor is connected parallel to the second resistor.
    Type: Grant
    Filed: May 12, 1997
    Date of Patent: March 16, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Weber
  • Patent number: 5877649
    Abstract: A circuit arrangement for setting the operating point of at least one signal transistor (2) driven by alternating signals (1), with a current source (3) that is coupled to a supply potential (8) and to the control input of the signal transistor (2). A regulating transistor (4) has a load path coupled to a reference potential (9) and to the control input of the signal transistor (2). A resistor (5) is connected to the control input of the regulating transistor (4) and to the setting input of the signal transistor (2). A capacitor (6) is connected between the control input of the regulating transistor (4) and the reference potential (9).
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: March 2, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Weber
  • Patent number: 5834963
    Abstract: A circuit configuration for parameter adjustment has one or more first analog multipliers which receive an input signals and a control signal which cooresponds to a parameter, and which output output signals. A second multiplier, which is identical to the first multiplier, receives a first reference signal and a second control signal which corresponds to the first control signal, and outputs an output signal. A regulating device compares the output signal of the second multiplier with a second reference signal and derives the control signals therefrom.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: November 10, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Weber
  • Patent number: 5801582
    Abstract: Activatable/deactivatable circuit arrangement for producing an output reference voltage having a first transistor (T1) whose emitter is connected with a reference potential (M) and whose base and collector are connected with one another, having a second transistor (T2) whose base is connected with the base of the first transistor (T1), having a first resistor (R1) that is connected between the collector of the first transistor (T1) and an output terminal (U) for supplying the output reference voltage, having a second resistor (R2) that is connected between the collector of the second transistor (T2) and the output terminal (U), having a third resistor (R3) that is connected between the emitter of the second transistor (T2) and the reference potential (M), having a third transistor (T3) whose base is connected with the collector of the second transistor (T2) and whose emitter is connected with the reference potential (M), and having a controlled current source (T4) that is connected between a supply potential
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: September 1, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Weber