Abstract: The present invention describes the use of two semiconductor layers, a thin film (TF) layer and a bulk Si wafer layer, to make high density and high speed merged logic and memory IC chips. The memory cells use three-dimensional (3D) SRAM structures. Two kinds of 3D logic cells are disclosed. 3D form of the differential cascode voltage switch (DCVS) architecture, and a 3D form of the DCVS with pass gate (DCVSPG) logic architecture. A high density “system on chip” architecture is described. The high density is achieved by locating large PMOS transistors in the TF Si layer, and the fast NMOS transistors in a bulk Si wafer layer. A single process sequence to simultaneously make the logic and memory circuits on the IC chip is also described.

Abstract: A magneto-resistive memory cell and a method of forming the memory cell, includes a substrate, a single crystalline semiconductor diode formed in the substrate; and a first thin film conductor recessed in the substrate, and a second thin film conductor formed above a magnetic tunnel junction formed on the diode. The diode and the first thin film conductor share a non-planar common surface, such that the metal tunnel junction is a predetermined distance from the thin film conductor.

Abstract: A magneto-resistive memory cell and a method of forming the memory cell, includes a substrate, a single crystalline semiconductor diode formed in the substrate; and a first thin film conductor recessed in the substrate, and a second thin film conductor form above a magnetic tunnel junction formed on the diode. The diode and first thin film conductor share a non-planar common surface, such that the metal tunnel junction is a predetermined distance from the thin film conductor.

Abstract: Metal nitrate-containing precursor compounds are employed in atomic layer deposition processes to form metal-containing films, e.g. metal, metal oxide, and metal nitride, which films exhibit an atomically abrupt interface and an excellent uniformity.

Abstract: A semiconductor device such as a P-N or P-I-N junction diode, includes a first semiconductor layer having a first conductivity-type and being mounted over a metal address line, and a second semiconductor layer having a second conductivity-type and being mounted over the first semiconductor material. The diode preferably has a thickness of substantially no more than about 1 micron, and the diode includes a P-N junction confined to a thickness of less than about 0.1 micron. In the preferred embodiment the method comprises depositing a first semiconductor layer having a first conductivity type, depositing a second intrinsic layer, annealing to convert both layers to a polycrystalline layer, implanting ions of a second conductivity type into the second layer, and annealing to convert the second layer to a polycrystalline. The result is a diode having an ultra-sharp p-n junction.

Abstract: A semiconductor processing method is provided for growing a polycrystalline film by preferably chemical vapor deposition (CVD) from a suitable precursor gas or gases on a substrate which has been coated with seeds, preferably of nanocrystal size, of the semiconductor material. The structure of the nanocrystal seeds (not the substrate) serves as a template for the structure of the final polycrystalline film. The density of the seeds and the thickness of the grown polycrystalline film determine the grain size of the polycrystalline film at the surface of said film. Epitaxial CVD onto the seeds to produce the polycrystalline film avoids the recrystallization step generally necessary for the formation of a polycrystalline film, and thus allows for the growth of polycrystalline films at reduced temperatures.

Abstract: A variable index distributed mirror is disclosed used for high resolution reflective displays that are thin and have high resolution, reflectivity and contrast; wide viewing angle; low power consumption; and low voltage operation. The mirror is electrically switchable or variable between substantially transparent and reflective states. The mirror has alternating layers of a first material having a fixed refractive index, and a second material having a variable refractive index. The second material may be a nematic liquid crystal. The alternating layers are located between a pair of electrodes. The variable refractive index approximately equals the fixed refractive index in the transparent state and differs from the fixed refractive index in the reflective state. The variable refractive index varies in response to a signal applied across the electrodes. The mirror is tuned to a particular color to form a monochrome display.

Abstract: A thin film transistor is described incorporating a gate electrode, a gate insulating layer, a semiconducting channel layer deposited on top of the gate insulating layer, an insulating encapsulation layer positioned on the channel layer, a source electrode, a drain electrode and a contact layer beneath each of the source and drain electrodes and in contact with at least the channel layer, all of which are situated on a plastic substrate. By enabling the use of plastics having low glass transition temperatures as substrates, the thin film transistors may be used in large area electronics such as information displays and light sensitive arrays for imaging which are flexible, lighter in weight and more impact resistant than displays fabricated on traditional glass substrates. The thin film transistors are useful in active matrix liquid crystal displays where the plastic substrates are transparent in the visible spectrum.

Abstract: A structure is fabricated comprising a substrate, a dielectric layer formed over the substrate, and a single crystal layer of a compound formed over the dielectric layer. The single crystal layer is formed by the chemical reaction of at least a first element with an initial single crystal layer of a second element on the dielectric layer having an initial thickness of about 100 to about 10,000 angstroms.According to another aspect, a carbide single crystal layer is provided on a substrate by depositing carbon from a solid carbon source at a low rate and low temperature, followed by reacting the carbon with the underlying layer to convert it to the carbide.