Patents by Inventor Steve S. Chiang
Steve S. Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5825072Abstract: A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures.A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.Type: GrantFiled: February 14, 1996Date of Patent: October 20, 1998Assignee: Actel CorporationInventors: Yeochung Yen, Wenn-Jei Chen, Steve S. Chiang, Abdul Rahim Forouhi
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Patent number: 5813881Abstract: Two types of programmable elements, fuses and antifuses, are disclosed for forming an electrically programmable cable in one embodiment and a cable adapter in another embodiment. The cable and the cable adapter can be used for interconnecting a cable connector of a first configuration to a cable connector of a second configuration.Type: GrantFiled: October 7, 1994Date of Patent: September 29, 1998Assignee: Prolinx Labs CorporationInventors: Richard J. Nathan, James J. D. Lan, Steve S. Chiang
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Patent number: 5808351Abstract: Two types of programmable elements, fuses and antifuses, are disclosed for forming an electrically programmable burn-in board in one embodiment and an electrically programmable device-under-test (DUT) card in another embodiment. Both types of programmable elements can also be used in a reconfiguration device for interconnecting electrical contacts in a first configuration to electrical contacts in a second configuration. The various embodiments of this invention include, for example, a component socket, a socket adapter, a cable, a cable adapter, a scrambler card for a burn-in board and a device-under-test card for a burn-in board. A method for forming a fuse is also disclosed.Type: GrantFiled: October 7, 1994Date of Patent: September 15, 1998Assignee: Prolinx Labs CorporationInventors: Richard J. Nathan, James J. D. Lan, Steve S. Chiang, William H. Shepherd
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Patent number: 5767575Abstract: An integrated circuit (IC) package substrate has a dielectric layer and a micro filled via formed substantially in the center of a hole in the dielectric layer. The IC package substrate has at least one chip bonding pad and one ball attach pad that are electrically coupled to each other by the micro filled via. The micro filled via is formed of a material called a "micro filled via material" that includes a binding material and optionally includes a number of particles (between 0%-90% by volume) dispersed in the binding material. The binding material can be any material, such as a polymer that is either conductive or nonconductive. The particles can be formed of any conductive material, such as a conductive polymer or a conductive metal (e.g. copper or gold). An electrical conductor can be originally formed simply by contact between conductive particles located adjacent to each other.Type: GrantFiled: October 17, 1995Date of Patent: June 16, 1998Assignee: Prolinx Labs CorporationInventors: James J. D. Lan, Steve S. Chiang, Paul Y. F. Wu, William H. Shepherd, John Y. Xie, Hang Jiang
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Patent number: 5726482Abstract: A device-under-test card includes a matrix of fuses and/or antifuses formed as part of a multi-layered structure. The matrix of fuses and/or antifuses can be electrically programmed to connect any one of first electrical contacts to any one of second electrical contacts and so allows the device-under-test card to act as a junction between burn-in board traces couplable to signal drivers and/or receivers and burn-in board traces couplable to terminals of a device-under-test. The device-under-test card also includes a discrete resistor or alternatively a resistor ladder that permits a terminal of a device-under-test to be coupled to a power or ground terminal or to any combination of resistances including a short, in addition or as an alternative to any one of various signal drivers and/or receivers.Type: GrantFiled: October 7, 1994Date of Patent: March 10, 1998Assignee: Prolinx Labs CorporationInventors: Richard J. Nathan, James J. D. Lan, Steve S. Chiang, Paul Y. F. Wu, Robert Osann, Jr.
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Patent number: 5572409Abstract: Two types of programmable elements, fuses and antifuses, are disclosed for forming an electrically programmable socket adapter in one embodiment. The socket adapter can be used for interconnecting an electronic component having terminals in a first configuration to electrical contacts in printed circuit board.Type: GrantFiled: October 7, 1994Date of Patent: November 5, 1996Assignee: Prolinx Labs CorporationInventors: Richard J. Nathan, James J. D. Lan, Steve S. Chiang
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Patent number: 5537108Abstract: A programming method in accordance with this invention partitions traces of a fuse matrix into groups wherein each group contains traces connected to fuses that are to remain intact. All of the traces in a group are connected to a first voltage so that the fuses between traces in the group are subjected to minimal currents. In one embodiment, all of the traces that are not in the group connected to the first voltage are connected to a second voltage such that a programming current passes through fuses to be programmed. In an alternative embodiment, traces in a second group are connected to the second voltage and all of the remaining traces are shorted to each other.Type: GrantFiled: October 7, 1994Date of Patent: July 16, 1996Assignee: Prolinx Labs CorporationInventors: Richard J. Nathan, James J. D. Lan, Steve S. Chiang, Paul Y. F. Wu
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Patent number: 5525830Abstract: According to the present invention, planar layers of Nitride (first nitride layer), a-Si (first a-Si layer), Nitride (second Nitride layer) and a-Si (second a-Si layer) are laid down over a first metallization layer. A dielectric layer is then laid down on top of the second a-Si layer. A via is opened in the dielectric layer with an etch gas which attacks a small portion of the second a-Si layer which, in effect, serves as a sacrificial etch-stop layer. A titanium layer is laid down over the via and allowed to thermally react with the remainder of the second a-Si layer to form an electrically conductive titanium silicide region in the area of the via the thickness of the second a-Si layer. The reaction is self-limiting and stops at the second Nitride layer. Subsequently a second metallization layer is disposed over the via.Type: GrantFiled: October 12, 1994Date of Patent: June 11, 1996Assignee: Actel CorporationInventors: Wenn-Jei Chen, Steve S. Chiang, Frank W. Hawley
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Patent number: 5519248Abstract: A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures. A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.Type: GrantFiled: July 19, 1994Date of Patent: May 21, 1996Assignee: Actel CorporationInventors: Yeouchung Yan, Wenn-Jei Chen, Steve S. Chiang, Abdul R. Forouhi
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Patent number: 5485031Abstract: The present invention relates to a high performance, high reliability antifuse using conductive electrodes. The problem of switch-off of the programmed antifuses is solved by reducing the thermal conductivity of the conductive electrodes. This is achieved by using lower thermal conductivity conductors for the electrodes or by using thinner electrodes to increase thermal resistance. According to a first aspect of the present invention, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing conductive electrode materials having a relatively lower thermal conductivity than prior art electrode materials. According to a second aspect of the present invention, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing relatively thin electrodes, thus increasing their thermal resistance.Type: GrantFiled: November 22, 1993Date of Patent: January 16, 1996Assignee: Actel CorporationInventors: Guobiao Zhang, Chenming Hu, Steve S. Chiang
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Patent number: 5449947Abstract: A "read-disturb" resistant metal-to-metal antifuse includes a lower electrode comprising a first metal layer in a microcircuit structure. An inter-metal dielectric is disposed over the lower electrode and includes an antifuse aperture disposed therein. A first layer of antifuse material is disposed over exposed surface of the lower electrode in the antifuse aperture. A highly conductive layer is disposed over the first region of antifuse material and a second layer of antifuse material is disposed over the highly conductive layer. An upper electrode comprises a second metal layer disposed over the second layer of antifuse material. The first and second layers of antifuse material may comprise single-layer or multi-layer dielectric materials, amorphous silicon, or combinations of these materials.Type: GrantFiled: July 7, 1993Date of Patent: September 12, 1995Assignee: Actel CorporationInventors: Wenn-Jei Chen, Steve S. Chiang, Esam Elashmawi
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Patent number: 5412244Abstract: Electrically-programmable low-impedance antifuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The antifuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or metal having a barrier metal underneath. At least one of the two electrodes of each antifuse is highly-doped or implanted with arsenic such that high concentrations of arsenic exist at the interface between the electrode and the dielectric layer.Type: GrantFiled: April 29, 1993Date of Patent: May 2, 1995Assignee: Actel CorporationInventors: Esmat Z. Hamdy, Amr M. Mohsen, John L. McCollum, Shih-Ou Chen, Steve S. Chiang
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Patent number: 5381035Abstract: According to the present invention, planar layers of Nitride (first nitride layer), a-Si (first a-Si layer), Nitride (second Nitride layer) and a-Si (second a-Si layer) are laid down over a first metallization layer. A dielectric layer is then laid down on top of the second a-Si layer. A via is opened in the dielectric layer with an etch gas which attacks a small portion of the second a-Si layer which, in effect, serves as a sacrificial etch-stop layer. A titanium layer is laid down over the via and allowed to thermally react with the remainder of the second a-Si layer to form an electrically conductive titanium silicide region in the area of the via the thickness of the second a-Si layer. The reaction is self-limiting and stops at the second Nitride layer. Subsequently a second metallization layer is disposed over the via.Type: GrantFiled: December 21, 1993Date of Patent: January 10, 1995Inventors: Wenn-Jei Chen, Steve S. Chiang, Frank W. Hawley
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Patent number: 5369054Abstract: A static-charge protection device for an antifuse includes an additional second-sized aperture smaller in area than the antifuse apertures disposed in the same inter-electrode dielectric layer. Antifuse material is disposed in the second-sized aperture, and the upper electrode extends over the second aperture as well as the first aperture. A preferred process for fabricating the protection device utilizes the step of forming the smaller apertures and forming their antifuse material layers simultaneously with forming the antifuse apertures.A static-charge protection device for an antifuse device includes an additional second-sized aperture larger in area than the first-sized antifuse apertures. Metal plug material is deposited and etched back. A layer of amorphous silicon antifuse material is formed and defined over the first and second sized apertures, the portion formed over the larger partially filled antifuse protection device cell being thinner.Type: GrantFiled: July 7, 1993Date of Patent: November 29, 1994Assignee: Actel CorporationInventors: Yeouchung Yen, Wenn-Jei Chen, Steve S. Chiang, Abdul R. Forouhi
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Patent number: 5316971Abstract: A method for programming antifuses having at least one metal electrode includes the steps of providing an antifuse programming voltage source, capable of supplying alternating positive and negative programming voltage pulses; providing a programming path from the antifuse programming voltage source to the antifuse; and providing a selected number of alternating positive and negative programming voltage pulses to the antifuse through the programming path.Type: GrantFiled: September 18, 1992Date of Patent: May 31, 1994Assignee: Actel CorporationInventors: Steve S. Chiang, Wenn-Jei Chen, Esam Elashmawi
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Patent number: 5266829Abstract: Electrically-programmable low-impedance anti-fuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The electrically-programmable low-impedance antifuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer, which, in a preferred embodiment includes a first layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide, is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or a metal having a barrier metal underneath.Type: GrantFiled: July 8, 1992Date of Patent: November 30, 1993Assignee: Actel CorporationInventors: Esmat Z. Hamdy, Amr M. Mohsen, John L. McCullum, Shih-Ou Chen, Steve S. Chiang
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Patent number: 5130777Abstract: The present invention includes four approaches to reduce the unintended programming of antifuses while programming selected antifuses and to decrease the programming time. The first approach includes circuitry to maintain the voltage placed on unselected antifuses at a constant level by use of a voltage source. According to the second approach, a resistor is included in series with the voltage source. According to the third approach, a diode is included in series with the voltage source. According to the fourth approach, a MOS implementation of a diode is included in series with the voltage source.Type: GrantFiled: January 4, 1991Date of Patent: July 14, 1992Assignee: Actel CorporationInventors: Douglas C. Galbraith, Steve S. Chiang, Abdelshafy A. Eltoukhy, Esmat Z. Hamdy
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Patent number: 5126282Abstract: An already- programmed anti-fuse is DC soaked by passing DC current through the anti-fuse from a DC voltage source applied across the electrodes of the anti-fuse. The anti-fuse resistance is lower when the DC voltage being applied such that the positive end of the voltage source is applied to the electrode having the higher arsenic concentration.An already programmed anti-fuse is AC soaked, by passing alternating current pulses through the anti-fuse from an AC voltage source applied across the anti-fuse electrodes. This AC soak may even be applied following the controlled polarity DC soak disclosed herein. The AC soaked anti-fuse resistance is even lower than DC soaked anti-fuse under the same soak current level.Type: GrantFiled: May 16, 1990Date of Patent: June 30, 1992Assignee: Actel CorporationInventors: Steve S. Chiang, Esam Elashmawi, Theodore M. Speers, LeRoy Winemberg
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Patent number: 5111262Abstract: A structure used to protect a dielectric is disclosed wherein a transistor located nearby the dielectric is connected in series with a conductor overlying the fragile dielectric such that the transistor gate will accumulate charge along with the conductive material over the fragile dielectric. After fabrication and during normal circuit operation, this transistor device remians in an off state, isolating the fragile dielectric node from other circuitry. In an alternate embodiment the protection transistor is a floating gate depletion device, which would always be on until the circuit is activated. At the time the circuit is activated, the device is turned off by trapping electrons on the gate by avalanching a junction associated with it. In a preferred embodiment, a buried contact if formed after the conductor overlying the dielectric, usually polysilicon, is formed. This buried contact connects the conductor to the discharging transistor.Type: GrantFiled: November 22, 1989Date of Patent: May 5, 1992Assignee: Actel CorporationInventors: Shih-Ou Chen, John L. McCollum, Steve S. Chiang
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Patent number: 5087958Abstract: A misalignment tolerant antifuse includes a lower electrode, bounded by a relatively thick first insulating layer, an upper electrode separated from the lower electrode by a second insulating layer having a thickness less than that of the first insulating layer, a pair of antifuse window regions in the second insulating layer, abutting the first insulating layer on opposite sides of the lower electrode, the insulating material in the window regions being thinner than the remainder of the second insulating layer, and an upper electrode disposed above the second insulating layer and lying over the pair of regions and at least a portion of the first insulating layer.Type: GrantFiled: November 5, 1990Date of Patent: February 11, 1992Assignee: Actel CorporationInventors: Shih-Oh Chen, Steve S. Chiang, Gregory W. Bakker