Patents by Inventor Steven Leslie Pope
Steven Leslie Pope has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11245580Abstract: A network interface device comprises a plurality of components configured to process a flow of data one after another. A control component is configured to provide one or more control messages in said flow, said one or more control message being provided to said plurality of components one after another such that a configuration of one or more of said components is changed.Type: GrantFiled: September 28, 2018Date of Patent: February 8, 2022Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Patent number: 11210148Abstract: A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.Type: GrantFiled: October 11, 2019Date of Patent: December 28, 2021Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, Derek Edward Roberts, David James Riddoch, Greg Law, Steve Grantham, Matthew Slattery
-
Publication number: 20210258284Abstract: A network interface device having a hardware module comprising a plurality of processing units. Each of the plurality of processing units is associated with its own at least one predefined operation. At a compile time, the hardware module is configured by arranging at least some of the plurality of processing units to perform their respective at least one operation with respect to a data packet in a certain order so as to perform a function with respect to that data packet. A compiler is provide to assign different processing stages to each processing unit. A controller is provided to switch between different processing circuitry on the fly so that one processing circuitry may be used whilst another is being compiled.Type: ApplicationFiled: April 30, 2021Publication date: August 19, 2021Applicant: Xilinx, Inc.Inventors: Steven Leslie Pope, Neil Turton, David James Riddoch, Dmitri Kitariev, Ripduman Sohan, Derek Edward Roberts
-
Patent number: 11082364Abstract: A method comprises receiving at a compiler a bit file description and a program, said bit file description comprising a description of routing of a part of a circuit. The method comprises compiling the program using said bit file description to output a bit file for said program.Type: GrantFiled: April 25, 2019Date of Patent: August 3, 2021Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, Neil Turton, David James Riddoch, Dmitri Kitariev, Ripduman Sohan, Derek Edward Roberts
-
Patent number: 11012411Abstract: A network interface device having a hardware module comprising a plurality of processing units. Each of the plurality of processing units is associated with its own at least one predefined operation. At a compile time, the hardware module is configured by arranging at least some of the plurality of processing units to perform their respective at least one operation with respect to a data packet in a certain order so as to perform a function with respect to that data packet. A compiler is provide to assign different processing stages to each processing unit. A controller is provided to switch between different processing circuitry on the fly so that one processing circuitry may be used whilst another is being compiled.Type: GrantFiled: November 5, 2018Date of Patent: May 18, 2021Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, Neil Turton, David James Riddoch, Dmitri Kitariev, Ripduman Sohan, Derek Edward Roberts
-
Patent number: 10999246Abstract: A logic device and method are provided for intercepting a data flow from a network source to a network destination. A data store holds a set of compliance rules and corresponding actions. A packet inspector is configured to inspect the intercepted data flow and identify from the data store a compliance rule associated with the inspected data flow. A packet filter is configured to, when the data flow is identified as being associated with a compliance rule, carry out an action with respect to the data flow corresponding to the compliance rule.Type: GrantFiled: September 4, 2018Date of Patent: May 4, 2021Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, Derek Edward Roberts, David James Riddoch
-
Patent number: 10924483Abstract: Roughly described, a network interface device receiving data packets from a computing device for transmission onto a network, the data packets having a certain characteristic, transmits the packet only if the sending queue has authority to send packets having that characteristic. The data packet characteristics can include transport protocol number, source and destination port numbers, source and destination IP addresses, for example. Authorizations can be programmed into the NIC by a kernel routine upon establishment of the transmit queue, based on the privilege level of the process for which the queue is being established. In this way, a user process can use an untrusted user-level protocol stack to initiate data transmission onto the network, while the NIC protects the remainder of the system or network from certain kinds of compromise.Type: GrantFiled: February 5, 2018Date of Patent: February 16, 2021Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch, Ching Yu, Derek Edward Roberts
-
Publication number: 20210026689Abstract: A network interface device has an input configured to receive data from a network. The data is for one of a plurality of different applications. The network interface device also has at least one processor configured to determine which of a plurality of available different caches in a host system the data is to be injected by accessing to a receive queue comprising at least one descriptor indicating a cache location in one of said plurality of caches to which data is to be injected, wherein said at least one descriptor, which indicates the cache location, has an effect on subsequent descriptors of said receive queue until a next descriptor indicates another cache location. The at least one processor is also configured to cause the data to be injected to the cache location in the host system.Type: ApplicationFiled: October 13, 2020Publication date: January 28, 2021Applicant: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Patent number: 10838763Abstract: A network interface device has an input configured to receive data from a network. The data is for one of a plurality of different applications. The network interface device also has at least one processor configured to determine which of a plurality of available different caches in a host system the data is to be injected by accessing to a receive queue comprising at least one descriptor indicating a cache location in one of said plurality of caches to which data is to be injected, wherein said at least one descriptor, which indicates the cache location, has an effect on subsequent descriptors of said receive queue until a next descriptor indicates another cache location. The at least one processor is also configured to cause the data to be injected to the cache location in the host system.Type: GrantFiled: July 12, 2019Date of Patent: November 17, 2020Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Publication number: 20200344180Abstract: A method comprises receiving at a compiler a bit file description and a program, said bit file description comprising a description of routing of a part of a circuit. The method comprises compiling the program using said bit file description to output a bit file for said program.Type: ApplicationFiled: April 25, 2019Publication date: October 29, 2020Applicant: Xilinx, Inc.Inventors: Steven Leslie Pope, Neil Turton, David James Riddoch, Dmitri Kitariev, Ripduman Sohan, Derek Edward Roberts
-
Publication number: 20200218587Abstract: A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.Type: ApplicationFiled: October 11, 2019Publication date: July 9, 2020Applicant: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, Derek Edward Roberts, David James Riddoch, Greg Law, Steve Grantham, Matthew Slattery
-
Patent number: 10666777Abstract: A method of transmitting data for use at a data processing system and network interface device, the data processing system being coupled to a network by the network interface device, the method comprising: forming a message template in accordance with a predetermined set of network protocols, the message template including at least in part one or more protocol headers; forming an application layer message in one or more parts; updating the message template with the parts of the application layer message; processing the message template in accordance with the predetermined set of network protocols so as to complete the protocol headers; and causing the network interface device to transmit the completed message over the network.Type: GrantFiled: May 15, 2019Date of Patent: May 26, 2020Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch, Kieran Mansley
-
Patent number: 10659555Abstract: A network interface device has an input configured to receive data from a network. The data is for one of a plurality of different applications. The applications may be supported by a host system. The network interface device is configured to determine which of a plurality of available different caches in a host the data is to be injected. The network interface device will then inject the determined cached with the received data.Type: GrantFiled: July 17, 2018Date of Patent: May 19, 2020Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Patent number: 10652367Abstract: A method of transmitting data for use at a data processing system and network interface device, the data processing system being coupled to a network by the network interface device, the method comprising: forming a message template in accordance with a predetermined set of network protocols, the message template including at least in part one or more protocol headers; forming an application layer message in one or more parts; updating the message template with the parts of the application layer message; processing the message template in accordance with the predetermined set of network protocols so as to complete the protocol headers; and causing the network interface device to transmit the completed message over the network.Type: GrantFiled: May 15, 2019Date of Patent: May 12, 2020Assignee: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch, Kieran Mansley
-
Publication number: 20200145376Abstract: A network interface device having a hardware module comprising a plurality of processing units. Each of the plurality of processing units is associated with its own at least one predefined operation. At a compile time, the hardware module is configured by arranging at least some of the plurality of processing units to perform their respective at least one operation with respect to a data packet in a certain order so as to perform a function with respect to that data packet. A compiler is provide to assign different processing stages to each processing unit. A controller is provided to switch between different processing circuitry on the fly so that one processing circuitry may be used whilst another is being compiled.Type: ApplicationFiled: November 5, 2018Publication date: May 7, 2020Applicant: Xilinx, Inc.Inventors: Steven Leslie Pope, Neil Turton, David James Riddoch, Dmitri Kitariev, Ripduman Sohan, Derek Edward Roberts
-
Publication number: 20200106668Abstract: A network interface device comprises a plurality of components configured to process a flow of data one after another. A control component is configured to provide one or more control messages in said flow, said one or more control message being provided to said plurality of components one after another such that a configuration of one or more of said components is changed.Type: ApplicationFiled: September 28, 2018Publication date: April 2, 2020Applicant: Xilinx, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Publication number: 20200104269Abstract: A network interface device comprises a plurality of components configured to process a flow of data one after another. A control component is configured to provide one or more control messages in said flow, said one or more control message being provided to said plurality of components one after another such that a configuration of one or more of said components is changed.Type: ApplicationFiled: July 15, 2019Publication date: April 2, 2020Applicant: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Publication number: 20200028930Abstract: A network interface device has an input configured to receive data from a network. The data is for one of a plurality of different applications. The applications may be supported by a host system. The network interface device is configured to determine which of a plurality of available different caches in a host the data is to be injected. The network interface device will then inject the determined cached with the received data.Type: ApplicationFiled: July 17, 2018Publication date: January 23, 2020Applicant: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Publication number: 20200026557Abstract: A network interface device has an input configured to receive data from a network. The data is for one of a plurality of different applications. The network interface device also has at least one processor configured to determine which of a plurality of available different caches in a host system the data is to be injected by accessing to a receive queue comprising at least one descriptor indicating a cache location in one of said plurality of caches to which data is to be injected, wherein said at least one descriptor, which indicates the cache location, has an effect on subsequent descriptors of said receive queue until a next descriptor indicates another cache location. The at least one processor is also configured to cause the data to be injected to the cache location in the host system.Type: ApplicationFiled: July 12, 2019Publication date: January 23, 2020Applicant: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, David James Riddoch
-
Publication number: 20190370090Abstract: A method and data processing system are provided. The data processing system comprises an application associated with a plurality of sockets and a sub-system for making data available to the application via the plurality of sockets. The sub-system is configured to provide in response to a request from the application: an indication of events that have occurred on one or more of the plurality of sockets; and an indication of an order in which the events should be processed.Type: ApplicationFiled: August 14, 2019Publication date: December 5, 2019Applicant: Solarflare Communications, Inc.Inventors: Steven Leslie Pope, David James Riddoch, Kieran Mansley, Sian Cathryn James