Patents by Inventor Steven M Bennett

Steven M Bennett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977874
    Abstract: Methods and systems for monitoring use, determining risk, and pricing insurance policies for a vehicle having one or more autonomous or semi-autonomous operation features are provided. According to certain aspects, an identity of a vehicle operator may be determined and a vehicle operator profile and/or operating data regarding autonomous operation features of the vehicle may be received after the vehicle operator opts into a rewards program and agrees to share their data. Autonomous operation and vehicle operator risk levels associated with operation of the autonomous or semi-autonomous vehicle may be determined. Based upon the risk levels and/or comparison thereof, one or more autonomous operation features may be disengaged. A preparedness level of the vehicle operator to assume or reassume control of operating the vehicle is determined prior to disengagement. If satisfactory, an alert is presented to the vehicle operator prior to disengagement of the autonomous operation features.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: May 7, 2024
    Assignee: State Farm Mutual Automobile Insurance Company
    Inventors: Brian Mark Fields, Chien Che Huang, Mohamed A. Wazeer, Shawn C. Bennett, Steven C. Cielocha, Ronny S. Bryant, Stephen Kohaus, Terry Quakenbush, Richard A. Novak, Aaron Scott Chan, Craig M. Main, Weixin Wu, Torri Wollenschlager, Carol Marie Csanda, Stacey Gorsuch, Todd Binion
  • Publication number: 20240125719
    Abstract: A defined peak region residing between about 3.2 and 3.4 ppm of a proton NMR spectrum of an in vitro biosample is electronically evaluated to determine a level of trimethylamine-N-oxide (“TMAO”). The biosample may be any suitable biosamples including human serum with a normal biologic range of between about 1-50 ?M or urine with a normal biologic range of between about 0-1000 ?M.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 18, 2024
    Applicant: Liposcience, Inc.
    Inventors: James D. Otvos, Elias J. Jeyarajah, Justyna E. Wolak-Dinsmore, Thomas M. O'Connell, Dennis W. Bennett, Steven P. Matyus, Stanley L. Hazen
  • Patent number: 11954482
    Abstract: According to certain aspects, a computer-implemented method for operating an autonomous or semi-autonomous vehicle may be provided. With the customer's permission, an identity of a vehicle operator may be identified and a vehicle operator profile may be retrieved. Operating data regarding autonomous operation features operating the vehicle may be received from vehicle-mounted sensors. When a request to disable an autonomous feature is received, a risk level for the autonomous feature is determined and compared with a driver behavior setting for the autonomous feature stored in the vehicle operator profile. Based upon the risk level comparison, the autonomous vehicle retains control of vehicle or the autonomous feature is disengaged depending upon which is the safer driver—the autonomous vehicle or the vehicle human occupant. As a result, unsafe disengagement of self-driving functionality for autonomous vehicles may be alleviated.
    Type: Grant
    Filed: October 11, 2022
    Date of Patent: April 9, 2024
    Assignee: State Farm Mutual Automobile Insurance Company
    Inventors: Brian Mark Fields, Chien Che Huang, Mohamed A. Wazeer, Shawn C. Bennett, Steven Cielocha, Ronny S. Bryant, Stephen Kohaus, Terry Quakenbush, Richard A. Novak, Aaron Scott Chan, Craig M. Main, Weixin Wu, Torri Wollenschlager, Carol Marie Csanda, Stacey Gorsuch, Todd Binion
  • Patent number: 10747682
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: August 18, 2020
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Patent number: 10599455
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a hardware processor including event circuit to recognize a virtualization event, and evaluation circuit to determine whether to transfer control of the apparatus from a child guest to a parent guest in response to the virtualization event, wherein the child guest and the parent guest each include a bit per virtualization event to indicate whether the parent guest is to gain control when the virtualization event occurs.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: March 24, 2020
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Publication number: 20190121751
    Abstract: A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to host-physical memory of the host machine.
    Type: Application
    Filed: September 18, 2018
    Publication date: April 25, 2019
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Rajesh Sankaran Madukkarumukumana, Richard Uhlig, Lawrence Smith, III, Scott D. Rodgers
  • Publication number: 20190018695
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a hardware processor including event circuit to recognize a virtualization event, and evaluation circuit to determine whether to transfer control of the apparatus from a child guest to a parent guest in response to the virtualization event, wherein the child guest and the parent guest each include a bit per virtualization event to indicate whether the parent guest is to gain control when the virtualization event occurs.
    Type: Application
    Filed: May 14, 2018
    Publication date: January 17, 2019
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Patent number: 10180911
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: January 15, 2019
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Patent number: 10114767
    Abstract: A processor including a virtualization system of the processor with a memory virtualization support system to map a reference to guest-physical memory made by guest software executable on a virtual machine which in turn is executable on a host machine in which the processor is operable to a reference to host-physical memory of the host machine.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 30, 2018
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Rajesh Sankaran Madukkarumukumana, Richard UhligQ, Lawrence Smith, III, Scott D. Rodgers
  • Publication number: 20180196758
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20180196759
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Patent number: 10002012
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a hardware processor including event circuit to recognize a virtualization event, and evaluation circuit to determine whether to transfer control of the apparatus from a child guest to a parent guest in response to the virtualization event, wherein the child guest and the parent guest each include a bit per virtualization event to indicate whether the parent guest is to gain control when the virtualization event occurs.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: June 19, 2018
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Patent number: 9971615
    Abstract: In one embodiment, a predefined behavior of a virtual machine monitor (VMM) with respect to one or more virtual machines (VMs) is identified, and processor-managed resources associated with the one or more VMs are utilized based on the predefined behavior of the VMM.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 15, 2018
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Richard Uhlig, Xiang Zou, Lawrence Smith, III, Scott Rodgers
  • Publication number: 20180060247
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Application
    Filed: June 12, 2017
    Publication date: March 1, 2018
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Patent number: 9785485
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and evaluation logic. The event logic is to recognize a virtualization event. The evaluation logic is to determine whether to transfer control from a child guest to a parent guest in response to the virtualization event.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: October 10, 2017
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Patent number: 9678890
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: June 13, 2017
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard A Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg
  • Publication number: 20170052832
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a hardware processor including event circuit to recognize a virtualization event, and evaluation circuit to determine whether to transfer control of the apparatus from a child guest to a parent guest in response to the virtualization event, wherein the child guest and the parent guest each include a bit per virtualization event to indicate whether the parent guest is to gain control when the virtualization event occurs.
    Type: Application
    Filed: August 2, 2016
    Publication date: February 23, 2017
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Patent number: 9442868
    Abstract: Embodiments of apparatuses, methods, and systems for delivering an interrupt to a virtual processor are disclosed. In one embodiment, an apparatus includes an interface to receive an interrupt request, delivery logic, and exit logic. The delivery logic is to determine, based on an attribute of the interrupt request, whether the interrupt request is to be delivered to the virtual processor. The exit logic is to transfer control to a host if the delivery logic determines that the interrupt request is not to be delivered to the virtual processor.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: September 13, 2016
    Assignee: Intel Corporation
    Inventors: Gilbert Neiger, Rajesh Sankaran Madukkarumukumana, Richard A. Uhlig, Udo Steinberg, Sebastian Schoenberg, Sridhar Muthrasanallur, Steven M. Bennett, Andrew V. Anderson, Erik C. Cota-Robles
  • Patent number: 9405565
    Abstract: Embodiments of apparatuses and methods for processing virtualization events in a layered virtualization architecture are disclosed. In one embodiment, an apparatus includes a event logic and evaluation logic. The event logic is to recognize a virtualization event. The evaluation logic is to determine whether to transfer control from a child guest to a parent guest in response to the virtualization event.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: August 2, 2016
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Dion Rodgers, Richard A. Uhlig, Lawrence O. Smith, Barry E. Huntley
  • Patent number: 9372806
    Abstract: A processor including logic to execute an instruction to synchronize a mapping from a physical address of a guest of a virtualization based system (guest physical address) to a physical address of the host of the virtualization based system (host physical address), and stored in a translation lookaside buffer (TLB), with a corresponding mapping stored in an extended paging table (EPT) of the virtualization based system.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: June 21, 2016
    Assignee: Intel Corporation
    Inventors: Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard A Uhlig, Scott Dion Rodgers, Rajesh M. Sankaran, Camron Rust, Sebastian Schoenberg