Patents by Inventor Steven Mark Thurber

Steven Mark Thurber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8935333
    Abstract: An apparatus and method for implementing multicast in system area network channel adapters are provided. With the apparatus and method, a multicast packet is received in a channel adapter of an end node. The channel adapter determines which local queue pairs are party of the multicast group identified by a destination local identifier in the multicast data packet. Based on this determination, the channel adapter replicates the data packet and delivers a copy of the data packet to each local queue pair that is part of the multicast group.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: January 13, 2015
    Assignee: International Business Machines Corporation
    Inventors: Bruce Leroy Beukema, Gregory Francis Pfister, Renato John Recio, Steven Mark Thurber
  • Patent number: 8782024
    Abstract: A mechanism is provided for sharing resources among logical partitions in a logical partitioned data processing system and for managing the changes to resources in such a way that the sharing operating systems are able to handle the various transitions in a graceful manner. Four hypervisor functions plus a specific return code manage the granting of access of resources owned by one partition to another (client) partition, accepting of granted resources by client partitions, returning of granted resources by client partitions, and rescinding of access by the owning partition. These four hypervisor functions are invoked either explicitly by the owning and client partitions or automatically by the hypervisor in response to partition termination. The hypervisor functions provide the needed infrastructure to manage the sharing of logical resources among partitions.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: July 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Bruce G. Mealey, Steven Mark Thurber
  • Patent number: 8725914
    Abstract: An apparatus, program product and method dynamically bind Message Signaled Interrupt (MSI) resources shared by a plurality of clients to an interrupt facility in an MSI-capable computer. In addition, management of such bindings may be implemented using a platform independent interrupt manager capable of managing multiple MSI bindings between MSI resources to an interrupt facility, and interfaced with an underlying hardware platform of a computer through platform-specific encapsulation program code.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: May 13, 2014
    Assignee: International Business Machines Corporation
    Inventors: Sean Thomas Brownlow, James Arthur Lindeman, Gregory Michael Nordstrom, John Ronald Oberly, III, John Thomas O'Quin, II, Steven Mark Thurber, Timothy Joseph Torzewski
  • Patent number: 8621120
    Abstract: A mechanism for temporarily stalling selected Direct Memory Access (DMA) operations in a physical input/output (I/O) adapter in order to permit migration of data between physical pages that are subject to access by the physical I/O adapter. When a request for a DMA to a physical page in system memory is received from an I/O adapter, a migration in progress (MIP) bit in a translation control entry (TCE) pointing to the physical page is examined, wherein the MIP bit indicates whether migration of the physical page referenced in the TCE to another location in system memory is currently in progress. If the MIP bit indicates a migration of the physical page is in progress, the DMA from the I/O adapter is temporarily stalled while other DMA operations from other I/O adapters to other physical pages in system memory are allowed to continue.
    Type: Grant
    Filed: April 17, 2006
    Date of Patent: December 31, 2013
    Assignee: International Business Machines Corporation
    Inventors: Carl Alfred Bender, Patrick Allen Buckland, Steven Mark Thurber, Adalberto Guillermo Yanes
  • Patent number: 8213294
    Abstract: A computer implemented method, apparatus and mechanism for recovery of an I/O fabric that has become terminally congested or deadlocked due to a failure which causes buffers/queues to fill and thereby causes the root complexes to lose access to their I/O subsystems. Upon detection of a terminally congested or deadlocked transmit queue, access to such queue by other root complexes is suspended while each item in the queue is examined and processed accordingly. Store requests and DMA read reply packets in the queue are discarded, and load requests in the queue are processed by returning a special completion package. Access to the queue by the root complexes is then resumed.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Thomas Schlipf, Steven Mark Thurber
  • Patent number: 8122225
    Abstract: A “LUN Table” enables Logical Unit Number (LUN) mapping/masking within an Input/Output Virtualization IOV adapter included in a Serial Attached Small Computer System Interface (“SAS” or “Serial Attached SCSI”). A plurality of System Images (“SI”) share block storage through the SAS. The IOV adapter includes one or more Virtual Functions (VF), a Physical Function (PF), and a LUN Table within the PF. The VF allows each SI to communicate I/0 requests with a storage device through the PF. The LUN Table maps the I/0 requests to unique locations within the storage device. Each SI is isolated from all other SIs. Interference between each SI is avoided. A VIOS or a LUN mapping/masking SAN are not required. I/0 latency, processor overhead and storage cost are improved over prior LUN mapping/masking solutions.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Renato J. Recio, Aaron Ches Brown, Douglas M. Freimuth, James A. Pafumi, Steven Mark Thurber
  • Patent number: 7886086
    Abstract: A method and an apparatus are provided for restricting input/output device peer-to-peer operations in a data processing system to improve reliability, availability, and serviceability. A peer-to-peer (P2P) control logic is provided to perform a lookup of P2P lookup table entries. Each P2P lookup table entry comprises bus, device and function number fields, optional control fields, and an accept/reject bit. Upon receiving a communication request from a requesting I/O device, P2P control logic implemented in either a logical bridge or an I/O device identifies the requester ID of the request and determines if a match exists in the P2P lookup table entries. If a match is found and the accept/reject bit is enabled, I/O operations can be received from the requester.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: February 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Maneesh Sharma, Steven Mark Thurber
  • Patent number: 7827343
    Abstract: The present invention provides a method and apparatus for processing a bus protocol packet in order to provide accelerator support. A component receives a bus protocol packet having a requester identifier. The component looks up an agent routing field. The component routes the bus protocol packet to an accelerator agent based on the agent routing field. It processes the bus protocol packet at the accelerator agent based on the agent routing field.
    Type: Grant
    Filed: September 20, 2007
    Date of Patent: November 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Bradly George Frey, Steven Mark Thurber, Andrew Henry Wottreng
  • Patent number: 7734842
    Abstract: A computer-implemented method, apparatus, and computer program product are disclosed for managing direct memory access (DMA) write page faults using a pool of substitute pages. A computer system platform resolves a DMA write page fault for a page that is dedicated to an Input/Output (I/O) adapter. The I/O adapter attempts to write DMA data to the page. A determination is made that the page is unavailable for writing. The DMA data is then written to data locations in a substitute page that was selected from the pool of substitute pages. A flag is then set in a flag location for each one of the data locations. The flag locations correspond to the data locations. When a flag is set, the flag indicates that DMA write data is present in the data location that corresponds to that flag's flag location.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Steven Mark Thurber
  • Patent number: 7734843
    Abstract: A computer-implemented method, apparatus, and computer program product are disclosed for migrating data from a source physical page to a destination physical page. A migration process is begun to migrate data from the source physical page to the destination physical page which causes a host bridge to enter a first state. The host bridge then suspends processing of direct memory access operations when the host bridge is in the first state. The data is migrated from the source physical page to the destination physical page while the host bridge is in the first state.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Carl Alfred Bender, Patrick Allen Buckland, Steven Mark Thurber, Adalberto Guillermo Yanes
  • Publication number: 20100042805
    Abstract: A “LUN Table” enables Logical Unit Number (LUN) mapping/masking within an IOV adapter included in a Serial Attached Small Computer System Interface (“SAS” or “Serial Attached SCSI”). A plurality of System Images (“SI”) share block storage through the SAS. The IOV adapter includes one or more Virtual Functions (VF), a Physical Function (PF), and a LUN Table within the PF. The VF allows each SI to communicate I/0 requests with a storage device through the PF. The LUN Table maps the I/0 requests to unique locations within the storage device. Each SI is isolated from all other SIs. Interference between each SI is avoided. A VIOS or a LUN mapping/masking SAN are not required. I/0 latency, processor overhead and storage cost are improved over prior LUN mapping/masking solutions.
    Type: Application
    Filed: August 12, 2008
    Publication date: February 18, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Renato J. Recio, Aaron Ches Brown, Douglas M. Freimuth, James A. Pafumi, Steven Mark Thurber
  • Patent number: 7636772
    Abstract: A method in a network computing system for managing configuration information for a set of components in a network computing system. The configuration information is stored for the set of components in the network computing system to form stored configuration information. In the depicted examples, the components may be nodes or devices within nodes. Current configuration is obtained in response to a power cycle. The current configuration information is compared with the stored configuration information to form a comparison. The stored configuration information is updated if a difference is present in the comparison. The stored configuration information is used to configure the components when a power cycle occurs.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: December 22, 2009
    Assignee: International Business Machines Corporation
    Inventors: Orvalle Theodore Kirby, Gregory Michael Nordstrom, Gregory Francis Pfister, Renato John Recio, Steven Mark Thurber
  • Patent number: 7552269
    Abstract: In a first aspect, a first method of synchronizing a plurality of processors of a system is provided. The first method includes the steps of (1) modifying a peripheral component interconnect express (PCIe) protocol to include a completion status encode associated with a synchronization command that indicates whether a condition of the synchronization command is met; (2) providing a system including (a) a memory; (b) a first processor coupled to the memory; (c) a second processor; and (d) an interconnect coupling the second processor to the first processor and the memory; and (3) employing the modified PCIe protocol on the interconnect. Numerous other aspects are provided.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: June 23, 2009
    Assignee: International Business Machines Corporation
    Inventors: Steven Mark Thurber, Andrew Henry Wottreng
  • Patent number: 7549090
    Abstract: An apparatus, program product and method propagate errors detected in an IO fabric element from an IO fabric that is used to couple a plurality of endpoint IO resources to processing elements in a computer. In particular, such errors are propagated to the endpoint IO resources affected by the IO fabric element in connection with recovering from the errors in the IO fabric element. By doing so, a device driver or other program code used to access each affected IO resources may be permitted to asynchronously recover from the propagated error in its associated IO resource, and often without requiring the recovery from the error in the IO fabric element to wait for recovery to be completed for each of the affected IO resources. In addition, an IO fabric may be dynamically configured to support both recoverable and non-recoverable endpoint IO resources.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: June 16, 2009
    Assignee: International Business Machines Corporation
    Inventors: David Alan Bailey, Trung Ngoc Nguyen, Gregory Michael Nordstrom, Kanisha Patel, Steven Mark Thurber
  • Publication number: 20090083471
    Abstract: The present invention provides a method and apparatus for processing a bus protocol packet in order to provide accelerator support. A component receives a bus protocol packet having a requester identifier. The component looks up an agent routing field. The component routes the bus protocol packet to an accelerator agent based on the agent routing field. It processes the bus protocol packet at the accelerator agent based on the agent routing field.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 26, 2009
    Inventors: Bradly George Frey, Steven Mark Thurber, Andrew Henry Wottreng
  • Publication number: 20080189577
    Abstract: Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
    Type: Application
    Filed: April 18, 2008
    Publication date: August 7, 2008
    Applicant: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Patrick Allen Buckland, Gregory Michael Nordstrom, Steven Mark Thurber
  • Publication number: 20080172507
    Abstract: In a first aspect, a first method of synchronizing a plurality of processors of a system is provided. The first method includes the steps of (1) modifying a peripheral component interconnect express (PCIe) protocol to include a completion status encode associated with a synchronization command that indicates whether a condition of the synchronization command is met; (2) providing a system including (a) a memory; (b) a first processor coupled to the memory; (c) a second processor; and (d) an interconnect coupling the second processor to the first processor and the memory; and (3) employing the modified PCIe protocol on the interconnect. Numerous other aspects are provided.
    Type: Application
    Filed: January 11, 2007
    Publication date: July 17, 2008
    Inventors: Steven Mark Thurber, Andrew Henry Wottreng
  • Patent number: 7398427
    Abstract: Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data processing system, thus permitting the use of low cost, industry standard switches and bridges external to the host bridge.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: July 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Patrick Allen Buckland, Gregory Michael Nordstrom, Steven Mark Thurber
  • Publication number: 20080126617
    Abstract: An apparatus, program product and method dynamically bind Message Signaled Interrupt (MSI) resources shared by a plurality of clients to an interrupt facility in an MSI-capable computer. In addition, management of such bindings may be implemented using a platform independent interrupt manager capable of managing multiple MSI bindings between MSI resources to an interrupt facility, and interfaced with an underlying hardware platform of a computer through platform-specific encapsulation program code.
    Type: Application
    Filed: August 28, 2006
    Publication date: May 29, 2008
    Inventors: Sean Thomas Brownlow, James Arthur Lindeman, Gregory Michael Nordstrom, John Ronald Oberly, John Thomas O'Quin, Steven Mark Thurber, Timothy Joseph Torzewski
  • Publication number: 20080126648
    Abstract: An apparatus, program product and method dynamically bind Message Signaled Interrupt (MSI) resources shared by a plurality of clients to an interrupt facility in an MSI-capable computer. In addition, management of such bindings may be implemented using a platform independent interrupt manager capable of managing multiple MSI bindings between MSI resources to an interrupt facility, and interfaced with an underlying hardware platform of a computer through platform-specific encapsulation program code.
    Type: Application
    Filed: August 28, 2006
    Publication date: May 29, 2008
    Inventors: Sean Thomas Brownlow, James Arthur Lindeman, Gregory Michael Nordstrom, John Ronald Oberly, John Thomas O'Quin, Steven Mark Thurber, Timothy Joseph Torzewski